Infrared Image Pre-Processing and IR/RGB Registration with FPGA Implementation
Round 1
Reviewer 1 Report
The manuscript (electronics-2199572), Infrared Image Pre-processing and IR/RGB registration with FPGA Implementation, shows the results of IR image processing applications. Authors presented quite comprehensive analysis in this work. Some minor comments would like to provide here for authors' reference and hope it can improve the manuscript quality before publication, shown as following -
1. Figure 10 Y axis unit needs to be provided.
2. Figure 11 all the units need to be provided.
3. Please provide a simple benchmark Table analysis to show the PPA (performance/power/area) in this work as compared to other works. This would be quite helpful for this referee and potential readers to get further insights of research impact and contribution in this work as compared to other works.
Due to the above comments, this referee would like to put the manuscript status as "Minor Revision" in the current phase.
Author Response
Dear expert,
Thank you for your positive feedback and thoughtful remarks. We appreciate your proposed improvements for the article and have addressed them as follows:
1. Figure 10 Y axis unit needs to be provided.
- The figure has been revised with the missing units.
2. Figure 11 all the units need to be provided.
- The figure has been revised with the missing units.
3. Please provide a simple benchmark Table analysis to show the PPA (performance/power/area) in this work as compared to other works. This would be quite helpful for this referee and potential readers to get further insights of research impact and contribution in this work as compared to other works.
- Thank you for this valuable comment. We have implemented some additional configurations and provided PPA (Performance/Power/Area) comparison with related work in Table 2.
Thank you for consideration,
Edgars Lielāmurs
Reviewer 2 Report
The paper is well-written and the proposed digital circuit design of infrared image acquisition and processing is sound. The paper's results are solid and show the effectiveness and efficiency of the proposed hardware on the target task.
My only concern is the lack of novelty in the main content of the paper. The paper describes a circuit design based on FPGA for existing algorithms. However, most designs are motivated by the algorithms in a straightforward way, with little technical justification (e.g., different design choices may lead to trade-offs between efficiency and performance).
Author Response
Dear expert,
Thank you for your positive feedback and thoughtful remark. We attempt to address your concerns by providing more context by explaining the overall aims of our work (Introduction section), i.e., the presented work follows a research initiative where we explore potential solutions for reducing the costs of IR imaging (Part of the APPLAUSE project: https://applause-ecsel.eu/); thus the prototyping development system examines the possibility of a potential (processorless) IR camera. The fully pipelined nature of the implemented algorithms should, in theory, facilitate the application of IR imaging in safety-critical systems. Further, we have added a PPA (Performance/Power/Area) comparison with related work (Table 2) to give further insight into the impact of the work.
Thank you for consideration,
Edgars Lielāmurs