A Predictive Current Control Strategy for a Medium-Voltage Open-End Winding Machine Drive

Round 1

Reviewer 1 Report

 

1- It is mentioned: ‚,Moreover, the voltage gain is increased, and fault-tolerant capability could be obtained depending on the control strategy used ‘‘ à Would you please explain what is meant by the voltage gain is increased and how?

2- It is mentioned: ,, The disadvantage is that SVM for multilevel inverters does not provide a straightforward implementation since the number of available voltage vectors is high, then the number of possible sectors where the tip of the voltage reference could lie is also high and difficult to identify, and then the calculation of duty cycles is not simple’’ and that MPC is better because of:  ,,especially due to its simplicity since no modulation is required, allows multivariable control’’ à This argument is not accurate especially while considering the indirect variant of MPC (also called Continuous-Control-Set MPC) where a modulator is used while maintain all advantages of MPC such as constraints fulfilment and including nonlinear models. Moreover, the computational burden for CCS-MPC is not necessarily more complex than than FCS-MPC especially for multilevel converters as the case in the proposal at hand. It would beneficial to the introduction to include those details. For more details, please refer to:  "On Continuous-Set Model Predictive Control of Permanent Magnet Synchronous Machines," in IEEE Transactions on Power Electronics, vol. 37, no. 9, pp. 10360-10371, Sept. 2022, doi: 10.1109/TPEL.2022.3164968

 

3- It is mentioned: ,, The problem of this topology is that presents a high number of switching states combinations (2^12 = 4096), then the application of a modulation algorithm is difficult in terms of sector identification, voltage vectors selection, and duty cycles calculation.’’ à This does not seem accurate. Once the optimization problem is solved numerically with CCS-MPC or analytically in deadbeat MPC, locating the sector and generating the duty cycles is straight forward. Please justify.

4- Please clearly mention the contributions of the paper in the introduction.

5- In the cost function design, there is no penalty on the change of the control input. A more recommended choice would be to penalize the change of the control input to regulate the average switching frequency. At least mentioning this as a recommendation along with using a longer prediction horizon might be beneficial for the reader, please refer to: "Guidelines for the Design of Finite Control Set Model Predictive Controllers," in IEEE Transactions on Power Electronics, vol. 35, no. 7, pp. 7434-7450, July 2020, doi: 10.1109/TPEL.2019.2954357.

6- Please mention the average switching frequency at the different simulation scenarios.

7- Please clarify whether speed dynamics are modelled or is it just given as a constant value within the simulation environment.

8- What are the current THD values using the used FCSMPC controller? How is it compared to controllers which use a modulator?

9- How would the proposed controller deal with modelling mismatch which will probably be the case when tested on a real hardware?

 

 

Author Response

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Reviewer 2 Report

The paper titled ‘’ A Predictive Current Control Strategy for a Medium Voltage Open-End Winding Machine Drive’’ presents a sound contribution, but the authors must improve some sections, an general I request the following comments:

1-      The abstract must be rewritten and discus the main paper problematic and the recent solution published and compare it with your contribution.

2-      In the introduction you must write the first letter of ‘’variable frequency drives’’ in bold, please revise the whole paper.

3-      In the section 4. Simulation results the authors requested to add some other results for torque, and converting the responses to statistical table.

 

4-      You must add section number 5, on which you compare your work with others by statistical results.

5- Please add some future work at the end of conclusion

Author Response

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Reviewer 3 Report

The paper shows the idea of driving a power inverter with dual voltage supplies. The basis for the considerations shown in the paper is the schematic diagram depicted in fig.1. The proposal of the inverter operating with two power supply voltages is an interesting approach. This idea can be found in recent papers.

The proposed inverter structure is incorrect and requires the significant attention of the authors. I have attached a schematic diagram that explains the essential error of your structure. The inverter can be split into separate stages (as shown in the attached diagram). The structure of the inverter is based on the H bridge driven by quasi-complementary operating power transistors with switchable power supply sources between V and V/2. The left part shows the proposed structure while the right part shows its correct implementation. The essential mistake made in the design is the ability to switch the transistor Q2 to deliver V/2 voltage to the switching transistors (Q3/Q4 pair). Unfortunately in the proposed connection, this transistor should deliver current from V/2 voltage source. In fact, this is NPN transistor in a given configuration is able to sink current only. How the voltage is delivered? The voltage is delivered by the diode (initially it was the clamping diode of the transistor) but now it becomes an essential component of power voltage selection for the bridge.

The modified structure of the inverter according to your idea is shown on the right (components marked with Q10x/D10x). The essential concept is switched supply that powers the transistors bridge (Q103/Q104). It switches between V/2 (default supply delivered by diode D102) and high voltage drive when Q101 is on and connects full voltage to the bridge. Next, there is a quasi-complementary transistor stage. The structure is able to deliver 4 different voltage levels measured on the load ends (shown as L Winding on the schematic diagram). Those voltages are requiring appropriate patterns to be applied to transistors. It could be noted that voltage delivery requires the diagonal activity of transistors e.g Q3/Q104 or Q4/Q103. Increasing the power supply voltage from V/2 to V requires activation of Q1/Q101 respectively. The full voltage is applied when Q101 and Q 103 are active (right side) or Q1 and Q3 are active (left side). Without driving Q1/Q101 inverter is operating under V/2 power supply level and the voltage swing on the load (neglecting saturation voltage on transistors) is V.

Summarizing it is essential to bring a correct structure of the inverter that matches your later considerations. Moreover please try to simplify your consideration by splitting problems and formulating elementary inverter driving patterns that are finally put together. 

Comments for author File: Comments.pdf

Author Response

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Author Response File: Author Response.pdf

Reviewer 4 Report

This paper introduces a simple predictive control strategy for an open-end winding machine fed by a multilevel inverter based on two cascaded two-level three-phase inverters. The common-mode voltage is eliminated. The paper is well-structured and well-written. The methods are clearly explained. However, only simulation results are provided, and no experimental validation. I would recommend to validate the control strategy on an experimental set-up.

 

Besides the lack of experimental results, I have a few small questions:

- Introduction: Why did you choose for the proposed topology with two cascaded two-level three-phase inverters instead of the other topologies you mention in the introduction? Or instead of a topology in which each side of the machine windings is fed by a two-level VSI?  What are its (dis)advantages?

- Fig. 3: Why do the gating signals S(t) have dimension 6 instead of 12?

- Predictive control strategy: What number of sampling periods do you use as prediction horizon and why?

Author Response

Dear reviewer

The authors would like to thank you for your valuable comment. Please find attached a file with answers to your recommendations.

Author Response File: Author Response.pdf

Round 2

Reviewer 2 Report

I accept the paper in current form.

Author Response

Thank you for this comment.

Reviewer 3 Report

The revised manuscript does not address the essential problem of incorrect inverter power stage structure. As it is incorrect all the following considerations well incorrect use of the PSim modelling tool puts in doubt the presented considerations.

The fundamental problem of the authors is the lack of a real model (simple transistor model for determining its operation properties - do not use as an excuse computer model) that allows checking the idea. The simulator simplifies the operation of components with the assumption of their correct use. In the case of the proposed inverter structure, there is a structural mistake that the authors stubbornly reject.

The only proof of correctness is the use of the PSim simulation. Unfortunately, one of the transistor switches is used beyond its normal operation mode (due to modelling simplification based on the use of an ideal switch obtained simulation results are incorrect)

Why there is not shown the Spice simulation of the bridge operation? The PSim is intended to be used for modelling with simplified switch models (it does not use the Ebers Moll transistor model but an ideal switch(!!!)). Transistor not always operates as a switch (!).

Returning to the proof presented by authors coming from the PSim. It must be rejected. The PSim incorrectly models the proposed structure which results in completely incorrect modelling results. 

Get back to the Spice simulation and check your design carefully before going to PSim. Detailed analysis and description of the operation were given in the previous review.

Below you will find the citation from the PSim note.

Comparison with SPICE

PSIM has a much faster simulation speed than SPICE based simulators based on its usage of the ideal switch. With the additional Digital and SimCoupler Modules almost any kind of logic algorithm can be simulated. Since PSIM uses ideal switches the simulated waveforms will reflect this, making PSIM more suited for system level studies rather than switching transition studies. Additionally, PSIM has a simplified interface compared to other simulators and as a result, has a more intuitive interface.[10][11]

Comments for author File: Comments.pdf

Author Response

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Author Response File: Author Response.pdf

Reviewer 4 Report

Thank you for your clear answers. 

My questions were answered well and the paper has improved.

However, the paper still lacks experimental validation, since the authors do not have an experimental setup yet.

If experimental validation is not required for publication in Electronics, the paper can be accepted in present form. If experimental validation is required, however, it needs to be rejected.

Author Response

Thank you for this comment.

Round 3

Reviewer 3 Report

The paper presents interesting predictive control based on the ideal model of the motor. There arises the question of the application area of such a model. Typically when using the PMSM motor an observation of EFM generated on winding ends is far from sinusoidal. A comparison between the ideal model and the real machine is needed. It should be also noted that the winding current measurement requires eliminating disturbances caused by the inverter. The disturbances introduce an error into the measured signal - this problem requires addressing while this signal is the base for the prediction model.

The proposed 5-level inverter structure is impractical. It requires 2 independent power sources with half voltage output. In the case of battery-powered drives while it must ensure the balanced use of all sources. It is advisable to use multilevel modulation where the half power supply voltage is obtained by balanced loading of capacitors in serial connection.

 

Reviewer 4 Report

The paper still lacks experimental validation, since the authors do not have an experimental setup yet.

If experimental validation is not required for publication in Electronics, the paper can be accepted in present form. If experimental validation is required, however, it needs to be rejected.