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Article

Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design

1
Department of Bases of Electronics, Technical University of Cluj-Napoca, 400114 Cluj-Napoca, Romania
2
Infineon Technologies, 020335 Bucharest, Romania
*
Author to whom correspondence should be addressed.
Electronics 2023, 12(6), 1328; https://doi.org/10.3390/electronics12061328
Submission received: 30 January 2023 / Revised: 6 March 2023 / Accepted: 7 March 2023 / Published: 10 March 2023

Abstract

This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. Moreover, this paper also presents the design methodology of a manually tuned proportional–integrative–derivative controller deployed on a field programmable gate array.
Keywords: buck converter power stage; ordinary differential equation system; hardware emulation; field programmable gate arrays buck converter power stage; ordinary differential equation system; hardware emulation; field programmable gate arrays

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MDPI and ACS Style

Kirei, B.S.; Farcas, C.-A.; Chira, C.; Ilie, I.-A.; Neag, M. Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design. Electronics 2023, 12, 1328. https://doi.org/10.3390/electronics12061328

AMA Style

Kirei BS, Farcas C-A, Chira C, Ilie I-A, Neag M. Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design. Electronics. 2023; 12(6):1328. https://doi.org/10.3390/electronics12061328

Chicago/Turabian Style

Kirei, Botond Sandor, Calin-Adrian Farcas, Cosmin Chira, Ionut-Alin Ilie, and Marius Neag. 2023. "Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design" Electronics 12, no. 6: 1328. https://doi.org/10.3390/electronics12061328

APA Style

Kirei, B. S., Farcas, C.-A., Chira, C., Ilie, I.-A., & Neag, M. (2023). Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design. Electronics, 12(6), 1328. https://doi.org/10.3390/electronics12061328

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