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Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition

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A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Power Electronics".

Deadline for manuscript submissions: closed (31 January 2025) | Viewed by 33911

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Special Issue Editors

Prof. Dr. Miro Milanovic

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Faculty of Electrical Engineering and Computer Science, University of Maribor, Koroska Cesta 46, SI-2000 Maribor, Slovenia
Interests: control of power electronics converters; unity power factor correction; switching matrix converters; FPGA-based real time simulation
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Prof. Dr. Eric Monmasson

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Systèmes et Applications des Technologies de l’Information et de l’Energie Laboratory, UMR CNRS 8029, CY Cergy Paris University, Paris, France
Interests: control of power electronics; electrical motors and generators; SoC-based and FPGA-based industrial control systems
Special Issues, Collections and Topics in MDPI journals

Dr. Franc Mihalič

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Faculty of Electrical Engineering and Computer Science, University of Maribor, Koroska Cesta 46, SI-2000 Maribor, Slovenia
Interests: power electronics converters (modelling, control ...); modulation strategies for EMI reduction and power factor correction circuits

Dr. Lahoucine Idkhajine

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SATIE Laboratory, CY Cergy-Paris University, 95031 Cergy-Pontoise, France
Interests: controllers; observers; embedded real-time simulators and real-time digital twins of power electronics and electrical drive systems, and their SoC-FPGA digital implementation

Special Issue Information

Dear Colleagues,

The main objective of this Special Issue is to provide experts in the field of power electronics and drives the opportunity to present their research and development efforts in the field of hardware-in-the-loop, real-time simulations, digital control, and functional safety of power electronics and drives, with an emphasis on practical applications. Therefore, researchers who are involved in the above mentioned research topics are invited to submit their manuscripts and to contribute their expertise to this Special Issue.

Prof. Dr. Miro Milanovic
Prof. Dr. Eric Monmasson
Dr. Franc Mihalič
Dr. Lahoucine Idkhajine
Guest Editors

Manuscript Submission Information

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Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

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Keywords

power converters
motor drives
digital controllers
microcontroller-based applications
FPGA-based controllers
system-on-chip-based controllers
software-in-the-loop
hardware-in-the-loop
functional safety of the power electronics
fault-tolerant techniques
microcomputer-based real-time simulations
FPGA-based real-time simulations

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Published Papers (9 papers)

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Research

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19 pages, 7225 KiB

Open AccessArticle

Utilization of MCU and Real-Time Simulator for Identifying Beatless Control for Six-Step Operation of Three-Phase Inverter

by Yongsu Han

Electronics 2025, 14(5), 1030; https://doi.org/10.3390/electronics14051030 - 5 Mar 2025

Viewed by 451

Abstract

In industries dealing with motor drive systems, the use of real-time simulators for validating control codes is becoming increasingly mandatory. This is particularly essential for systems with advanced control codes or complex microcontroller unit (MCU) register configurations, as this validation process helps prevent accidents and shorten development time. This study presents a validation process using a real-time simulator for the beatless control of six-step operation. Six-step operation, when applied to high-speed drives, has a limitation on the number of samples per electrical rotation, which causes voltage errors. A representative of these voltage error phenomena is the beat phenomenon, resulting in torque ripple at the first harmonic and high current ripple. To mitigate this beat phenomenon, a synchronous PWM method is sometimes used. However, in practical industrial systems, it may not be feasible to synchronously adjust the inverter’s switching frequency with the rotation speed. This study proposes a beatless control method to eliminate the voltage errors caused by the beat phenomenon during six-step operation at a fixed switching frequency. The specific implementation of this control method is explained based on MCU timer register settings. While previous studies have only proposed beatless control methods, this paper goes further by implementing the proposed beatless method using the MCU (TMS320F28335) to generate gating signals and validating the implementation through simulation on a permanent magnet synchronous motor using a real-time simulator (Typhoon HIL). Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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17 pages, 10830 KiB

Open AccessArticle

Fault-Tolerant Control of a Multiphase Series Capacitor Buck Converter in a Master–Slave Configuration for Powering a Particle Accelerator Electromagnet

by Edorta Ibarra, Antoni Arias, Iñigo Martínez de Alegría, Alberto Otero-Olavarrieta, Asier Matallana and Louis de Mallac

Electronics 2025, 14(5), 924; https://doi.org/10.3390/electronics14050924 - 26 Feb 2025

Viewed by 363

Abstract

Multiphase DC/DC power converter architectures have recently been investigated for powering the superconducting electromagnets in the High-Luminosity (HL) upgrade of the Large Hadron Collider (LHC) at CERN, targeting high-performance figures and reliability. In terms of control, a master–slave voltage/current regulation configuration was previously proposed by the authors as an alternative to other well-known cascaded options. In this work, fault-tolerant features (i.e., diagnosis and reconfiguration under open-circuit switch faults) are incorporated into the aforementioned proposal. These features are highly desirable, as physics experiments—which can last for several hours—should not be interrupted in the event of a recoverable fault in the powering system. Simulation and experimental results are provided, demonstrating the correctness of the proposed fault-tolerant scheme. Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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20 pages, 5811 KiB

Open AccessArticle

Real-Time Implementation of Three-Phase Z Packed U-Cell Modular Multilevel Grid-Connected Converter Using CPU and FPGA

by Sandy Atanalian, Fadia Sebaaly, Rawad Zgheib and Kamal AL-Haddad

Electronics 2024, 13(11), 2186; https://doi.org/10.3390/electronics13112186 - 4 Jun 2024

Cited by 1 | Viewed by 1404

Abstract

The Modular Multilevel Converter (MMC) is a promising converter for medium-/high voltage applications due to its various features. The waveform quality could be enhanced further by expanding the number of generated voltage levels, which increases the number of submodules (SMs); however, this improvement enlarges the size and cost of the converter, posing a persistent challenge. Hence, there exists a trade-off between power quality and the size and complexity of the converter. To verify the performance of such a complex converter and to validate the effectiveness of the control system, especially in the absence of a physical system, Real-Time (RT) simulation becomes crucial. However, the large number of components of a MMC creates important numerical challenges and computational difficulties in RT simulation. This paper proposes a grid-connected MMC employing a Z Packed U-Cell converter as a SM to generate a higher number of voltage levels while minimizing the required number of SMs. The ZPUC-MMC is implemented on an FPGA-based RT simulation platform using Electric Hardware Solver to reduce computational burden and simulation time, while improving the accuracy of the obtained results. Conventional controllers of MMCs are applied to assess the effectiveness and robustness of the proposed system during steady-state and dynamic operations. Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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29 pages, 3615 KiB

Open AccessArticle

Enhancing the Coupling of Real-Virtual Prototypes: A Method for Latency Compensation

by Peter Baumann, Oliver Kotte, Lars Mikelsons and Dieter Schramm

Electronics 2024, 13(6), 1077; https://doi.org/10.3390/electronics13061077 - 14 Mar 2024

Viewed by 1044

Abstract

Currently, innovations in mechatronic products often occur at the system level, requiring consideration of component interactions throughout the entire development process. In the earlier phases of development, this is accomplished by coupling virtual prototypes such as simulation models. As the development progresses and real prototypes of certain system components become available, real-virtual prototypes (RVPs) are established with the help of network communication. However, network effects—all of which can be interpreted as latencies in simplified terms—distort the system behavior of RVPs. To reduce these distortions, we propose a coupling method for RVPs that compensates for latencies. We present an easily applicable approach by introducing a generic coupling algorithm based on error space extrapolation. Furthermore, we enable online learning by transforming coupling algorithms into feedforward neural networks. Additionally, we conduct a frequency domain analysis to assess the impact of coupling faults and algorithms on the system behavior of RVPs and derive a method for optimally designing coupling algorithms. To demonstrate the effectiveness of the coupling method, we apply it to a hybrid vehicle that is productively used as an RVP in the industry. We show that the optimally designed and trained coupling algorithm significantly improves the credibility of the RVP. Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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16 pages, 3406 KiB

Open AccessArticle

Indirect Matrix Converter Hardware-in-the-Loop Semi-Physical Simulation Based on Latency-Free Decoupling

by Zhongqing Sang, Shaojie Li, Yuanyuan Huang, Xin Gao and Rui Qiao

Electronics 2023, 12(23), 4802; https://doi.org/10.3390/electronics12234802 - 27 Nov 2023

Cited by 3 | Viewed by 1405

Abstract

In the process of hardware-in-the-loop simulations (HILs) of indirect matrix converters (IMCs), solving the mathematical models of complex multiswitching converter topologies has become a major problem. The conventional approach is to split the complex mathematical model into multiple serial subsystems; however, this inevitably produces delays in the simulation steps between different subsystems, leading to numerical oscillations. In this paper, the method of latency-free decoupling is adopted, which has no time-step delay between different subsystems, making each subsystem a parallel operation. This can improve the numerical stability of the simulations and can effectively reduce the step size of the real-time simulation and alleviate the problem of real-time simulation resource consumption. In this paper, we discuss in detail the modeling process of IMC hardware-in-the-loop simulations with Finite Control Set Model Predictive Control (FCS-MPC), and experimentally validate our method using the Speedgoat test platform, resulting in a simulation step size of less than 200 ns. The simulation results are compared with the results of Matlab’s Simpower power system, which allows us to evaluate the accuracy of our model. Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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13 pages, 936 KiB

Open AccessArticle

Automatic Word Length Selection with Boundary Conditions for HIL of Power Converters

by Mariano Alberto García-Vellisca, Carlos Quiterio Gómez Muñoz, María Sofía Martínez-García and Angel de Castro

Electronics 2023, 12(16), 3488; https://doi.org/10.3390/electronics12163488 - 17 Aug 2023

Cited by 2 | Viewed by 1102

Abstract

Hardware-in-the-loop (HIL) is a common technique used for testing in power electronics. It draws upon FPGAs (field-programmable gate arrays) because they allow for reaching real-time simulation for mid-high switching frequencies. FPGA area and delay are keys to reaching a compromise between performance and accuracy. To minimize area and delay, signal word length (WL) is critical. Furthermore, the input and output’s WL should be carefully chosen because these signals come from ADCs (analog-to-digital converters) or go to DACs (digital-to-analog converters). In other words, the role of ADCs and DACs is the boundary condition when assigning all the signal WLs in an HIL model. This research presents an automatic method for computing the signal WLs in the corresponding model by considering input/output boundary conditions. This automatic method needs a single simulation to decide both the integer and fractional width of every signal. Our method accelerates the process, showing an advantage over manual methods and those requiring multiple simulations. The proposed method is applied to create all the WL assignments to the signals involved in a fixed-point coded buck converter model, which shows its feasibility. Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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18 pages, 429 KiB

Open AccessArticle

Efficient Hardware-in-the-Loop Models Using Automatic Code Generation with MATLAB/Simulink

by Roberto Saralegui, Alberto Sanchez and Angel de Castro

Electronics 2023, 12(13), 2786; https://doi.org/10.3390/electronics12132786 - 23 Jun 2023

Cited by 5 | Viewed by 2148

Abstract

Hardware-in-the-loop testing is usually a part of the design cycle of control systems. Efficient and fast models can be created in a Hardware Description Language (HDL), which is implemented in a Field-Programmable Gate Array (FPGA). Control engineers are more skilled in higher-level approaches. HDL models derived automatically from schematics have noticeably lower performance, while HDL models derived from their equations are faster and smaller. However, even models translated automatically into HDL using the equations might be worse than manually coded models. A design workflow is proposed to achieve manual-like performance with automatic tools. It consists of the identification of similar operations, forcing signal signedness, and adjusting to multiplier input sizes. A detailed comparison was performed between three workflows: (1) translation of high-level MATLAB code, (2) translation of a Simulink model, and (3) working directly in the HDL. Sources of inefficiency were shown in a buck converter, and the process was validated in a full-bridge with electrical losses using a Runge–Kutta method. The results showed that the proposed approach delivered code that performed very close to a reference VHDL implementation, even for complex designs. Finally, the model was implemented in an off-the-shelf FPGA board suitable for a hardware-in-the-loop test setup. Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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18 pages, 4312 KiB

Open AccessArticle

Hardware Emulation of Step-Down Converter Power Stages for Digital Control Design

by Botond Sandor Kirei, Calin-Adrian Farcas, Cosmin Chira, Ionut-Alin Ilie and Marius Neag

Electronics 2023, 12(6), 1328; https://doi.org/10.3390/electronics12061328 - 10 Mar 2023

Cited by 2 | Viewed by 2463

Abstract

This paper proposes a methodology of delivering the emulation hardware of several step-down converter power stages. The generalized emulator design methodology follows these steps: first, the power stage is described using an ordinary differential equation system; second, the ordinary differential equation system is solved using Euler’s method, and thus an accurate time-domain model is obtained; next, this time-domain model can be described using either general-purpose programming language (MATLAB, C, etc.) or hardware description language (VHDL, Verilog, etc.). As a result, the emulator has been created; validation of the emulator may be carried out by comparing it to SPICE transient simulations. Finally, the validated emulator can be implemented on the preferred target technology, either in a general-purpose processor or a field programmable gate array. As the emulator relies on the ordinary differential equation system of the power stage, it has better behavioral accuracy than the emulators based on average state space models. Moreover, this paper also presents the design methodology of a manually tuned proportional–integrative–derivative controller deployed on a field programmable gate array. Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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Review

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34 pages, 11532 KiB

Open AccessReview

Hardware-in-the-Loop Simulations: A Historical Overview of Engineering Challenges

by Franc Mihalič, Mitja Truntič and Alenka Hren

Electronics 2022, 11(15), 2462; https://doi.org/10.3390/electronics11152462 - 8 Aug 2022

Cited by 106 | Viewed by 21216

Abstract

The design of modern industrial products is further improved through the hardware-in-the-loop (HIL) simulation. Realistic simulation is enabled by the closed loop between the hardware under test (HUT) and real-time simulation. Such a system involves a field programmable gate array (FPGA) and digital signal processor (DSP). An HIL model can bypass serious damage to the real object, reduce debugging cost, and, finally, reduce the comprehensive effort during the testing. This paper provides a historical overview of HIL simulations through different engineering challenges, i.e., within automotive, power electronics systems, and different industrial drives. Various platforms, such as National Instruments, dSPACE, Typhoon HIL, or MATLAB Simulink Real-Time toolboxes and Speedgoat hardware systems, offer a powerful tool for efficient and successful investigations in different fields. Therefore, HIL simulation practice must begin already during the university’s education process to prepare the students for professional engagements in the industry, which was also verified experimentally at the end of the paper. Full article

(This article belongs to the Special Issue Hardware in the Loop, Real-Time Simulation and Digital Control of Power Electronics and Drives, 2nd Edition)

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