A Novel Variable On-Time Control Scheme for Boundary Conduction Mode SEPIC PFC Converter

Abstract

Power factor correction (PFC) can be achieved by a single-ended primary inductor converter (SEPIC) operating in boundary conduction mode (BCM) with conventional constant on-time (COT) control, but it is challenging to achieve low total harmonic distortion (THD) and high-power factor (PF), particularly at high input voltage. A variable on-time (VOT) control strategy for BCM SEPIC PFC converter without input voltage feedforward and multiplier circuits is proposed to realize unity PF in this paper. By using a variable slope sawtooth generator whose slope is controlled by the duty cycle of the main switch to adjust the conduction time of the main power switch of the converter, the proposed VOT control scheme can use a simple and easy-to-implement circuit to enhance the PF and decrease the THD significantly, especially at high input voltage. The simulation model and 100W experimental prototype are built to verify the feasibility of the suggested control method. Simulation and experiment results demonstrated that the novel VOT control scheme remarkably enhances PF and decreases THD without affecting the efficiency by contrast with the conventional COT control.

1. Introduction

In recent years, the demands for power supplies with power factor correction (PFC) converters have increased to realize low input current harmonic and high-power factor (PF) to conform to the necessary harmonic limits standards, e.g., IEEE STD 519 and IEC61000-3-2 [1,2,3,4,5]. To realize PFC, many different PFC circuit topologies, including Buck, Boost, Cuk, Buck-Boost etc., have been researched to satisfy different application condition requirements [6,7,8,9,10,11,12]. The input current ripple of the Boost converter is small because of the series connection of the inductor at the input side, so the Boost converter can realize high PF and has been widely used [8,9,10]. However, Boost PFC topology cannot achieve the output voltage, which is lower than the magnitude value of AC input voltage. It is hard to handle high input inrush current and short output protection during starting up. To meet applications where the output voltage is lower than the input voltage Buck PFC converter is researched in [6,7], it is easy to achieve short output protection, but it is hard to realize high PF because there is a large input current dead time when the output voltage is higher than the instantaneous input voltage of each AC line period. To achieve a voltage between the maximum and minimum input voltage range, Buck-Boost and Cuk PFC converters are investigated in [11,12,13,14], but applications of Buck-Boost and Cuk PFC are limited since the output voltage is negative. Similar to the Boost converter, the current ripple at the input terminal of a single-ended primary inductor converter (SEPIC) is small because the converter has an inductor connected in series at the input terminal, so the SEPIC converter is suitable to achieve PFC [15,16]. Compared to Boost, Buck, Buck-boost, and Cuk PFC converters, SEPIC PFC converter can easily achieve positive polarity output voltage, short output protection, more comprehensive output voltage range [16,17,18]. Therefore, SEPIC PFC converter has gained more and more applications such as light emitting diode driving circuits, onboard chargers for plug-in electric vehicles, brushless DC motor drives, air-craft power supplies etc. [19,20,21,22,23,24,25,26,27,28,29,30,31].

According to whether the freewheeling diode is always conducting during the power switch of the SEPIC converter is turned off in a switching cycle, SEPIC topology can operate in discontinuous conduction mode (DCM), boundary conduction mode (BCM) and continuous conduction mode (CCM) [24,25,26,27,28]. For CCM operation mode, the SEPIC PFC converter usually requires an outer voltage control loop and an inner current control loop to control the shape of the input current and pre-regulate the output voltage. Furthermore, the additional multiplier is usually required to handle rectified input voltage sensing signal and error signal of output voltage, which increases the complexity of the control circuit [16,17,25,26]. On the other hand, the SEPIC PFC converter operating in DCM can achieve PFC using a simple voltage follower with one voltage control loop [27,28,29,30,31,32]. However, the efficiency is poor due to the large RMS current and peak current of the power switch and diode, which limits its application in higher output power. Compared with DCM, the SEPIC PFC converter operating in BCM can use a single voltage control loop to achieve PFC. However, it has higher efficiency, especially for higher output power applications [23,24]. Therefore, SEPIC PFC converters operating in BCM have been increasingly widely used.

It is well known that a Boost PFC converter operating at BCM with constant on-time (COT) control can obtain perfect sine-wave input current and unity PF. Therefore, many researchers use COT control as the control strategy for SEPIC PFC converters operating in BCM [20,24,33]. As shown in the test data of [20], PF is 0.97 with 200 V forward voltage and 350 mA rated current LED load at 220 Vac input voltage; as shown in the test data of [24], PF is 0.91 with 1.4 A rated output current and 60 W output power LED load at 230 Vac input voltage; as shown in the test data of [33], with 264 Vac input voltage and 210 W output power, PF and total harmonic distortion (THD) are 0.924 and 18.1% respectively. Therefore, from experimental data and waveforms in [20,24,33], the BCM SEPIC PFC converter with COT control scheme results in a slightly distorted input current, low PF, and high THD, especially with high input voltage. To achieve unity PF and reduce the THD of the PFC converter with the COT control method, a variable on-time (VOT) control method has been proposed for BCM Flyback or Buck PFC converter [6,34,35,36].

Moreover, a VOT control method for SEPIC PFC converter operating in BCM is proposed to achieve unity [37]. The method uses output and input voltage to calculate and adjust the on-time of the power switch. From experimental results in [37], the PF maintains to be bigger than 0.995 with 100 W output power at 90~265 Vac entire input voltage. With these VOT control strategies mentioned in [6,34,35,36,37], the PF and input current harmonic are ameliorated. Still, the extra multiplier, input voltage feedforward, and operational amplifier circuits make the control circuit complicated and expensive.

This paper proposes a novel VOT control strategy for SEPIC PFC converter operating in BCM without input voltage feedforward and multiplier circuits to realize unity PF. By using a variable slope sawtooth generator whose slope is controlled by the main power switch’s duty cycle to adjust the main power switch’s on-time, the proposed control scheme can use a simple and easy-to-implement circuit to achieve unity PF at the entire input voltage range. The operation principles and performance comparison of VOT and COT control schemes for SEPIC PFC converter operating in BCM are investigated and developed. Finally, the simulation and test results based on the 100 W prototype are presented to validate the feasibility of the proposed VOT control and the correctness of the performance comparison analysis.

This paper consists of 6 sections as follows. Section 2 analyses the SEPIC PFC converter operating in BCM with a traditional COT control scheme. In Section 3, a variable-on-time control scheme with a variable slope sawtooth generator for SEPIC PFC converter operating BCM is proposed and analyzed. Utilizing the proposed control scheme, the performance of PF and THD can be improved. Section 4 analyses performance comparisons of the two control schemes’ input current, power factor, output voltage ripple, switching frequency, and current stress. In Section 5 and Section 6, experimental verification results and a conclusion are given, respectively.

2. Boundary Conduction Mode SEPIC Power Factor Correction Converter with Constant-On-Time Control

Figure 1a presents the circuit diagram of SEPIC DC-DC converter topology, which is consisted of input capacitor C_in, inductors L₁ and L₂, main switch S₁, freewheeling diode D₁, middle capacitor C₁, output capacitor C₂ [38,39]. When the SEPIC converter operates at BCM mode, the SEPIC converter has two operation modes. Equivalent circuits of two operation modes and operation waveforms of the circuit are presented in Figure 1b–d.

Operation mode A: The main power switch S₁ is switched on at the start of each switching cycle, diode D₁ is reverse-biased, SEPIC converter works at operation mode A when S₁ is on. Figure 1b,d shows the equivalent circuit and key waveforms for mode A. In operation mode A, the voltage of v_S1 is zero because S₁ is on; C_in, L₁, and S₁ form a current loop, the input voltage V_in applies to inductor L₁, the inductor current i_L1 ramps up with the slope of V_in/L₁ from the initial value i_{L1_0}; C₁, S₁, and L₂ form a current loop, the middle capacitor voltage v_B applies to inductor L₂, the inductor current i_L2 ramps up with the slope of v_B/L₂ from the initial value i_{L2_0}; Output capacitor C₂ and output load R_L form a current loop, output capacitor C₂ provides energy to load resistor; Both inductor currents of L₁ and L₂ flow through switch S₁, the currents flowing through S₁ ramp up from zero [38,39].

Operation mode B: When the turn-on time reaches the target value, S₁ is turned off, operation mode A ends, and the converter enters operation mode B Figure 1c,d show the equivalent circuit and key waveforms for mode B. In operation mode B, S₁ is turned off, and D₁ is forward-biased, which makes both inductors L₁ and L₂ release energy to the middle capacitor C₁ and output load through diode D₁. In operation mode B, the voltage of v_S1 is V_in + V_O because D₁ is forward-biased and v_B is equal to V_in; C_in, L₁, C₁, D₁, C₂, and R_L form a current loop, the output voltage V_O applies to inductor L₁, the inductor current i_L1 decreases with the slope of V_O/L₁ from the peak value; L₂, D₁, C₂, and R_L form a current loop, the output voltage V_O applies to inductor L₂, the inductor current i_L2 decreases with the slope of V_O/L₂ from the peak value; Both inductor currents of L₁ and L₂ flow through diode D₁, when the current i_D1 decreases to zero, S₁ is turned on, the next switching cycle is started again [38,39].

The block diagram of the SEPIC PFC converter operating in BCM with the conventional COT control is presented in Figure 2a. It consists of rectifier bridge D_Rec, inductors L₁ and L₂, main switch S₁, freewheeling diode D₁, middle capacitor C₁, output capacitor C₂, error amplifier EA, comparator CMP, sawtooth generator, zero current detection, SR flip-flop etc. In addition, L_f and C_f are used as low-pass input filters.

Figure 2b presents the operation waveforms of the SEPIC PFC circuit working in BCM with traditional COT control during half AC line period. At the start of each switching cycle, S₁ is turned on; when the voltage v_Saw of the sawtooth generator at the positive input terminal of comparator CMP increases to V_comp, S₁ is turned off. According to Figure 2b, the output voltage V_comp of the error amplifier maintains constant in half the AC line period because the bandwidth of the control loop is usually much lower than the AC line frequency for the PFC converter [34,35]. Furthermore, since the slope of the sawtooth generator of COT control is fixed, the on-time of S₁ is almost fixed when the converter operates in a steady state with a stable input voltage and output load.

By analyzing the operation principle, the inductor current peak-to-peak ripple of L₁ and L₂ of SEPIC PFC converter operating in BCM can be given by

$$\Delta i_{L1}(t)=\frac{V_{\mathrm{M}}\left|\sin (\omega t)\right|T_{\mathrm{on}}}{L_1}$$

(1)

$$\Delta i_{L2}(t)=\frac{v_{\mathrm{B}}(t)T_{\mathrm{on}}}{L_2}$$

(2)

where V_M and v_B(t) is the amplitude of input voltage and the voltage of the middle capacitor C1 respectively, T_on is the on-time of S₁. In the derivation of the following equation, i_{L1_0}(t) and i_{L2_0}(t) are the initial values of L₁ and L₂ currents for each switching cycle, respectively, i_{L1_avg}(t) and i_{L2_avg}(t) are the average values of the current flowing through L₁ and L₂.

During the steady operation, the average voltage of middle capacitor C₁ in one switching cycle is equal to the rectified input voltage [33], so there is.

$$v_{\mathrm{B}}(t)=V_{\mathrm{M}}\left|\sin (\omega t)\right|$$

(3)

Because the rectified input current is equal to the average current of the inductor L₁, the input current i_in(t) can be expressed as follows.

$$\left|i_{\mathrm{in}}(t)\right|=i_{L1\_\mathrm{avg}}(t)=i_{L1\_0}(t)+\frac{\Delta i_{L1}(t)}{2}$$

(4)

The SEPIC converter operates in BCM. Once the current of D₁ decreases to zero, S₁ is turned on, and the initial current of main switch S₁ should be zero, so there is.

$$i_{L1\_0}(t)+i_{L2\_0}(t)=0$$

(5)

The charge balance of the middle capacitor C₁ in a switching period can be expressed as

$$\left(\frac{\Delta i_{L1}(t)}{2}+i_{L1\_0}(t)\right)T_{\mathrm{d}}(t)=\left(\frac{\Delta i_{L2}(t)}{2}+i_{L2\_0}(t)\right)T_{\mathrm{on}}$$

(6)

where T_d(t) is the time that diode D₁ is forward biased, and T_d(t) can be obtained as

$$T_{\mathrm{d}}(t)=\frac{V_{\mathrm{M}}\left|\sin (\omega t)\right|T_{\mathrm{on}}}{V_{\mathrm{O}}}$$

(7)

According to (1), (2), (3), (5), (6), and (7), i_{L1_0}(t) can be expressed as

$$i_{L1\_0}(t)=\frac{T_{\mathrm{on}}{V}_{\mathrm{M}}\left|\sin (\omega t)\right|}{2\left(V_{\mathrm{O}}+V_{\mathrm{M}}\left|\sin (\omega t)\right|\right)}\left(\frac{V_{\mathrm{O}}}{L_2}-\frac{V_{\mathrm{M}}\left|\sin (\omega t)\right|}{L_1}\right)$$

(8)

From (1), (4), and (8), the input current i_in(t) can be obtained as

$$i_{\mathrm{in}}(t)=\frac{T_{\mathrm{on}}{V}_{\mathrm{M}}\sin (\omega t)}{2\left(1+K_1\left|\sin (\omega t)\right|\right)}\left(\frac{1}{L_1}+\frac{1}{L_2}\right)$$

(9)

where K₁ = V_M/V_O.

Equation (9) shows that the input current is not an ideal sine-waveform. Therefore, with the traditional COT control, unity PF cannot be achieved except with extreme condition K₁ = 0.

3. Variable-On-Time Control Scheme

Observing Equation (9), the denominator of the equation contains (1 + K₁sin(ωt)), which prevents the input current from being sinusoidal. Based on (9), suppose T_on can be controlled to be proportional to (1 + K₁sin(ωt)), the unity PF may be achieved. Figure 3 illustrates a detailed block diagram for the developed procedure from COT control to VOT control, which can explain how the VOT control with variable slope sawtooth generator is proposed.

By analyzing (9) and Figure 3, to realize sinusoidal input current, the on time of S₁ is supposed as

$$T_{\mathrm{on}}(t)=K_{\mathrm{Ton}}\left(1+K_1\left|\sin (\omega t)\right|\right)$$

(10)

where K_Ton is a constant parameter about turning on the time control circuit. Combining (9) and (10), the input current can be written as

$$i_{\mathrm{in}}(t)=\frac{K_{\mathrm{Ton}}{V}_{\mathrm{M}}\sin (\omega t)}{2}\left(\frac{1}{L_1}+\frac{1}{L_2}\right)$$

(11)

Observing (11), it can be seen that the ideal sinusoidal input current can be achieved if the on-time of S₁ can be varied, as in equation (10).

Combing definition of K₁ and SEPIC converter operation theory [38,39], Equation (10) can be written as

$$T_{\mathrm{on}}(t)=K_{\mathrm{Ton}}\left(\frac{V_{\mathrm{O}}+V_{\mathrm{M}}\left|\sin (\omega t)\right|}{V_{\mathrm{O}}}\right)=\frac{K_{\mathrm{Ton}}}{D(t)}$$

(12)

D(t) is the duty cycle of S₁. Based on Equation (12) and the turn-on time circuit of COT control, it is conceivable to use a variable slope sawtooth generator to produce variable turn-on time, as shown in Figure 3. The variable slope sawtooth generator consists of a charging current i_CHG, a voltage-controlled current source (VCCS), a timing capacitor C_T, a reference voltage source V₁, a low pass RC filter comprised of R₃ and C₃, and three signal switches S₂~S₄ etc.

Therefore, using a variable slope sawtooth generator to produce variable turn-on time, a novel VOT control scheme for SEPIC PFC converter operating in BCM, which can get unity PF, is proposed. Figure 4 illustrates the block diagram and key operation waveforms of the SEPIC PFC converter operating in BCM with VOT control. Compared to the COT control strategy shown in Figure 2a, only an additional variable slope sawtooth generator, shown in the blue dashed line of Figure 4a, is required in the VOT control strategy.

According to the circuit of the variable slope sawtooth generator in Figure 4a, the signal switch S₄ is controlled by gate drive signal Q of S₁, and the signal switch S₂ and S₃ are controlled by the inverting drive signal Q. Hence, the turn-on time of the signal switches S₄ and S₃ are T_on(t) and T_s(t)-T_on(t) respectively. The low pass RC filter comprised of R₃ and C₃ filters out the switching frequency so that the control voltage v_C3 of the VCCS remains stable during a switching period. Therefore, the charging current i_CHG(t) of the sawtooth generator can be expressed by

$$i_{\mathrm{CHG}}(t)=g_1{v}_{\mathrm{C}3}(t)=\frac{g_1{V}_1{T}_{\mathrm{on}}(t)}{T_{\mathrm{S}}(t)}=g_1{V}_{1}D(t)$$

(13)

where g₁ is the control ratio of the VCCS i_CHG, T_on(t), T_S(t), and D(t) are the turn-on time, the switching period, and the duty cycle of S₁ respectively. According to Equation (13) and Figure 4, the slope of the sawtooth generator in the proposed converter is variable with D(t) of S₁. Therefore, the turn-on time of switch S₁ can be expressed as

$$T_{\mathrm{on}}(t)=\frac{V_{\mathrm{comp}}{C}_{\mathrm{T}}}{i_{\mathrm{CHG}}(t)}=\frac{V_{\mathrm{comp}}{C}_{\mathrm{T}}}{g_1{V}_{1}D(t)}$$

(14)

Since the SEPIC PFC converter operates in BCM, there are

$$T_{\mathrm{S}}(t)=T_{\mathrm{on}}(t)+T_{\mathrm{d}}(t)$$

(15)

$$D(t)=\frac{T_{\mathrm{on}}(t)}{T_{\mathrm{S}}(t)}$$

(16)

According to (1), (2), (3), (5), (6), (7), (15), and (16), the initial inductor current i_{L1_0}(t) of L₁ for the proposed VOT control scheme can be obtained as

$$i_{L1\_0}(t)=\frac{D(t)V_{\mathrm{M}}\left|\sin (\omega t)\right|T_{\mathrm{on}}(t)}{2}\left(\frac{1}{L_2}-\frac{1}{L_1}\frac{V_{\mathrm{M}}\left|\sin (\omega t)\right|}{V_{\mathrm{O}}}\right)$$

(17)

From (1), (4), (17), the input current i_in(t) with VOT control can be derived as

$$i_{\mathrm{in}}(t)=\frac{V_{\mathrm{M}}\sin (\omega t)T_{\mathrm{on}}(t)D(t)}{2}\left(\frac{1}{L_1}+\frac{1}{L_2}\right)$$

(18)

By substituting (14) into (18), the input current i_in(t) with VOT control can be obtained as

$$i_{\mathrm{in}}(t)=\frac{V_{\mathrm{comp}}{C}_{\mathrm{T}}{V}_{\mathrm{M}}\sin (\omega t)}{2g_1{V}_1}\left(\frac{1}{L_1}+\frac{1}{L_2}\right)$$

(19)

During operating at a steady state, the error signal V_comp keeps almost constant during half line period because of the quite narrow control loop bandwidth. For a given converter, the timing capacitor C_T of the sawtooth generator and the control ratio g₁ of the VCCS i_CHG are constant. Therefore, define K_Ton in (11) as

$$K_{\mathrm{Ton}}=\frac{V_{\mathrm{comp}}{C}_{\mathrm{T}}}{g_1{V}_1}$$

(20)

According to (11), (19), and (20), Equations (11) and (19) are the same. Therefore, the input current with VOT control is an ideal sine-waveform. Hence the proposed VOT control scheme can achieve the theoretical unity PF of the SEPIC PFC converter operating in BCM.

4. Performance Comparison

4.1. Comparison of Input Current and Power Factor

According to (1), (2), and Figure 2, the peak current through D₁ of COT control can be given as

$$i_{D1\_\mathrm{PK}\_\mathrm{COT}}(t)=\Delta i_{L1\_\mathrm{COT}}(t)+\Delta i_{L2\_\mathrm{COT}}(t)=V_{\mathrm{M}}\left|\sin (\omega t)\right|T_{\mathrm{on}\_\mathrm{COT}}(\frac{1}{L_1}+\frac{1}{L_2})$$

(21)

where T_{on_COT} is the turn-on time of S₁ with COT control.

The average current flowing through D₁ during each switching period with COT control can be derived as

$$i_{D1\_\mathrm{AVG}\_\mathrm{COT}}(t)=\frac{i_{D1\_\mathrm{PK}\_\mathrm{COT}}(t)T_{\mathrm{d}\_\mathrm{COT}}(t)}{2T_{\mathrm{S}\_\mathrm{COT}}(t)}$$

(22)

where T_{d_COT}(t) and T_{S_COT}(t) is the forward bias time of diode D₁ and the switching period of COT control.

As the average current of diode D₁ is equal to the output current I_O in half line cycle, the output current I_O with traditional COT control can be given as

$$I_{\mathrm{O}}=\frac{1}{\pi }{\displaystyle {\int }_0^{\pi }{i}_{D1\_\mathrm{AVG}\_\mathrm{COT}}(t)d(\omega t)}=\frac{K_2{V}_{\mathrm{M}}{}^2{T}_{\mathrm{on}\_\mathrm{COT}}}{2\pi V_{\mathrm{O}}}(\frac{1}{L_1}+\frac{1}{L_2})$$

(23)

where

$$K_2={\displaystyle {\int }_0^{\pi }\frac{{\sin }^2(\omega t)}{(1+K_1\left|\sin (\omega t)\right|)}d(\omega t)}$$

(24)

From (9) and (23), the input current of COT control can be obtained as

$$i_{\mathrm{in}\_\mathrm{COT}}(t)=\frac{\pi V_{\mathrm{O}}{I}_{\mathrm{O}}\sin (\omega t)}{K_2{V}_{\mathrm{M}}\left(1+K_1\left|\sin (\omega t)\right|\right)}$$

(25)

In the same way, the input current of VOT control can be derived as

$$i_{\mathrm{in}\_\mathrm{VOT}}(t)=\frac{2V_{\mathrm{O}}{I}_{\mathrm{O}}\sin (\omega t)}{V_{\mathrm{M}}}$$

(26)

To conveniently compare the input currents of both control schemes, the normalized input currents with the base of (2V_OI_O)/V_M can be expressed as

$$i_{\mathrm{in}\_\mathrm{COT}}^{*}(t)=\frac{\pi \sin (\omega t)}{2K_2(1+K_1\left|\sin (\omega t)\right|)}$$

(27)

$$i_{\mathrm{in}\_\mathrm{VOT}}^{*}(t)=\sin (\omega t)$$

(28)

According to (27) and (28), Figure 5 shows both control schemes’ normalized input currents waveform with different K₁ in half-line cycles. Observing Figure 5, the input current of the VOT control scheme is in shape with sinusoidal, but the input current waveform of COT control deviates from sinusoid, especially when K₁ is large.

According to (25), the PF of COT control can be derived as

$$P{F}_{\mathrm{COT}}=\frac{\sqrt{2}{P}_{\mathrm{in}\_\mathrm{COT}}}{V_{\mathrm{M}}{I}_{\mathrm{in}\_\mathrm{RMS}\_\mathrm{COT}}}=\frac{\sqrt{2}{\displaystyle \underset{0}{\overset{\pi }{\int }}\frac{{\sin }^2(\omega t)}{1+K_1\left|\sin (\omega t)\right|}d(\omega t)}}{\sqrt{\pi }\sqrt{{\displaystyle \underset{0}{\overset{\pi }{\int }}{\left(\frac{\sin (\omega t)}{\left(1+K_1\left|\sin (\omega t)\right|\right)}\right)}^{2}dt}}}$$

(29)

According to (26), (29), and the circuit parameters listed in Table 1 of Section 5, the comparison of the PF of COT and VOT control schemes with the variation of input voltage can be depicted in Figure 6. Therefore, it can be known that compared with COT control, the SEPIC PFC converter operating BCM with the proposed VOT control scheme based on variable slope sawtooth generator can improve the PF and realize theoretical unity PF.

4.2. Comparison of Output Voltage Ripple

The instantaneous power imbalance between the output and input of the PFC converter leads to a double-line frequency ripple of output voltage [34]. By analyzing the circuit of Figure 2, the double line frequency output voltage ripple is produced by the second-order harmonic current of i_D1 flowing into output capacitor C₂.

According to the Fourier series formula, the second-order harmonic current’s magnitude of D₁ with COT control, $I_{D1\_\mathrm{COT}}^{2\mathrm{nd}}$, can be derived as

$$\begin{array}{l}{I}_{D1\_\mathrm{COT}}^{2\mathrm{nd}}=\left|\frac{2}{\pi }{\displaystyle {\int }_0^{\pi }{i}_{D1\_\mathrm{AVG}\_\mathrm{COT}}(t)\cos (2\omega t)d(\omega t)}\right|\\ =\frac{V_{\mathrm{M}}{}^2{T}_{\mathrm{on}\_\mathrm{COT}}}{\pi V_{\mathrm{O}}}(\frac{1}{L_1}+\frac{1}{L_2})\left|{\displaystyle {\int }_0^{\pi }\frac{{\sin }^2(\omega t)\cos (2\omega t)}{(1+K_1\left|\sin (\omega t)\right|)}d(\omega t)}\right|\\ =K_3{I}_{\mathrm{O}}\end{array}$$

(30)

where

$$K_3=\left|\frac{2{\displaystyle {\int }_0^{\pi }\frac{{\sin }^2(\omega t)}{(1+K_1\left|\sin (\omega t)\right|)}\cos (2\omega t)d(\omega t)}}{{\displaystyle {\int }_0^{\pi }\frac{{\sin }^2(\omega t)}{(1+K_1\left|\sin (\omega t)\right|)}d(\omega t)}}\right|$$

(31)

According to (23), (24), and (30), the output voltage ripple of COT can be derived as

$$\Delta V_{\mathrm{O}\_\mathrm{COT}}=\frac{I_{D1\_\mathrm{COT}}^{2\mathrm{nd}}}{2\pi f_{\mathrm{L}}{C}_2}=\frac{K_3{I}_{\mathrm{O}}}{2\pi f_{\mathrm{L}}{C}_2}$$

(32)

In the same way, the output voltage ripple of VOT can be presented as

$$\Delta V_{\mathrm{O}\_\mathrm{VOT}}=\frac{I_{\mathrm{O}}}{2\pi f_{\mathrm{L}}{C}_2}$$

(33)

According to (32), (33), and the key parameters listed in Table 1 of Section 5, the output voltage ripple of both control schemes with different input voltage can be plotted in Figure 7. It can be known that compared with COT control, the output voltage ripple with the VOT control scheme is slightly larger.

4.3. Comparison of Switching Frequency

From (23), the turn-on time of S₁ with COT control can be given as

$$T_{\mathrm{on}\_\mathrm{COT}}=\frac{2\pi I_{\mathrm{O}}{V}_{\mathrm{O}}}{K_2{V}_{\mathrm{M}}{}^2(\frac{1}{L_1}+\frac{1}{L_2})}$$

(34)

From (7) and (15), the switching frequency of COT can be derived as

$$f_{\mathrm{S}\_\mathrm{COT}}(t)=\frac{K_2{V}_{\mathrm{M}}{}^2}{2\pi V_{\mathrm{O}}{I}_{\mathrm{O}}(1+K_1\left|\sin (\omega t)\right|)}(\frac{1}{L_1}+\frac{1}{L_2})$$

(35)

In the same way, the turn-on time, and the switching frequency of S₁ of VOT control can be given respectively as

$$T_{\mathrm{on}\_\mathrm{VOT}}(t)=\frac{4V_{\mathrm{O}}{I}_{\mathrm{O}}(1+K_1\left|\sin (\omega t)\right|)}{V_{\mathrm{M}}{}^2(\frac{1}{L_1}+\frac{1}{L_2})}$$

(36)

$$f_{\mathrm{S}\_\mathrm{VOT}}(t)=\frac{V_{\mathrm{M}}{}^2}{4V_{\mathrm{O}}{I}_{\mathrm{O}}{(1+K_1\left|\sin (\omega t)\right|)}^2}(\frac{1}{L_1}+\frac{1}{L_2})$$

(37)

As the peak currents of the inductors L₁ and L₂ occur at ωt = π/2, it is important to analyze the switching frequencies of both control schemes at ωt = π/2 during designing both inductors L₁ and L₂. According to (35), (37), and the parameters listed in Table 1 of Section 5, the switching frequency of COT and VOT control at ωt = π/2 with the variation of RMS input voltage can be obtained in Figure 8.

From (35) and (37), with the base of $\frac{V_{\mathrm{M}}{}^2}{4V_{\mathrm{O}}{I}_{\mathrm{O}}}(\frac{1}{L_1}+\frac{1}{L_2})$, the normalized switching frequencies with both control schemes are derived as

$$f_{\mathrm{s}\_\mathrm{COT}}^{*}(t)=\frac{2K_2}{\pi (1+K_1\left|\sin (\omega t)\right|)}$$

(38)

$$f_{\mathrm{s}\_\mathrm{VOT}}^{*}(t)=\frac{1}{{(1+K_1\left|\sin (\omega t)\right|)}^2}$$

(39)

From (38) and (39), the normalized switching frequency variations curves with COT and VOT control schemes during half AC line period can be plotted in Figure 9.

Figure 8 shows that the switching frequency of both control schemes increases with the increase of the RMS value of input voltage at ωt = π/2. According to Figure 8 and Figure 9, with the same RMS input voltage, the switching frequency of VOT is lower than that of COT control when the transient input voltage is near the peak value, i.e., when ωt is π/2; the switching frequency of VOT is greater than that of COT when the transient input voltage is near the zero crossing. This is because the range of the VOT control’s switching frequency variation is wider than that of the COT control. Hence, compared with COT control, the cut-off frequency of the input low-pass filter of VOT control is lower. Moreover, to avoid extremely high switching frequency, both BCM SEPIC PFC converters with COT and VOT control schemes should limit the main power switch’s maximum switching frequency or minimum turning-off time.

4.4. Comparison of Peak Current of Main Switch

From the operation principle of SEPIC PFC converter operating in BCM, the peak currents of main switch S₁ and freewheeling diode D₁ are the same, so only the peak current of S₁ is analyzed in this section.

According to (1), (2), (5), (34), and (36), the peak currents flowing through main switch S₁ with COT and VOT control can be obtained as

$$i_{\mathrm{S}1\_\mathrm{PK}\_\mathrm{COT}}(t)=\frac{2\pi I_{\mathrm{O}}{V}_{\mathrm{O}}\left|\sin (\omega t)\right|}{K_2{V}_{\mathrm{M}}}$$

(40)

$$i_{\mathrm{S}1\_\mathrm{PK}\_\mathrm{VOT}}(t)=\frac{4I_{\mathrm{O}}{V}_{\mathrm{O}}\left|\sin (\omega t)\right|(1+K_1\sin (\omega t))}{V_{\mathrm{M}}}$$

(41)

For the PFC converter, the peak current flowing through the main power switch S₁ reaches a maximum when ωt is π/2. Therefore, according to (40), (41), and the key parameters listed in Table 1 of Section 5, the comparison of maximum peak currents flowing through S₁ with both control schemes under different RMS input voltage can be depicted in Figure 10.

According to (40) and (41), with the base of (4I_OV_O)/V_M, the peak current of main switch S₁ with COT and VOT control is normalized as

$$i_{\mathrm{S}1\_\mathrm{PK}\_\mathrm{COT}}^{*}(t)=\frac{\pi \left|\sin (\omega t)\right|}{2K_2}$$

(42)

$$i_{\mathrm{S}1\_\mathrm{PK}\_\mathrm{VOT}}^{*}(t)=\left|\sin (\omega t)\right|(1+K_1\left|\sin (\omega t)\right|)$$

(43)

According to (24), (42), and (43), the normalized peak current curve of S₁ of COT and VOT control during half AC line period is depicted in Figure 11. It is indicated that for the same RMS input voltage, compared with COT control, the peak current flowing through S₁ of VOT control is higher when the transient input voltage is close to the peak value, the peak current flowing through S₁ of VOT control is smaller when the transient input voltage is near zero crossing.

4.5. Comparison of RMS Current of Main Switch

According to (1), (2), (5), (7), and (34)–(37), the RMS current of S₁ with COT and VOT control can be obtained as

$$I_{\mathrm{S}1\_\mathrm{RMS}\_\mathrm{COT}}=\sqrt{\frac{1}{\pi }{\displaystyle \underset{0}{\overset{\pi }{\int }}\frac{{\displaystyle \underset{0}{\overset{T_{\mathrm{on}\_\mathrm{COT}}}{\int }}{(V_{\mathrm{M}}\left|\sin (\omega t)\right|(\frac{1}{L_1}+\frac{1}{L_2})u)}^{2}du}}{T_{\mathrm{S}\_\mathrm{COT}}(t)}d\omega t}}=\frac{2I_{\mathrm{O}}{V}_{\mathrm{O}}}{V_{\mathrm{M}}}\sqrt{\frac{\pi }{3K_2}}$$

(44)

$$I_{\mathrm{S}1\_\mathrm{RMS}\_\mathrm{VOT}}=\frac{4V_{\mathrm{O}}{I}_{\mathrm{O}}}{V_{\mathrm{M}}}\sqrt{\frac{{\displaystyle \underset{0}{\overset{\pi }{\int }}(1+K_1\left|\sin (\omega t)\right|){\sin }^2(\omega t)d\omega t}}{3\pi }}$$

(45)

From (44), (45), and the key parameters listed in Table 1 of Section 5, the comparison of RMS currents of the main power switch with COT and VOT control under different RMS input voltages is given in Figure 12. Figure 12 shows that the RMS currents flowing through the main power switch with both control schemes are almost the same.

As mentioned above, when the instantaneous input voltage approaches the magnitude, the peak current flowing through S₁ of COT control is smaller than that of VOT control, but the switching frequency of COT control is higher than that of VOT control; when the instantaneous input voltage approaches zero crossing point, the switching frequency of VOT control is higher than that of COT control, but the peak current of S₁ of VOT control is smaller than that of COT control. Moreover, the RMS current of S₁ of both control schemes is almost the same. Consequently, the power loss, including conduction loss and switching loss of the main power switch of both COT and VOT control, should be almost the same, and the efficiency of both control schemes should be almost the same.

5. Analysis of Simulation and Experimental Results

5.1. Analysis of Simulation Results

With the use of PSIM software, a simulation environment for power conversion and motor control, a computer simulation model shown in Figure 13 is designed to evaluate whether the VOT control of the SEPIC PFC converter operating at BCM is feasible. The specification and key circuit parameters are shown in Table 1. The differential probes are put at the AC input voltage terminal, and the output load terminal and the current probe are put in a series of AC input sources. After the RUN simulation model with PSIM, as shown in Figure 13, the simulation waveforms of input voltage, input current, and output voltage can be presented in Simview’s waveform windows of PSIM.

Table 1. Key Circuit Parameters.

Key Parameters	VOT and COT
AC Input Voltage Range Vin_RMS	90–265 V
Output Voltage VO	100 V
Line Frequency fL	50 Hz
Rated Output Current IO	1 A
Output Filter Capacitor CO	680 μF
Middle capacitor C1	1 μF
Inductor L1	800 μH
Inductor L2	300 μH
Main switch S1	FCPF190N60
Freewheeling diode D1	RHRP1560

Table 1. Key Circuit Parameters.

Key Parameters	VOT and COT
AC Input Voltage Range Vin_RMS	90–265 V
Output Voltage VO	100 V
Line Frequency fL	50 Hz
Rated Output Current IO	1 A
Output Filter Capacitor CO	680 μF
Middle capacitor C1	1 μF
Inductor L1	800 μH
Inductor L2	300 μH
Main switch S1	FCPF190N60
Freewheeling diode D1	RHRP1560

Figure 14 gives the simulation waveforms of output voltage, input voltage, and input current at rated load current with 110 Vac and 220 Vac input voltage. As the simulation data indicates, the PF of COT with 110 Vac and 220 Vac is 0.991 and 0.977, respectively, while the PF of VOT with 110 Vac and 220 Vac is 0.999 and 0.995. The THD of COT when operating at 110 Vac and 220 Vac is 13.5% and 19.5%, respectively, while the THD of VOT when operating at 110 Vac and 220 Vac is 2.2% and 4.3%, respectively. The simulation results show that the input current of VOT is closer to the ideal sine-wave than that of COT, the THD of VOT is smaller than COT control, and the output voltage ripple of VOT is just a little larger than that of COT. The simulation results match the theoretical analysis results.

5.2. Experimental Results

The experimental verifications of both COT and VOT control methods are performed to prove the feasibility of the suggested VOT control for BCM SEPIC PFC converter and the theoretical performance comparison analysis results of both control schemes. The major parameters and specifications of the experimental board are shown in Table 1. The experimental prototype and platform are shown in Figure 15 and Figure 16, respectively. The block diagram of the experimental platform is presented in Figure 17. In the experimental platform, the programmable AC source Chroma 61602 provides an AC input voltage source to the BCM SEPIC PFC converter, the programmable electronic load Chroma 6314 A and 63,115 A provides the adjustable load for the SEPIC PFC converter, the power analyzer Yokogawa WT1800 measures the PF, THD, input current harmonic, and input power, the digital oscilloscope DPO3014 and its current and voltage probes measure voltage and current waveform of the SEPIC PFC converter, network analyzer Bode100 is used to test the loop stability of the converter.

The experimental comparison waveforms, including input current, output voltage with 110 Vac and 220 Vac input voltage and rated load, are shown in Figure 18a–d. The experimental comparison waveforms with 0.1 A and 0.5 A output load and 110 Vac input voltage are shown in Figure 19a–d. The input current waveforms of VOT control are more sinusoidal and nearly ideal sine-wave when compared to that of COT control, particularly with higher output power. With the rated load current, the output voltage ripple ΔV_O of COT and VOT control with 110 Vac input voltage is 4 V and 4.6 V, respectively, ΔV_O of COT and VOT control with 220 Vac input voltage is 3.8 V and 4.6 V, respectively, ΔV_O of COT control is slightly smaller than that of VOT control, which is the same as the analysis result of Figure 7 and simulation result of Figure 14.

Figure 20a–d show the experimental waveforms of the sawtooth waveform v_Saw, the control voltage v_C3 of the VCCS, the rectified input voltage v_REC, and gate driver signal v_g of a main switch for the proposed VOT control with 110 Vac input voltage and rated output current. Figure 20b–d is the zoom-in waveforms of Figure 20a at different transient rectified input voltage. Comparing with Figure 20b–d, it can be known that with the transient rectified input voltage decreasing from peak to valley, the control voltage v_C3 of the VCCS and the slope of the sawtooth generator increase, the turn-on time of S₁ decreases, which is the same as the analysis result in Figure 4.

Figure 21 and Figure 22 show both inductor currents i_L1 and i_L2, the rectified input voltage v_REC, and gate driver signal v_g of the main switch of COT and VOT control with 110 Vac input voltage and rated output current. According to Figure 21b,c, it can be shown that the turn-on time of the main power switch S₁ of COT control with different transient rectified input voltage is maintained at 8.8 μS. However, from Figure 22b,c, it can be shown that the turn-on time values of S₁ of the proposed VOT control are 9.6 μS and 6.6 μS near the peak of the transient rectified input voltage and the zero-cross point of the input voltage, respectively. Therefore, it is verified that the turn-on time of S₁ of COT control maintains constant, but the turn-on time of S₁ of VOT control reduces with the transient rectified input voltage decreasing.

Figure 21b and Figure 22b show that the switching frequencies of COT and VOT control at ωt = π/2 are 44.5 kHz and 42 kHz, respectively, almost the same as the analysis result of (35), (37) and Figure 8. Figure 21c and Figure 22c show that the switching frequencies of COT and VOT control with 50 V transient rectified input voltage are 75.2 kHz and 91.7 kHz, respectively. Therefore, compared with COT control, the switching frequency of VOT control is lower when ωt is π/2, and the switching frequency of VOT control is higher when ωt is near zero, which is the same as the analysis result of Figure 9.

Figure 21b and Figure 22b also show that the maximum peak currents of S₁ of COT and VOT control are 6.4 A and 7.3 A, respectively. Experimental results prove that the maximum peak currents of S₁ of VOT control are slightly bigger than that of COT control, which almost matches the analysis result in Figure 10.

Figure 23 shows the experimental waveforms of the rectified input voltage v_REC, L₁ inductor current i_L1, and L₁ inductor voltage v_L1 with VOT control at 110 Vac input voltage and rated output current. Figure 24 shows the experimental waveforms of the rectified input voltage v_REC, L₂ inductor current i_L2, and L₂ inductor voltage v_L2 with VOT control at 110 Vac input voltage and rated output current. From Figure 23 and Figure 24, when the rectified input voltage is near 155 V and 50 V, the inductors’ L₁ and L₂ voltage is also around 155 V and 50 V, respectively. While S₁ is switched on, the voltage of inductors L₁ and L₂ always maintain 100 V during S₁ is turned off. Therefore, Figure 23 and Figure 24 can verify that the voltage of both inductors L₁ and L₂ are equal to the rectified input voltage when S₁ is switched on, the voltage of both inductor L₁ and L₂ are equal to output voltage when S₁ is turned off during the whole line period, which is the same as the operation theory analysis.

The bode diagram of the closed-loop gain of the whole system with the controller can be used to judge the stability of the PFC converter [40,41]. To analyze the stability, the bode diagram of the closed-loop gain of the SEPIC PFC prototype operating in BCM with VOT control is tested by network analyzer Bode 100. The loop gain test result with 110 Vac input voltage and rated output current load is shown in Figure 25. For the PFC converter, the bandwidth should be lower than 20 Hz. Otherwise, the twice-line frequency 100 Hz output voltage ripple will be coupled into the voltage control loop. As a result, the input current control signal becomes distorted, creating a third harmonic current in the input current [34,37,42]. The phase margin of the power converter should be bigger than 45° to ensure the converter’s stability [41,42,43,44]. According to Figure 25, it can be observed that the bandwidths, which is the frequency of 0 dB gain magnitude and the phase margin of the whole loop, which is the phase of 0 dB gain magnitude, are 13.26 Hz and around 90° respectively, so the proposed prototype can work stably.

To verify the performance with the variation of different input voltage, the experimental comparison results of efficiency, PF, and THD with COT and VOT control at 90~265 Vac input voltage and rated 1 A output current are presented in Figure 26. To verify the performance with the different load currents, the experimental comparison results of efficiency, PF, and THD of COT and VOT control with 110 Vac input voltage and 0.1~1 A output current are shown in Figure 27. From both figures, it can be shown that the PF of VOT control is higher than that of COT control, THD of VOT control is lower than that of COT control over the entire input voltage range and output load current range. Especially with higher output current load, the proposed VOT control scheme can almost achieve unity PF. From the above experimental data, the PF of the VOT control is enhanced significantly, the THD of the VOT control is reduced remarkably, and the efficiency of both controls is almost the same. Therefore, compared to COT control, VOT control enhances the performance of PF and THD without reducing efficiency.

The comparison results of IEC61000-3-2 Class C requirements and the input current harmonic of both control schemes with a rated output current, 110 Vac and 220 Vac input voltage, are shown in Figure 28. It shows that the input current harmonic of VOT control is lower than that of COT control. Although both control schemes can meet the harmonic standard limit of IEC61000-3-2 Class C, the VOT control scheme will be easier to meet the applications with stricter input current harmonic requirements.

6. Conclusions

To enhance the PF and decrease the THD of SEPIC PFC converter operating in BCM, a novel VOT control scheme which can almost realize unity PF is proposed. This novel VOT control scheme doesn’t need input voltage feedforward and multiplier circuits required by many PFC control strategies. The proposed VOT control scheme uses a simple and easy-to-implement variable slope sawtooth generator whose slope is controlled by the duty cycle of the main switch to modulate the turn-on time of the main switch. Based on performance analysis, simulation, and experiment comparison results of the 100 W prototype, it is verified that the proposed VOT control scheme with variable slope sawtooth generator remarkably enhances the performance of PF and THD without affecting the efficiency by contrast with the conventional COT control.