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Article

Hardware and Software Design of Programmable Medium and High-Speed Data Acquisition (DAQ) Board of Fiber Optic Signal for Partial Discharge Acquisition

1
The Higher Educational Key Laboratory for Measuring & Control Technology and Instrumentations of Heilongjiang Province, Harbin University of Science and Technology, Harbin 150080, China
2
Key Laboratory of Engineering Dielectrics and Its Application, Ministry of Education, Heilongjiang Provincial Key Laboratory of Dielectric Engineering, School of Electrical and Electronic Engineering, Harbin University of Science and Technology, Harbin 150080, China
*
Author to whom correspondence should be addressed.
Electronics 2024, 13(11), 2176; https://doi.org/10.3390/electronics13112176
Submission received: 7 May 2024 / Revised: 29 May 2024 / Accepted: 30 May 2024 / Published: 3 June 2024
(This article belongs to the Section Circuit and Signal Processing)

Abstract

:
The anti-electromagnetic interference capability of partial discharge (PD) acoustic signal conversion and collection circuits severely restrict the sensitivity of PD detection. The data acquisition (DAQ) systems available in the current market are costly and have limited functionality, making it difficult to satisfy the acquisition requirements for PD detection. This paper proposes a medium to high-speed fiber optic signal acquisition board with an adjustably controlled sampling rate and filter cutoff frequency. The circuit achieves a higher signal-to-noise (SNR) ratio by distributing the noise in each part of the signal acquisition chain reasonably. The temperature characteristics of the acquisition module are improved by utilizing the programmable T-type structure for transimpedance amplification of photocurrent. The DAQ card performs data acquisition and processing using STM32H743 internal ADC and caches data in bulk with an SRAM and SD card. A data uploading method based on time reference has been proposed, which enables full, effective information signal upload through a low-cost transmission interface. The research ultimately achieves a stable sampling of three channels at 1 MSps, SNR of 63 dB, and programmable gain amplification of the photocurrent with 0–60 dB. Finally, the system is used for PD acoustic signal acquisition in the frequency range of 20 Hz to 100 kHz.

1. Introduction

With the continuous development of the current power system, higher requirements have been needed to monitor the operating status of high voltages in the power grid. During the operation of the power system, most parts are often integrated inside the switchgear, such as vacuum circuit breakers, current transformers, other auxiliary switches, and so on. At the same time, inappropriate installation, manufacturing defects, and frequent switching can lead to gradual increases in the insulation fault rate of the gas-insulated switchgear (GIS) [1,2,3]. Inside the GIS, the electric field strength of the defects increases because of the bubbles in the dielectric metal particles in the chamber, and spike of the conductor. Partial discharge is generated when the portion of the insulation cannot withstand the electric field applied to it, which causes safety accidents [4,5]. Therefore, the generation of a partial discharge is often used as an important pre-warning sign of insulation fault. If the partial discharge signal can be detected early in the insulation fault process, it can minimize economic losses and the possibility of injury [6].
At present, the detection methods applied to different signals caused by partial discharge mainly include the following: the pulse current method, the ultra-high frequency detection method, and the acoustic measurement method. Specifically, the pulse current method equates the discharge position to a coupling capacitor. When partial discharge occurs, the voltage across the coupling capacitor drops abruptly. At this time, partial discharge can be detected by measuring the voltage pulse generated by the discharge current flowing through an impedance [7,8]. This method is mainly used to detect voltage signals within 10 MHz with a high detection accuracy, but it is susceptible to electromagnetic interference. Meanwhile, it is hard to meet the current measurement requirement because the measuring sensitivity decreases as the value of capacitance increases. The ultra-high frequency detection method is mainly used to detect high-frequency electromagnetic interference signals generated by partial discharge. The electromagnetic interference signal needs to be captured by a microstrip antenna (MSA) since its frequency band is mainly distributed around 100 MHz. However, the production of MSA requires high-tech difficulties and high costs, which make it more difficult to apply in practical engineering applications [9]. In addition to generating electrical signals, the ultrasonic signal is also generated during the partial discharge generation. Compared to electrical measure methods, acoustic detection methods using optical fibers as the sensor have stronger anti-electromagnetic interference capabilities due to their complete passivity [10]. The internal scattering light within the fibers is modulated when the optical fiber is deformed by the pressure of the ultrasonic signals. The physical parameters caused by the change in optical fiber characteristics can be measured by the output light intensity [11]. The measurement structure is shown in Figure 1. Therefore, the acoustic measurement method using optical fiber as a sensing device has the advantages of electromagnetic interference shielding, lightweight design, easy deployment, and low cost, making it highly suitable for partial discharge detection in GIS equipment.
The optical power of the modulated backscattered light is very weak after attenuating [12]. The range of current signal captured by a photodiode is between μA and mA. Therefore, the signal acquisition system should be designed to provide sufficient multiple magnifications; moreover, measurement bandwidth and signal processing structure for modulated optical signals should be provided as well. The ultra-high-speed sampling rate of optical signal acquisition systems, such as radar information, often starts at tens of GHz [13], which is too redundant for industrial signal acquisition applications such as optical fiber sensing for partial discharge acquisition. At present, for optical fiber signals within the range of medium and high-frequency fluctuations, the main structure of the optical fiber signal acquisition utilizes the trans-impedance amplifier (TIA) module to convert the optical current signal into a voltage signal and then send it to the oscilloscope [14]. However, restricted by the fixability volume of the oscilloscope, this measure structure cannot filter out interference signals immediately and has poor portability for measurement.
Currently, most DAQ boards are designed for voltage signal acquisition. The hardware modules introduced by National Instruments can connect to USB, PCI, and Ethernet for measurement areas such as temperature, strain, and common voltage. In 2023, Pan and others designed a multi-channel vibration signal acquisition and fault diagnosis system based on STM32H753 [15]. However, the sampling rate of the acquisition board is also at a low-speed level, which can only satisfy the general civilian measurement requirement and has significant room for improvement. In 2024, Roberto De Fazio and others designed a vibration signal acquisition platform using STM32F4 MCU and external ADCs [16], but it only has two channels and cannot satisfy the multi-channel signal acquisition requirement. All of the above mainstream acquisition boards are designed for voltage signals. Traditional industrial acquisition boards mostly use optical fiber sensing to detect low-frequency changes in signals, such as temperature and low-frequency vibrations. The information contained therein can be satisfied with sampling rates ranging from tens to hundreds of kHz [17]. In 2021, Shuyan Sun and others designed a vibration monitoring system based on optical fiber sensing [18]; the system’s optical path is designed based on Mach–Zehnder (MZ) interference technology with a sampling frequency of 200 kHz. In 2024, the Chenxi Li team designed a fiber-optic acoustic sensing system used for vibration and voice monitoring and an acquisition system sampling rate up to 20 kHz [19]. Due to the rapid development of optical fiber sensors in recent years, the application of optical fibers as a signal sensor for partial discharge signal measurement has gradually entered the field of scientific research [20]. However, there is still a gap in the low-cost acquisition board for optical fiber signals, such as high-speed vibration signals like partial discharges. For MHz high-frequency optical signal acquisition boards, an advanced TIA module is still needed as a conversion medium from the optical current to the voltage signals, and these modules are often expensive. The cost-effectiveness is not high, and this leads to difficulties in the selection of small and medium-sized enterprises.
For manufacturers of TIA modules, the price of fixed-gain single-channel detectors is generally around USD 150, while the adjustable-gain TIA module costs around USD 2000, and the price of megahertz optoelectronic detectors is around USD 4000. Therefore, MHz optical general-purpose DAQ boards have not entered the field of industrial acquisition of optical fiber signals. Using expensive TIA modules produced by top companies requires high costs and is not conducive to civilian and commercial promotion. Meanwhile, the fixed hardware and firmware parameters lack customized processing for specific signals.
Based on the above problems, this paper proposes a design scheme of optical fiber signal DAQ boards with low cost, functional integration, flexible modification, and customizable parameters. It consists of high-bandwidth operational amplifiers, high-precision resistors, and MCU internal ADCs and is equipped with SRAM and SD cards for data caching. The acquisition command can be triggered from the host computer or automatic trigger mode. The acquisition board can perform seven levels of programmable amplification automatically from 0–60 dB to match the mainstream commercial photodiodes. Moreover, the maximum sampling acquisition speed is 1 MSps per channel, which can further compress the sampling rate through the oversampling method to provide higher performance acquisition conditions for analyzing the optical fiber signal information, such as temperature and vibration.

2. Architecture of the Acquisition Board

The structure of the acquisition board is composed of a programmed T-type amplifying circuit, programmed bias voltage circuit, filter circuit, ADC driving circuit, data processing memory, and communication circuit. Acquisition mode can be selected to trigger the acquisition or time-based signal acquisition.
The programmable T-type amplifying circuit consists of an ADA4898 operational amplifier, MOSFETs, and a programmable analog switch. When the selected photodiode is connected, it is used to amplify the incoming photocurrent within a range of 4 μA–4 mA, and the bias voltage applied at the same time can be set by itself according to different photodiodes. A protective circuit is included in each acquisition signal channel to prevent circuit breakdown caused by a burst voltage. The filter circuit consists of a fourth-order low-pass Chebyshev filter designed by operational amplifier AD8606 and a first-order passive high-pass filter circuit. The converted voltage signal is connected to the ADC as a differential signal via a band-pass filter with customized parameters and an anti-aliasing filter circuit. After the MCU releases the start acquisition command, the incoming analog signal is digitized by the MCU’s internal ADC resources. For different acquisition modes, caching operations with varying sampling requirements can be conducted using the SRAM or SD card. After the acquisition, the MCU uploads the valid data. In addition, the MCU communicates with the PC via a USB interface and can also access the Bluetooth module via a serial port for wireless transmission communication. In addition, the power management network provides the supply voltage for the entire acquisition card circuit, which generates the following circuit, +3.3 V, +5 V, −5 V, +6 V, −6 V, +32 V, +30 V, via a voltage stabilized chip cascade. An internal comparator embedded within the MCU enables the external trigger acquisition or the conversion of the time-based synchronization signal into an interrupt signal, serving as a reference for command generation by the MCU. The remaining pins of the MCU are allocated for connecting LEDs, a beeper, and other cueing devices, thus providing external acousto-optic indications for the acquisition board. The comprehensive block diagram of the fiber optic signal acquisition board card is illustrated in Figure 2.

2.1. Analysis of Noise Introduced into a Signal Link

In circuit design, noise analysis serves to assess whether the signal acquisition link exhibits a sufficiently low noise floor to accommodate the capture of small target signals. The signal link of the acquisition can be divided into the protection circuit, photoelectric gain conversion circuit, filter circuit, analog-to-digital conversion circuit, and ADC drive circuit. A simplified signal link structure diagram is shown in Figure 3.
The noise in the protective circuit is primarily due to thermal noise generated by the resistance, whose value is small. It can be ignored because of its lack of significance.
When normalized, the entire input signal is,
U i n ¯ = 1 ,
the relative noise contribution of ADC can be expressed as [21]:
e a d c = 1 10 S N R A D C 20 ,
The gain error caused by an electro-optical gain conversion circuit is mainly determined by the noise spectral density (NSD), gain (G), and the equivalent noise bandwidth (ENB), whose noise contribution can be expressed as:
e g a i n = NSD G ENB ,
The noise contributed by the active filter circuit can be expressed as [22]:
e f i l t e r = 4 k T R f ENB ,
The total amount of system output noise can be expressed by the following formula, which is derived from the root-sum-squares of the noise contributed by each component.
e s u m = ( e a d c ) 2 + ( e g a i n ) 2 + ( e f i l t e r ) 2 ,
In order to accurately reflect the frequency characteristics of the signal to be measured in the measurement system, the ADC sampling frequency fs and bandwidth fb of the signal to be measured need to satisfy the Nyquist theorem to guarantee the integrity of the sampled signal. If the following relationships are satisfied:
f s 2 f b ,
the sampled signal frequency may be considered undistorted. When sampling the signal to be measured with an N-bit ADC, the quantization step can be expressed by the following formula.
Δ = V r e f 2 N ,
The system measurement error e can be seen as white noise with uniformly distributed amplitudes in the range of Δ 2 , Δ 2 , and the normalized probability distribution function can be expressed as:
p ( e ) = 1 Δ Δ 2 e Δ 2 0 e Δ 2 , e Δ 2 ,
Thus, the power spectral density of the quantized noise, in the frequency range of 0 , f b , can be expressed as:
P S D = e r m s 2 f b = + e 2 p ( e ) d e 2 f s / 2 = Δ 2 6 f s ,
where fs is the sampling frequency, and erms is the RMS error voltage. The OSR is a characterization quantity that measures the degree of oversampling of a measurement system, which can be defined as follows:
O S R = f s 2 f b ,
Then, the noise power falling from the input signal band can be expressed as:
P n = 0 f b P S D 2 d f = Δ 2 12 O S R ,
The maximum signal that an N-bit ADC can measure has a valid value of:
V r m s = V p p 2 2 = 2 N 1 2 2 2 N V r e f ,
The signal-to-noise ratio (SNR) is a key parameter that is used to measure the strength of the signal relative to the noise. Specifically, SNR represents the ratio of the power of the useful signal to the power of the noise [23], which can be expressed in decibels (dB).
S N R = 10 log P s i g n a l P n o i s e ,
The SNR of the signal acquired by N-bit ADC within the bandwidth to be tested can be expressed as:
S N R = 10 log V r m s 2 / 2 P ( n ) = 10 log 3 ( 2 N 1 ) 2 O S R 2 ,
After organizing it using the log transform, we can obtain the relationship of SNR with LSB and the oversampling rate:
S N R = 6.02 N + 1.76   dB + 3 log 2 ( O S R ) ,
Therefore, when the quantized noise power remains constant, the unilateral power spectral density of the quantized noise will decrease with the increasing sampling rate fs. Every double oversampling produces 3 dB of noise suppression, which can improve the signal-to-noise ratio of the measurement system. The Stm32h743 has three 16-bit ADCs built into it. In this paper, 12-bit acquisition is used to meet the fiber signal demodulation requirements. Without oversampling, the signal-to-noise ratio of the quantized ADC can be calculated by Formula (16).
S N R A D C = 6.02 12 + 1.76 72   dB ,
In practical circuit design, the main sources of system noise are power supply noise, resistor thermal noise, and operational amplifier noise. The power supply rejection ratio (PSRR) reflects the ability of the IC to attenuate power supply noise within a certain frequency range and can generally be expressed by the following formula [24]:
PSRR = 20 log ( A in A e ) ,
In the formula, Ain is the amplitude of the signal coupled by the input power pin, and Ae is the amplitude of the spurious signal caused by the injected ripple. By judging the PSRR of different ICs, the noise component contributed by the power supply can be obtained. The resistance thermal noise belongs to its intrinsic noise and cannot be eliminated, which is only related to its own manufacturing process. The noise of operational amplifiers mainly manifests in the input voltage noise level and input current noise, which can be provided from the datasheet.
If the noise contribution is divided evenly over the entire acquisition link, the noise contribution from each section of the output can be calculated as follows:
e ¯ = 1 10 72 20 = 2.5 × 10 4 ,
The overall signal link output noise calculation result is:
e o = 3 e ¯ = 4.33 × 10 4 ,
The signal-to-noise ratio can be obtained as:
S N R = 20 log ( 1 4.33 × 10 4 ) 67.27   dB ,
Therefore, the signal link SNR can be controlled at about 67 dB by choosing the controller parameters reasonably, which can meet the requirements of partial discharge signal measurement.

2.2. Design of Programmed T-Type Circuit with Temperature Drift Suppression

The input range of the current signal converted from the demodulated optical signal via a photodiode is limited to 4 μA to 4 mA. Then, the converted current signal is I/V amplified to improve the measured dynamic range of the signal. The input signal IIN is loaded at the antiphase input of the operational amplifier. Due to the virtual short nature of an ideal operational amplifier, the voltage drop at the output is generated by the input current through the resistance R0. The operational relationship between the output voltage and the input current is expressed as follows:
V out I in = R 0 ,
As can be seen from Equation (21), the I/V amplification depends on the nominal value of the gain resistance R0. Different magnifications can be achieved by changing the value of R0. The stability of the circuit gain in a transimpedance amplifier circuit is closely related to the selection of components. Resistors are essential electronic components; their values may not be constant because of the variable environment. Apart from the inherent manufacturing precision, the other characteristic parameter that affects resistance accuracy is the temperature coefficient of resistance (TCR), which is measured in parts per million (ppm). Its definition can be expressed as follows:
T C R ¯ = R 2 R 1 R 1 × ( T 2 T 1 ) = Δ R R 1 × Δ T ,
R 1 = R 0 + ε 1 ,
R 2 = R 0 + ε 2 ,
In the above equations, R0 represents the resistance value at standard temperature, R1 represents the resistance value at temperature t1, R2 represents the resistance value at temperature t2, and ɛi represents the resistance value error at the current temperature.
Therefore, Equation (5) represents a positive correlation between the resistance value error and the standard resistance value. As the resistance value increases, the temperature drift error also increases accordingly.
ε = R 0 T C R ¯ × Δ T R 0 ,
Since the ADC can only acquire voltage signals, a current-to-voltage converter needs to be designed to convert the current signal, which is generated by the photodiode, from the light signal. If only a single resistor is used, the value of the maximum gain resistor can reach several megaohms, which can cause the gain to fluctuate unstably.
Therefore, a T-type feedback network is used to amplify the input signal, aiming to reduce the gain error caused by the temperature drift of large resistances. The schematic diagram of the circuit is shown in Figure 4.
The circuit is constructed using the ADA4898-2 operational amplifier, whose low input bias current and 65 MHz high-speed bandwidth are suitable for high-speed optoelectronic signal acquisition. The MOSFET gate is connected to the analog switch input, fixing the resistance values at both ends of the T-type structure. The microcontroller unit (MCU) controls the analog switch selection of the third terminal resistor RX via GPIO, achieving resistance variation in the T-type resistor network in the gain amplification circuit. The relationship for circuit gain calculation is given by Equation (6):
A i = V o u t I i n = R A 6 + R A 7 + R A 6 × R A 7 R X ,
In this structure, the value of the resistance selected is lower than the megaohms but can generate the same magnification. The gain drift generated at this point can be expressed as follows:
Δ A t = R A 6 × T C R 1 × Δ T + R A 7 × T C R 2 × Δ T + R A 6 × T C R 1 × R A 7 × T C R 2 × Δ T 2 R X × T C R 3 × Δ T ,
When the maximum value Rmax of all resistance is taken, the minimum suppression of the gain change at the same TCR can be expressed as:
Δ A t Δ A n o r m a l = 3 R max R n o r m a l < 1 ,
When the input optoelectronic current signal is limited to the range of 4 uA to 4 mA, setting the resistor RX to 470 Ω, 110 Ω, 33 Ω, 10 Ω, or 3.3 Ω, shorting or opening the channel, adjusts the gain to 0 dB, 10 dB, 20 dB, 30 dB, 40 dB, 50 dB, or 60 dB, respectively. The circuit simulation and analysis outcome using Multisim are depicted in Figure 5. Figure 6 illustrates the input–output relationship of the designed programmable gain amplifier circuit and the available gain amplification levels within each input range. These can be used to assess the effectiveness of gain variation in the circuit and the degree of phase distortion.
Applying reverse bias voltage to the photodiode can widen its depletion region, resulting in faster response times and higher sensitivity in the photovoltaic mode. The biased gain amplification circuit, which is shown in Figure 7, utilizes the MAX44246 operational amplifier to amplify the output DACO of the STM32H743’s internal DAC, which has a 12-bit resolution. This circuit obtains its desired functionality through a fixed two-stage gain amplification, enabling the output of the VPD bias voltage to range from 0 to 30 V.
Additionally, the signal acquisition board proposed in this paper provides sufficient protection units to prevent overload voltage to the circuit board. For example, by connecting a switch diode BAV199 to the in-phase and antiphase ends of the amplifier, sufficient protection is provided to the input of the circuit board. When the circuit is in the normal state, due to the virtual short characteristic of the operational amplifier, both the V+ and V− voltages are at the ground potential, and the BAV199 diodes do not conduct. In practical application scenarios, the operator may incorrectly connect the direction of the photodiode. When the photodiode is in the conducting state under the applied bias voltage, the bias voltage is directly connected to the input of the operational amplifier. Currently, the switch diode regulates the input voltage to the forward voltage of 0.9 V immediately, providing overvoltage protection for the circuit. Meanwhile, the operational amplifier and other electronic components may exhibit anomalies, leading to exceptional output voltages and consequently causing current overload in high-voltage electromagnetic environments. Therefore, a self-recovery fuse is connected to the output terminal, with a resistance wire limiting the current up to 30 mA. When the output circuit is over 30 mA, the resistance wire enters a high-resistance state to limit the current. After the overload current disappears, it automatically returns to a low-resistance working state.

2.3. Design of Customized Signal Filtering Circuit

Because the high-energy portion of the partial discharge acoustic signals mainly distributes around 20 Hz to 300 kHz, it is necessary to preprocess the useful frequency part of the input signal. The interference signal is limited by using a band-pass filter to highlight the useful frequency characteristics of the partial discharge signal. The band-pass filter is designed with a high-pass filter and a low-pass filter. The high-pass section is a simple first-order passive high-pass filter, whose −3 dB expression for the high-pass filter is as follows:
f c = 1 2 π R C ,
The low-pass section adopts an active low-pass filter design by using two operational amplifiers, which have low noise and wide bandwidth. There are three typical types of active filters: Butterworth, Bessel, and Chebyshev. The Butterworth filter has the maximum flatness, the Bessel filter has constant group delay with no overshoot pulse, and the Chebyshev filter has the fastest roll-off rate. Considering practical requirements and better suppression of high-frequency noise, the Chebyshev filter circuit is selected to make a narrower transition band. Its transfer function is as follows:
V O U T V I N = A O a 0 + a 1 s + a 2 s 2 + + a n 1 s n 1 + s n ,
Given engineering situations, increasing the number of poles can make a narrower transition band but may also cause oscillations. Considering these factors, a fourth-order Chebyshev low-pass filter was chosen to limit the unexpected high-frequency signal. The filter is designed using the filter design wizard provided by ADI, which has a mid-frequency gain of Am = 1 and a −3 dB cutoff frequency of fc = 300 kHz. The accuracy of 0.1% resistors and capacitors with a tolerance of 5% are selected for the filter’s construction, and the operational amplifier used is OPA2227. The filter has been simulated through the Multisim software, and the schematic diagram of the design and the corresponding simulation results are shown in Figure 8 and Figure 9.

2.4. Design of ADC Drive Circuit

The conditioned photocurrent signal already contains the effective information of the acquired signal. The ADC is used to convert the analog signal into a digital signal, which can be processed by the microcontroller. The STM32H743 microcontroller is selected as the data processing platform. The MCU is chosen because it is equipped with three built-in ADCs, capable of a maximum sampling rate of 1.9 MSps. By appropriately configuring the hardware circuit design and employing time-division multiplexing techniques, it is possible to achieve synchronized sampling across three channels, extending to more than 16 channels with near-simultaneous sampling. This design significantly reduces the hardware costs associated with external ADCs.
When signals are transmitted in differential form, the common-mode noise remains consistent on both lines and can, therefore, be eliminated after the differential. The ADC reference design uses a high-precision voltage reference chip combined with an inverting operational amplifier circuit. The basic reference voltage is derived from a 0.05% accuracy voltage reference chip. This reference voltage is fixedly amplified to 3.3 V and then provided to the ADC by enhancing the driving capability with a transistor. Next, it undergoes a second-stage voltage division, then amplified to 1.66 V. The 1.66 V is the median reference voltage (VCOM) for ADC sampling. Therefore, to configure the ADC in differential mode, it is necessary to convert the output voltage from the filter circuit into a differential signal with equal amplitude and opposite phase in order to suppress the link noise better. The output of the differential circuit should satisfy the following equation:
V o u t + = 1.66 + 0.5 V i n ,
V o u t = 1.66 0.5 V i n ,
The ADC drive circuit is used by high-precision resistors from the same batch with a tolerance of 0.1% and two amplifiers. The circuit utilizes 1.66 V as the midpoint to fix the differential input signal. The circuit is simulated with Multisim; its schematic diagram is shown in Figure 10, and Figure 11 illustrates the simulation results of the single-to-differential signal processing.

2.5. Method of Partial Discharge Data Uploading Based on Time Reference

A large amount of data was generated and acquired by the ADC due to high-speed sampling. This data need to be transferred to a computer for analysis. Because of the burst characteristic in the time domain, the partial discharge signal does not persist continuously for the entire sampling time. Consequently, there is redundant background noise in the sampling data, which contain a lot of invalid information. These redundant data place heavy pressure on transmission and increase the costs of hardware. If using continuous acquisition and real-time upload mode, the data throughput B(n) can be expressed as follows:
B n = n T L S n ,
n represents the number of sampling channels, T is the sampling time, L is the ADC quantization bits, and Sn is the channel’s sampling rate. The power frequency signal included in the input can reflect the phase information of the partial discharge signal. Because of the frequency fluctuation in the transformer output, the power frequency signal component in the input needs to be extracted to serve as the synchronous time parameter for the reference of the partial discharge signals.
When the synchronous time parameter is obtained, the sampling length of the effective partial discharge signal can correspond to the power frequency cycle. By conditioning the input signal to be in the optimal range, the power frequency signal contained therein can be conditioned into a suitable signal that can match the analog comparator in MCU. By calculating the duty cycle of the PWM signal through the MCU, the accurate frequency time reference parameter can be provided for the measurement. Thereby, the effective interval of the partial discharge signal data can be determined. In this application, the input signal first passes through a low-pass filter; then, the operational amplifier AD8032 is used to rectify the signal to obtain the period by MCU. The circuit design is simulated by Multisim, as shown in Figure 12, and the simulation of the output is shown in Figure 13.
The partial discharge signal was divided into 90° intervals within the power frequency range in the time range to represent the moments when partial discharge occurs. The effective data group is generated at partial times. It includes the partial discharge signal and the occurrence time, which can be calculated as follows:
B r ( n ) = n k τ L S n + 24 k ,
In the equation, τ represents the discharge duration, and k represents the number of intervals of the effective discharge that occurred.
The utilization of external buffer technology to cache the effective data interval from the sampling sequence and transmit it to the host computer can improve transmission efficiency. Compared to continuous uploading of all data, this approach can improve the efficiency, which can be expressed by the following equation:
η = B ( n ) B r ( n ) B ( n ) ,
For one single channel sampling, if using a 12-bit ADC at a sampling rate of 1 MSps to acquire, it will generate 16 M bite data per second. If two segments of high-energy partial discharge occurred within each power frequency cycle [25], the duration of each effective ultrasonic signal of partial discharge is 3 ms. When the data are transmitted with a 1.5× extension, the data volume generated per second Bp would be:
B p = 50 ( 2 1   ( MSps ) 4.5   ( ms ) 16   ( bite ) + 24 2   ( bite ) ) 7.2 M   ( bite ) ,
The increased data transmission efficiency can be calculated as the ratio of the extended data volume to the original data volume, which can be expressed as follows:
Δ η p = 16 M B p 16 M = 55 % ,
Therefore, the data transmission speed can be around 10 Mbit/s by limiting the data transmission rate. This method can save approximately 55% of the signal transmission bandwidth and significantly reduce the external chip costs required for high-speed transmission.
So, the section designs the data transmission scheme for three levels. The first level is the low-speed acquisition, where data are directly transformed after being cached in the MCU’s internal SRAM. The second level utilizes an SDIO interface to connect an SD card for large-capacity data caching, supporting medium to low-speed offline DAQ storage. The third level employs QSPI to drive Dural SRAM for high-speed and medium-speed acquisition data caching. Its actual transmission speeds can reach up to 8 Mbyte/s. The transmission interface is configured as full-speed USB 2.0 to meet the requirements for data transmission.

2.6. Design of Firmware Programmer

Figure 14 illustrates the design of the firmware program task step for the DAQ board. In detail, after resting the signal acquisition board, the system automatically runs the program of ADC calibration and sampling bias calibration. If calibration task execution fails, the LED displays red. If calibration is successful, the system starts checking the sensor and USB connection status. If the sensor is not connected, the buzzer beeps for 3 s, then the LED displays blue. If the USB is not connected, the buzzer beeps for 3 s, then the LED displays green, and the system automatically enters offline acquisition mode, awaiting operational instructions from Bluetooth. Once all self-tests are successful, the LED will show green, awaiting the start acquisition signal from the host computer.
During the DAQ process, various parameters can be freely configured, such as the number of acquisition channels, sampling rate, sampling mode, sampling length, and bias voltage value. In the default state, the system parameter is set in a three-channel synchronous sampling mode, with each single-channel sampling rate of 1 MSps and trigger-based sampling mode. There are three channel options ranging from 1 to 3 that can be chosen, and selectable sampling rates can be chosen as 1 MSps, 500 kSps, 250 kSps, 125 kSps, and 100 kSps. Sampling modes include trigger-based signal acquisition mode or time-based signal acquisition mode under high or middle sampling rates, as well as the continuous acquisition mode under low-speed sampling. Users can set the sampling length based on the available capacity of the SD card and the SRAM, and the reverse bias voltage defaults to 0 V. After receiving a command via USB or Bluetooth from the PC or mobile device, the DAQ board starts the collection of photoelectric signals. Logarithmic amplification gain is automatically chosen based on the input signal strength, and the data transmission mode is assigned according to the sampling speed. For data transmission, middle-speed and high-speed samplings are transmitted to the PC via USB after caching in the SRAM; the sampling of low-speed sampling can be transmitted to the PC via USB directly, and the offline sampling is directly transmitted to the SD card. Due to the interrupt function of the STM32, the ping-pong operation is used to increase data processing efficiency during ADC acquisition. When the ADC acquisition process is half complete, the MCU starts processing the first half of the data to ensure maximum data processing efficiency within the limited runtime.

3. Test and Results

To evaluate the performance of the DAQ board of the fiber optic signal, the test platform was constructed using signal generators, a temperature-controlled chamber, and a DAQ board, as shown in Figure 15. The following section presents the results of the experimental tests of measurements of the signal-to noise ratio, temperature drift of the output signal, frequency response of the filtering circuit, quality of the differential signal, and synchronization capability of signal acquisition. These can help to demonstrate the rationality of the structure of the DAQ system design. In the end, we test the ability of its performance indicators using piezoelectric ceramic transducers to simulate partial discharge.

3.1. Test for the Signal-to-Noise Ratio

For the acquisition system, the smaller the base noise, the higher the signal-to-noise ratio. A higher SNR means that the system can distinguish between signal and noise better, thereby improving the reliability and accuracy of measurement data. Since the definition of SNR is the ratio between signal power and noise power, it can be measured by comparing the no input with the measurement dynamic range of the system. Correspondingly, for the voltage signal, the system’s SNR measurement formula can be converted from Formula (13) to the following expression:
S N R = 10 log ( P s i g n a l P n o i s e ) = 10 log ( u s 2 u n 2 ) ,
Therefore, the first test is used to measure the output signal Vp-p by opening the circuit. The blue trace in Figure 16 shows the max value 4.63 mv, which represents the baseline noise of the DAQ board compared to the same level of cost data acquired by the system whose baseline noise was shown by the red trace in Figure 16, and its noise value is 17.4 mV. As the dynamic range of the measurement is 6.6 V, the SNR can be calculated as follows:
S N R n o w = 20 log ( V max 2 V n 2 ) = 20 log ( 66 , 000   mV 4.63   mV ) 63.07   dB ,
S N R b e f o r e = 20 log ( V max 2 V n 2 ) = 20 log ( 66 , 000   mV 17.4   mV ) ) 51.57   dB ,
The SNR was significantly improved by about 10 dB after allocating the noise contribution. Moreover, the system’s SNR can be improved after oversampling. Figure 17 shows the SNR was increased by 2.66 dB and 6.61 dB by performing double and triple oversampling, respectively.

3.2. Test for Gain Temperature Drift

The second test is executed to test the temperature drift of the output signal. A 60 kHz sine wave generated by a standard generator is converted by a 2 K resistor into the current signal. Next, the current signal is connected to the DAQ board with a 0 dB level. The DAQ board is then placed inside the temperature-controlled chamber, with the temperature incrementally increasing from room temperature (20 °C) to 70 °C. The measurement results of the output trace were recorded every 10 °C from 20 °C to 70 °C, which is shown in Figure 18. Meanwhile, based on the output gain at 20 °C, the trace of the gain error with temperature change is shown in Figure 19. The gain error reached a maximum value of 1.088 V/A at a temperature of 70 °C, which also means the maximum variation of the magnification is −62.7 dB. At the same temperature experimental condition, compared with the same cost module, the gain drift stability of the proposed DAQ board is improved by −6.03 dB.

3.3. Test for Frequency Response of the DAQ Board

The third test was to measure the response of input signals in different frequencies. When connecting the signal generator to the DAQ board in the same way as Section 3.2, the sampling rate was set to 1 MSps. The results of the frequency response of the DAQ board are shown in Figure 20 from 0 Hz to 500 kHz. The test result shows that the board can generate more than a −3 dB rejection for the signal below 20 Hz, more than −3 dB for the signal higher than 300 kHz, and significant attenuation over −15 dB for signals above 500 K. Therefore, it has high acquired performance in the range of 20 Hz–100 kHz and is capable of significant suppression of unexpected signals.

3.4. Test for Quality of Differential Signal Output

The fourth test also involves the signal generator as input. For differential signals, the ability to suppress common-mode signals is an important indicator of their performance. The transverse conversion loss (TCL) is a measure of the degree of the unwanted common mode signal produced in a differential one-port device [26]. It also represents the differential circuit’s ability to suppress common-mode signals, which can be calculated using the following formula.
T C L = 20 log V d V c ,
“Vd” represents the differential-mode signal, and Vc represents the common-mode signal. The quality of the differential signal waveform was evaluated and shown in Figure 21. The maximum value of the differential-mode signal is 3.3 V, which is the maximum input voltage of ADC. After removing the DC bias applied on the common-mode voltage, the TCL of the differential circuit is:
T C L d = 20 log 3.3 3 × 10 6 = 120   dB
Moreover, the result shows that the output differential signals have the same amplitude and pulse width, and the phase difference between them is 180°. The output signal has high symmetry, and the value of the balance test is less than −60 dB in the range of 20 Hz to 1 MHz.
The burr in the results is significant because each output signal contains common mode noise with equal amplitude but opposite phase. Common mode noise will be sufficiently suppressed when entering input ADC by differential mode.

3.5. Test for Three-Channel Synchronous Input Signals

The fifth tests are executed to verify the synchronization capability of signal acquisitions. The test involves the acquisition of three-channel AC input signals. In the first, the generator provides a 60 kHz sine wave to the DAQ board connected to three different value resistances, which can provide three different amplitude synchronous input current signals. The test result is shown in Figure 22. As shown in Figure 22, three signals are in phase, thus the conversions started simultaneously.
Figure 23 plots the modulus of the FFT calculated by MATLAB on the signals applied on the three channels of the DAQ board. As shown in Figure 23, the peaks occur at a frequency of 60 kHz. They are equal to the frequency of the input signals.
Then, the board is connected to the generator, which provides two different sine waves to two channels three times because the generator only generates two-channel synchronous signals. The generator provides a 20 kHz sine wave to channel 1 and a 40 kHz sine wave to channel 2 the first time, provides a 20 kHz sine wave to channel 2 and an 80 kHz sine wave to channel 3 the second time, and provides a 40 kHz sine wave to channel 1 and an 80 kHz sine wave to channel 3 the second time. The output signals are shown in Figure 24; as can be observed, the results show that the output signals have an accurate period within a fixed sampling time. This approach makes full use of the available test resources at hand and indicates the ability of the acquisition board’s synchronous acquisition and frequency resolution.

3.6. Test for Partial Discharge Signal Acquisition

The last tests involved the acquisition of partial discharge signals generated by the piezoelectric ceramic because the piezoelectric ceramic can generate periodic and controllable partial discharge signals. The optical fiber sensor was placed around the piezoelectric ceramic to acquire the partial discharge signal. The DAQ board is connected to a photodiode to receive the demodulated optical signal. The photocurrent signal is conditioned to the fit amplitude value with a sampling frequency of 1 MHz. Figure 25 displays the air partial discharge wave, while Figure 26 shows the FFT calculated by MATLAB r2021b. As shown in Figure 26, the spectral distribution of the partial discharge signal ranges from about 5 kHz to 30 kHz. The result of the output image reconstructed at the board demonstrated that the designed prototype maintained the features of the input signal, and it also proved the capability of capturing partial discharge signals.

4. Discussion

The DAQ board designed for the fiber optical signal shows high practicality, enabling programmable parameters of the acquisition such as: logarithmic gains, sampling frequency, bias voltage, sampling channel, and sampling length. Moreover, the board can be set to different modes to adapt them to the features of different application scenes. The circuit board is compatible with most kinds of photodiodes, and it also can be used to acquire the temperature, vibration, and other signals generated by fiber optics. Meanwhile, the hardware structure of the acquisition board is simple; it consists of the amplifying circuit, programmed bias voltage circuit, filter circuit, and ADC driving circuit. The parameters can be modified to fit other measure requirements, reducing the cost of design. Without connecting the photodiodes, the board is a current signal acquisition when the bias voltage is set to 0 V. Also, the estimated cost of the DAQ board is USD 250–400, much lower than the commercial acquisition solution, which costs USD 200–4000.
In the end, the board is designed to acquire fiber optical signals generated by partial discharge. Considering the highest sampling rate of internal ADC in MCU, the external ADC and higher performance MCU can be used to measure the higher frequency fiber optical signal with the remaining signal conditioning circuits unchanged. However, it takes more cost and processing pressure.

5. Conclusions

This paper introduces the design and implementation of an optical fiber sensing acquisition board for partial discharge signal detection. The results of the simulation and test show that the hardware design structure can meet the optical fiber current acquisition in the range of 4µA–4 mA generated by photodiodes and can accurately suppress the signal outside the expected frequency band. The DAQ board comprises a 12-bit resolution and encompasses three independent acquisition channels, each channel equipped with an independent internal ADC. Both channel gain can be configured from 0 dB to 60 dB, and each channel integrates a band-pass filter and an anti-aliasing filter. The DAQ board can effectively acquire the frequency domain characteristics of the signal. A reasonable firmware was designed, implementing the batch acquisition and ping-pang storing strategy, caching into SRAM by QSPI in the high sampling speed mode.
Several tests were carried out on the proposed DAQ board, such as signal-to-noise ratio, gain temperature drift, and signal synchronization test. The overall SNR is more than 63 dB, and the gain drift error is less than −62 dB. Utilizing the piezoelectric ceramic to generate a partial discharge signal, the DAQ board can detect partial discharge signals through optical fiber sensors, and the frequency distribution range of the collected partial discharge is between 5 kHz and 30 kHz. Proposing a method of using a time base to upload the effective data of partial discharge can reduce the transmission bandwidth requirement by 55%. Moreover, higher sampling precision executed through oversampling could match multiple optical fiber signal acquisition scenarios such as vibration, temperature, and so on, and the SNR can be improved by 2.66 dB and 6.61 dB when executed with double and triple oversampling. The application range can be expanded by modifying the circuit system parameters. Compared with existing systems in the market, the designed optical fiber sensing acquisition board makes full use of the internal resources of the MCU, providing a new low-cost design solution with flexible functionality and a strong economy for optical fiber signal acquisition.

Author Contributions

Conceptualization, W.Z.; methodology, Z.T.; software, J.Z.; validation, W.Z.; formal analysis, Z.T.; investigation, J.Z.; resources, W.Z.; data curation, J.Z.; writing—original draft preparation, J.Z.; writing—review and editing, W.Z.; visualization, J.Z.; supervision, W.Z.; project administration, W.Z.; funding acquisition, W.Z. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the National Natural Science Foundation of China, grant number 52177136.

Data Availability Statement

No additional data are available.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. Measurement structure diagram based on fiber optic sensor.
Figure 1. Measurement structure diagram based on fiber optic sensor.
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Figure 2. Overall structure block diagram of the fiber optic signal acquisition board card.
Figure 2. Overall structure block diagram of the fiber optic signal acquisition board card.
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Figure 3. Signal link structure diagram.
Figure 3. Signal link structure diagram.
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Figure 4. Programmed T-type transimpedance amplifier circuit diagram.
Figure 4. Programmed T-type transimpedance amplifier circuit diagram.
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Figure 5. Multisim setup for the T-type transimpedance amplifier circuit. As stated before, seven cases are considered for testing the gain of the input signal when the gain is 0 dB, 10 dB, 20 dB, 30 dB, 40 dB, 50 dB, or 60 dB.
Figure 5. Multisim setup for the T-type transimpedance amplifier circuit. As stated before, seven cases are considered for testing the gain of the input signal when the gain is 0 dB, 10 dB, 20 dB, 30 dB, 40 dB, 50 dB, or 60 dB.
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Figure 6. Simulations of amplifier circuit carried out with Multisim. The blue trace is the input current signal for different gains, and the red trace is the output signal for different gains: (a) 0 dB V/A, (b) 10 dB V/A, (c) 20 dB V/A, (d) 30 dB V/A, (e) 40 dB V/A, (f) 50 dB V/A, (g) 60 dB V/A. (h) Correspondence of values of the input signal to the gain amplification level.
Figure 6. Simulations of amplifier circuit carried out with Multisim. The blue trace is the input current signal for different gains, and the red trace is the output signal for different gains: (a) 0 dB V/A, (b) 10 dB V/A, (c) 20 dB V/A, (d) 30 dB V/A, (e) 40 dB V/A, (f) 50 dB V/A, (g) 60 dB V/A. (h) Correspondence of values of the input signal to the gain amplification level.
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Figure 7. Programmable bias voltage circuit diagram.
Figure 7. Programmable bias voltage circuit diagram.
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Figure 8. Multisim setup for the band-pass filter circuit.
Figure 8. Multisim setup for the band-pass filter circuit.
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Figure 9. Bode plots for magnitude and phase response simulations with Multisim. The first trace shows the attenuation of the input signal at f−3 dB, and the second trace shows the phase margin of the frequency.
Figure 9. Bode plots for magnitude and phase response simulations with Multisim. The first trace shows the attenuation of the input signal at f−3 dB, and the second trace shows the phase margin of the frequency.
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Figure 10. Multisim schematic for the ADC drive circuit.
Figure 10. Multisim schematic for the ADC drive circuit.
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Figure 11. Result of the simulations for the differential signal transform on Multisim (the red trace is the positive output signal, the blue trace is the negative output signal, the phase difference between them is 180°).
Figure 11. Result of the simulations for the differential signal transform on Multisim (the red trace is the positive output signal, the blue trace is the negative output signal, the phase difference between them is 180°).
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Figure 12. Multisim schematic for synchronous time parameter extraction circuit.
Figure 12. Multisim schematic for synchronous time parameter extraction circuit.
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Figure 13. Result of the simulations for synchronous time parameter extraction circuit on Multisim. The blue trace is the input signal, and the red trace is the synchronous time signal extracted from the input signal.
Figure 13. Result of the simulations for synchronous time parameter extraction circuit on Multisim. The blue trace is the input signal, and the red trace is the synchronous time signal extracted from the input signal.
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Figure 14. Flowchart of the firmware program task step.
Figure 14. Flowchart of the firmware program task step.
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Figure 15. DAQ board test environment. (a) DAQ board test environment for the noise and frequency of the output signal. (b) DAQ board test environment for the frequency of the temperature drift of the output signal.
Figure 15. DAQ board test environment. (a) DAQ board test environment for the noise and frequency of the output signal. (b) DAQ board test environment for the frequency of the temperature drift of the output signal.
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Figure 16. Results of the baseline noise of the DAQ boards. The blue trace represents the baseline noise designed after allocating the noise contribution. The red trace represents the same cost level product baseline noise.
Figure 16. Results of the baseline noise of the DAQ boards. The blue trace represents the baseline noise designed after allocating the noise contribution. The red trace represents the same cost level product baseline noise.
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Figure 17. Results of the baseline noise of the DAQ boards with oversampling. The blue trace represents the result of no oversampling, the green trace represents the result of double oversampling, and the red trace represents the result of triple oversampling.
Figure 17. Results of the baseline noise of the DAQ boards with oversampling. The blue trace represents the result of no oversampling, the green trace represents the result of double oversampling, and the red trace represents the result of triple oversampling.
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Figure 18. Results of the output signal from 20 °C to 70 °C.
Figure 18. Results of the output signal from 20 °C to 70 °C.
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Figure 19. Trace of the gain error fluctuation from 20 °C to 70 °C.
Figure 19. Trace of the gain error fluctuation from 20 °C to 70 °C.
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Figure 20. Curve of the frequency response test.
Figure 20. Curve of the frequency response test.
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Figure 21. Results of the output signal of single to differential mode. The red trace represents positive output voltage, and the blue trace represents negative output voltage.
Figure 21. Results of the output signal of single to differential mode. The red trace represents positive output voltage, and the blue trace represents negative output voltage.
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Figure 22. Results of three channel signal acquisition output at the same frequency of input.
Figure 22. Results of three channel signal acquisition output at the same frequency of input.
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Figure 23. FFT of three-channel signals acquired at same frequency of input.
Figure 23. FFT of three-channel signals acquired at same frequency of input.
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Figure 24. Results of three-channel signal acquisition. The blue trace and red trace represent the output of the two-channel signals, respectively.
Figure 24. Results of three-channel signal acquisition. The blue trace and red trace represent the output of the two-channel signals, respectively.
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Figure 25. Result of partial discharge signal acquired by circuit board.
Figure 25. Result of partial discharge signal acquired by circuit board.
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Figure 26. FFT of partial discharge signal acquired by circuit board.
Figure 26. FFT of partial discharge signal acquired by circuit board.
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MDPI and ACS Style

Tong, Z.; Zhang, J.; Zhang, W. Hardware and Software Design of Programmable Medium and High-Speed Data Acquisition (DAQ) Board of Fiber Optic Signal for Partial Discharge Acquisition. Electronics 2024, 13, 2176. https://doi.org/10.3390/electronics13112176

AMA Style

Tong Z, Zhang J, Zhang W. Hardware and Software Design of Programmable Medium and High-Speed Data Acquisition (DAQ) Board of Fiber Optic Signal for Partial Discharge Acquisition. Electronics. 2024; 13(11):2176. https://doi.org/10.3390/electronics13112176

Chicago/Turabian Style

Tong, Ziquan, Jiatong Zhang, and Weichao Zhang. 2024. "Hardware and Software Design of Programmable Medium and High-Speed Data Acquisition (DAQ) Board of Fiber Optic Signal for Partial Discharge Acquisition" Electronics 13, no. 11: 2176. https://doi.org/10.3390/electronics13112176

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