A Comprehensive Review of dc/ac Single-Phase Differential-Mode Inverters for Low-Power Applications

Abstract

Switched-mode power supplies (SMPSs) are single-switch, two-state, dc/dc power electronic converters and can be generally classified into buck, boost, and buck–boost converters according to voltage transfer functions. There are more than 33 SMPSs with different characteristics in terms of their current and voltage ripples, voltage and current stresses, and their being voltage/current sourced. Although they are usually employed in the dc/dc mode, these SMPSs can be connected differentially to operate as single- and three-phase dc/ac inverters; hence, they are used in low-power applications. The resultant inverters will behave differently according to the topologies that they are descendant from. Several publications have presented differential-mode single-phase inverters (DMSIs) for low-power applications, focusing on their suitability for renewable energy systems. These proposals have mainly focused on boost and buck–boost configurations, with less focus on the buck inverter topologies. Also, several possible configurations for other DMSIs have not yet been proposed or discussed. This paper proposes a comprehensive review of the different possible configurations of the DMSIs, illustrating a systematic method by which to generate and explore them. The paper will mainly categorize the DMSIs in terms of their voltage transfer function and will then discuss the topologies, presenting the main advantages and disadvantages of each one.

1. Introduction

Electrical power conversion usually depends on power electronic converters in shaping the electricity from one form to another using semiconductor devices (e.g., switches and diodes), passive elements, and storage devices [1]. The power electronic converters are mainly classified, based on their power range, into low-power, medium-power, and high-power converters [2]. The low-power converters are important in many applications, such as renewable energy systems (RESs), including photovoltaic (PV) systems, fuel cells, battery energy storage (BES) systems, chargers, and power supplies [3]. Medium-power converters are used in motor/drive applications, as well as in renewable energy systems such as large PV systems and small wind turbines. High-power converters are needed in many applications, including large motor/drive systems and wind turbine systems [4].

The basic switched-mode power supply (SMPS) topologies are designed using a single switch, a single diode, and passive components such as inductors and/or capacitors followed by the load [5,6,7]. The resultant SMPS is a two-state converter, meaning that it switches between “on” and “off” states [8,9,10]. The studies in [11,12,13] classified the resultant SMPSs into more than 30 topologies, ranging from the basic buck dc/dc converter to more complicated boost and buck–boost topologies. The term “buck” refers to when the output voltage of an SMPS is always lower than the input, while the term “boost” refers to when the output voltage of the SMPS is always higher than the input. The “buck–boost” SMPS has a flexible output voltage which can be controlled to be below or above the input voltage. In [14,15,16,17], the dc/dc SMPSs were generated from eight original fundamental converter cells. Rotating the terminals of these cells across the input, ground, and output terminals generates the different buck, boost, and buck–boost topologies. An example of this process is presented in Figure 1, and the simplest converter cell “A” is shown in Figure 1a. This cell is composed of two switches and an inductor; it is forbidden to turn both switches on at the same time; otherwise, a short-circuit will occur on either side of the SMPS. Connecting the terminals a to 1, b to ¾, and c to 2 will lead to the first structure shown in Figure 1b. Inserting an active switch, such as an insulated gate bipolar transistor (IGBT) or metal oxide semiconductor field-effect transistor (MOSFET) devices connected at the input side between terminals 1 and a, and connecting a diode between terminals b and 3/4 will yield the conventional buck converter. The same method can be used to generate the conventional boost “B1A” converter and the buck–boost “bB1A” converter.

Using this method, several SMPSs can be generated from the fundamental converter cells. This paper will use the following terminology to define a certain SMPS:

• The first part will define the voltage transfer functions as “b” for buck, “B” for boost, and “bB” for buck–boost topologies.
• The second part concerns the number of this topology in this cell. Each cell produces a maximum of 2 SMPSs of the same type (buck, boost and buck–boost). Other symmetrical cells generate only one SMPS for each type as each pair will be identical.
• The third part defines the cell which generated the SMPS. For example, the second buck converter of cell E will be referred to as b2E.

Differential-mode (DM) dc/ac inverters have been proposed in the literature mainly in the context of low-power renewable energy systems. A differential-mode single-phase inverter (DMSI) is formed by connecting two SMPSs differentially, where each one is responsible for generating one half-cycle of the output voltage or the output current, depending on the output stage of the SMPS. As an example, Figure 2 shows the difference between the conventional single-phase boost converter and its DM counterpart. The conventional current-sourced (CS) inverter in Figure 2a can provide a sinusoidal output voltage, which is higher than the input one. By acting as a dc/dc boost converter at the input side, the input inductor L_i is charged using the input switch S; then, the bridge formed by the output four switches shapes the output sinusoidal output current. On the other hand, the DM boost inverter in Figure 2b employs two boost B1A SMPSs connected differentially across the output load. To operate as a dc/ac inverter, each device should allow for bidirectional power flow by connecting an anti-parallel diode or an anti-parallel switch.

Several DMSIs have been proposed in the literature, in which their operation, control, and merits were discussed. The DM boost inverter was first proposed in [18], where the inverter was intended to be used in uninterruptible power supply (UPS) and ac driver systems, where the output ac voltage is required to be larger than the dc link voltage without installing a second power conversion stage. One advantage of this inverter is that it draws a continuous current from the dc source due to the existence of the input inductors L_in. On the downside, the output voltage of this inverter cannot be brought below the input voltage. Another drawback is that because the inverter is descendant from the boost converter B1A, it is not possible to include a high-frequency transformer (HFT) inside it for galvanic isolation. Another DMSI was proposed in [19] and is shown in Figure 3; in this case, the Cuk converter is used as the SMPS. The Cuk converter is generated from cell C, classified in [13] as its first buck–boost SMPS, and it can therefore be labeled in this paper as bB1C. The Cuk (bB1C) converter has three main advantages which account for it being one of the best candidates in renewable energy and BES systems. The first is that it can draw continuous currents at the input and output sides, eliminating the need for large electrolytic capacitors which reduce the reliability of SMPS significantly. The high-frequency (HF) input current ripple is inversely proportional to the switching frequency. The second advantage is that because it is a buck–boost converter, it can generate flexible voltage higher or lower than the input one. Finally, because the Cuk converter has a blocking capacitor between the input and output sides, it allows for the installation of a small and compact HFT, which is useful for increasing the output voltage range, reducing the electromagnetic interference (EMI), and improving the safety of the system by providing galvanic isolation between the input and output sides.

The DMSI based on the conventional buck–boost converter from cell A (see Figure 1d) was proposed in [20] for grid-connected PV systems. Several current-sourced (CS) DM inverters are proposed, analyzed, and compared in [21], when operating as both single-phase and three-phase inverters.

This paper attempts to provide guidance for comparing all possible DMSIs that have been published sporadically throughout the literature. These different DMSIs provide different features based on the basic SMPSs they are descendent from, as well as their operation in the dc/ac mode. Following this introduction, Section 3 will present the concept, operation, and constraints for buck DMSIs. The following two sections will classify and present the different configurations for the boost and buck–boost DMSIs. Section 5 presents the mathematical equations needed by the designer, providing comparisons between different types. The conclusions and discussions are presented in Section 6.

2. Buck Inverters

Figure 4a shows the basic DM buck inverter, which stems from b1A SMPS, as an example. Each converter produces sinusoidal plus dc offset voltage, as shown in Figure 4b. The net output voltage, shown in Figure 4c, is the difference between the two output voltages v_o1 and v_o2, where the dc offset is removed. In the continuous conduction mode (CCM), the duty–cycle ratios of the two converters are calculated from

v_o1(t) = Asin(ωt) + B = d₁V_in,

(1)

v_o2(t) = Asin(ωt + π) + B = d₂V_in,

(2)

where d₁ and d₂ are the duty–cycle ratios of the boost SMPSs. The duty–cycle ratios define the period where the input switches (S₁ and S₃ in this case) are turned on with respect to the full switching period (t_s as d₁ = t_on1/t_s and d₂ = t_on2/t_s). The load voltage is expressed as:

v_o(t) = 2Asin(ωt).

(3)

As the b1A inverter stems from a buck converter, the peak of the output voltage (A + B in this case) cannot exceed the input voltage V_in because none of the duty–cycle ratios cannot exceed 1. The same concept of operation will be valid for other boost and buck–boost inverters given that they have different voltage transfer ratios.

Table 1. Voltage transfer ratios of the buck, boost, and buck–boost DMSIs and their constraints.

Type	A + B	B − A	d1	d2
Buck	≤Vin	≥0	[Asin(ωt) + B]/Vin	[Asin(ωt + π) + B]/Vin
Boost	≥Vin	≥Vin	[Asin(ωt) + B − Vin]/[Asin(ωt) + B]	[Asin(ωt + π) + B − Vin]/[Asin(ωt + π) + B]
Buck–boost	≥0 1	≥0 1	[Asin(ωt) + B]/[Asin(ωt) + B + Vin]	[Asin(ωt + π) + B]/[Asin(ωt + π) + B + Vin]

¹ some buck–boost SMPSs may generate voltages with negative polarity.

summarizes the voltage transfer ratios for the three types listing the constraints for choosing the values of the voltage magnitude A and the voltage offset B.

The relation between the duty–cycle ratios and the devices’ gate signals are shown in Figure 5. The carrier signals are generated by the micro-controller at a switching frequency of f_s = 1/t_s. The same comparison method applies for all DMSIs types. For voltage-sourced topologies, it is required to have a dead-band period between S₁ and S₂ and S₃ and S₄ to avoid short circuits across the input supply and output load if the devices turn on/off slowly. For current-sourced topologies, it is required to secure an overlap period to avoid open-circuiting the inductors, which can generate high-voltage spikes that can destroy the semiconductor devices.

There are eleven SSSD buck converter topologies; seven of them are voltage-sourced buck-type converters, while the rest are current sourced. The descendant dc/ac inverters are shown in Figure 6. To allow for the bidirectional power flow during positive and negative half cycles, each switch is connected to an anti-parallel diode, and each diode is connected to an anti-parallel switch.

2.1. b1A

Figure 7 shows the operation of the b1A DMSI when the input DC voltage is V_in = 100 V, and the output is controlled to generate v_o = V_o sin(ωt), where V_o = 80 V and ω = 314.16 r/s. Figure 7a shows the output voltage waveforms, which are important in designing the output inductor. As the b1A inverter has a continuous output current, the output capacitor C_o can be eliminated or be of a small capacitance value, which is to the inverter’s advantage. The peak of the HF voltage ripple is expressed as

$$\Delta Vo=\frac{R{V}_o\left(V_{in}-V_o\right)}{L{V}_{in}{f}_s}.$$

(4)

One of the drawbacks of the b1A inverter is that it may need a large capacitor at the input side to filter the discontinuous input currents i_in1 and i_in2, as shown in Figure 7b. The value of the inductor can be chosen to allow for a specific current ripple ΔI_L, as shown in (5). Usually, the current ripple is kept below 10% to reduce the electromagnetic interference (EMI).

$$L=\frac{V_o\left(V_{in}-V_o\right)}{\Delta I_L{V}_{in}{f}_s}$$

(5)

The semiconductor devices experience constant peak voltage stresses equal to V_in, as shown in Figure 7d, and should be designed accordingly. Switches with rating voltages higher than V_in may be chosen to consider the voltage spikes which may occur due to gate driver mismatches. The maximum current stress of the devices is equal to the peak of the output current.

2.2. b1C

Figure 8 shows the operation of the b1C inverter under the same condition set as b1A. The same output voltage is generated, as shown in Figure 8a. As shown in Figure 8b, the input currents of the inverter are continuous, which means that smaller input capacitors can be used. The envelope of the input currents determines the current stresses of the active switches. The peak of this envelope can be calculated from

$$I_p=\frac{V_o^2}{\eta R{V}_{in}},$$

(6)

where η is the efficiency of the inverter. The input current ripple determines the value of the input inductor L₁ and can be calculated from

$$L_1=\frac{V_o\left(V_{in}-V_o\right)}{\Delta I_{L1}{V}_{in}{f}_s}.$$

(7)

As shown in Figure 8c, the envelope of the second inductor’s current I₂ is similar to the input current’s waveform with 180° phase shift. The value of L₂ is determined by

$$L_2=\frac{V_o\left(V_{in}-V_o\right)}{\Delta I_{L2}{V}_{in}{f}_s}.$$

(8)

Because the average voltages across L₁ and L₂ should be zero, the capacitor C₁ is experiencing voltage equal to V_in, as shown in Figure 8d. The value of this capacitor is designed by regulating the voltage ripple across it from

$$C_1=\frac{I_p{V}_o}{\Delta V_{C1}{V}_{in}{f}_s}.$$

(9)

2.3. b1D

The b1D DMSI has a similar performance to the b1C except for the inductors’ currents. Figure 9a shows the current through the first inductor i_L1, where the peak value of the current is calculated from (6). The HF current ripple of i_L1 is very small compared with other types; therefore, a small inductance L₁ can be used as in (10):

$$L_1=\frac{V_o\left(V_{in}-V_o\right)I_o}{4V_{in}^2{f}_s^2{C}_1\Delta i_{L1}}.$$

(10)

As shown in Figure 9b, i_L2 is equal to the output current, and the inductance value can be chosen as in (8).

2.4. b2D

The b2D DMSI has continuous input currents, as shown in Figure 10. In addition, the HF ripple in these currents is very small and close to zero, which is an advantage of this type. The rest of the inverter’s waveforms are similar to the b1D type.

2.5. b1E

Similar to the b1A inverter’s input current in Figure 7b, the b1E inverter has a discontinuous input current, making it a less-attractive candidate renewable energy source (RESs), requiring a continuous input current, such as via PV applications. The output voltage of the b1E inverter has a very small HF ripple, as shown in Figure 11a. Unlike the previous inverters, the capacitor C₁ voltage V_C1 has a dc and a second-order sinusoidal component, as shown in Figure 11b. The HF ripple voltage of V_C1 is very small, and a small capacitor may be used.

2.6. b2E

The operation of the b2E inverter is similar to the b1E one except for the output voltage HF ripples. The existence of the C₁ capacitor before the output inductor L₂ causes the output voltage and current ripples to be very low. The output voltage of b2E is shown in Figure 12.

2.7. b1F

The b1F DMSI has a discontinuous output current and therefore needs a large capacitor C_o at the output side. The output voltage is shown in Figure 13a, where the HF ripple can be calculated from

$$\mathsf{\Delta }{V}_o=\frac{ \left(V_{in}-V_o\right){\left(\frac{V_o}{V_{in}}\right)}^2}{R{C}_o{f}_s}.$$

(11)

The current I_L1 is shown in Figure 13c, where the peak current is equal to the peak output current, and the relation between the HF ripple and the value of L₁ is calculated from (10). The I_L2 current is shown in Figure 13d, where the HF ripple can be calculated from (8).

2.8. b2F

This inverter is similar to the b1F except for the input currents as they are continuous due to the existence of L₁ at the input side. The waveform for this input current is similar to the b2D inverter in Figure 10.

2.9. b1G and b2G

Unlike all other buck converters, the two converters descendent from cell G, b1G and b2G, can produce bidirectional output voltage according to

$$\begin{gathered} V_{\mathrm{o}}=\frac{2D-1}{D}{V}_{\mathrm{in}}, \\ 0.5<D<1. \end{gathered}$$

(12)

Accordingly, the reference output voltages of the two differential converters are represented as

$$D_1=\frac{Vin}{2Vin-Vo1} \mathrm{and} D_2=\frac{Vin}{2Vin-Vo2}.$$

(13)

As the converters can generate bidirectional voltages, the dc bias of V_o1 and V_o2 can be removed for b1G and b2G DMSIs. Figure 14a shows the output voltage of the b1G inverter. The inverter has discontinuous input and output currents; hence, it needs large filtering capacitances.

The existence of an additional pole in the converter’s transfer function, which is close to the origin, causes an undesirable inrush current at transience, which may complicate the control design. As shown in Figure 14c, one of the biggest drawbacks of the b1G inverter is its switches’ voltage stresses. The peak voltage across the switches reaches

$$V_{sw\_peak}=2V_{in}+V_o.$$

(14)

The inductors in Figure 14d experience sinusoidal currents with the same triangular ripples that can be designed according to (7) and (8). The input capacitor C₁ experiences a constant voltage with an average of V_in, as shown in Figure 14e. The HF voltage ripple of this voltage is calculated from (15) and can be used to design C₁. The operation of b2G DMSI is similar to b1G except for the voltage stress across the capacitor C₁, where it experiences dc plus sinusoidal components, as shown in Figure 15.

$$\mathsf{\Delta }{V}_{C1}=\frac{ \left(V_{in}-V_o\right)V_o}{R{C}_1{f}_s}$$

(15)

2.10. b1P

This is the last four-switch buck DMSI, and it has discontinuous input currents, as shown in Figure 16a. The inverter generates continuous output current and voltage, as shown in Figure 16b, which is an advantage of this type. The main difference between this type and other buck DMSIs lies in the internal capacitor’s voltage stresses. As shown in Figure 16e, the average voltage of V_C1 is zero; therefore, capacitances of small values can be used.

Table 2. Summary of the main features of buck DMSIs.

DMSI	Input Current			Output Voltage		Main Advantages	Main Drawbacks
	Type	Envelope	HF Ripples	Type	HF Ripples
b1A	Discontinuous	Io sin(ωt)	—	Continuous	$\frac{R{V}_o\left(V_{in}-V_o\right)}{L_1{V}_{in}{f}_s}$	■ Fewer components ■ Small output Co	■ Large input capacitor
b1C	Continuous	$\frac{I_o{V}_{o}sin\omega t }{2V_{in}}\left(sin\omega t+1\right)$	$\frac{V_o\left(V_{in}-V_o\right)}{L_1{V}_{in}{f}_s}$	Continuous	$\frac{R{V}_o\left(V_{in}-V_o\right)}{L_2{V}_{in}{f}_s}$	■ Small input capacitors ■ Small output capacitor	■ Large input current peak ■ L1 and L2 have high currents
b1D	Continuous	$\frac{I_o{V}_{o}sin\omega t }{2V_{in}}\left(sin\omega t+1\right)$	$\frac{V_o\left(V_{in}-V_o\right)}{L_1{V}_{in}{f}_s}$	Continuous	$\frac{R{V}_o\left(V_{in}-V_o\right)}{L_2{V}_{in}{f}_s}$	■ Small HF ripple current in L1 ■ Sinusoidal current in L2 ■ Small output capacitor Co	■ Large input current peak ■ L1 has high peak current
b2D	Continuous	$\frac{I_o{V}_{o}sin\omega t }{2V_{in}}\left(sin\omega t+1\right)$	$\frac{V_o\left(V_{in}-V_o\right)I_o}{4V_{in}^2{f}_s^2{C}_1\Delta i_{L1}}$	Continuous	$\frac{R{V}_o\left(V_{in}-V_o\right)}{L_2{V}_{in}{f}_s}$	■ Small HF ripple current in the input currents	■ Large input current peak
b1E	Discontinuous	Io sin(ωt)	—	Continuous	≈zero	■ Very small HF ripples electro-magnetic Small output capacitor Co	■ Large input capacitor is needed ■ Sinusoidal voltage at the middle capacitor C1
b2E	Discontinuous	Io sin(ωt)	—	Continuous	≈zero	■ Very small HF ripples in the output ■ Small output capacitor Co	■ Large input capacitor is needed ■ Sinusoidal voltage at the middle capacitor C1
b1F	Discontinuous	Io sin(ωt)	—	Discontinuous	$\frac{ \left(V_{in}-V_o\right){\left(\frac{V_o}{V_{in}}\right)}^2}{R{C}_o{f}_s}$	■ Small HF current ripple in L1 ■ Sinusoidal current in L2	■ Large input capacitor is needed. ■ Large output capacitor is needed.
b2F	Continuous	$\frac{I_o{V}_{o}sin\omega t }{2V_{in}}\left(sin\omega t+1\right)$	$\frac{V_o\left(V_{in}-V_o\right)I_o}{4V_{in}^2{f}_s^2{C}_1\Delta i_{L1}}$	Discontinuous	$\frac{ \left(V_{in}-V_o\right){\left(\frac{V_o}{V_{in}}\right)}^2}{R{C}_o{f}_s}$	■ Small HF current ripple in L1 ■ Sinusoidal current in L2	■ Large output capacitor is needed
b1G	Discontinuous	Io sin(ωt)	—	Discontinuous	—	■ Bidirectional output voltage ■ Constant voltage across C1 ■ Sinusoidal currents in the inductors	■ Large voltage stresses across the semiconductor devices ■ Large output capacitor is needed ■ Complex control
b2G	Discontinuous	Io sin(ωt)	—	Discontinuous	—	■ Bidirectional output voltage ■ Constant voltage across C1 ■ Sinusoidal currents in the inductors	■ Large voltage stresses across the semiconductor devices ■ Large output capacitor is needed
b1P	Discontinuous	Io sin(ωt)	—	Continuous	$\frac{R{V}_o\left(V_{in}-V_o\right)}{L_2{V}_{in}{f}_s}$	■ Small HF current ripple in L1 ■ Average voltage across C1 is zero ■ Small output capacitor Co	■ Large input capacitor is needed ■ Large currents through L1 and L2

lists the main features of the buck DMSIs showing the nature of input currents and output voltages, as well as the main advantages and disadvantages of each type.

3. Boost Inverters

Boost inverters are needed in several renewable energy applications when the output voltage is required to be higher than the input one. There are eleven SSSD boost converter topologies; seven of them are voltage-sourced boost-type converters, while the rest are current sourced. The descendant dc/ac inverters are shown in Figure 17. The majority of the boost inverters have at least one right-hand-plane zero (RHPZ), which complicates the control design.

In the CCM, the duty–cycle ratios of the two converters are calculated from

v_o1(t) = Asin(ωt) + B = V_in/(1 − d₁),

(16)

v_o2(t) = Asin(ωt + π) + B = V_in/(1 − d₂),

(17)

where d₁ and d₂ are the duty–cycle ratios of the boost SMPSs. The load voltage is

v_o(t) = 2Asin(ωt).

(18)

3.1. B1A

The B1A DMSI inverter employs the conventional boost converter as the building block of the positive and negative converters. Input and output waveforms of this inverter are shown in Figure 18. Due to the existence of the input inductor L1, the input current is continuous, which is desirable for RESs and battery applications. Due to the existence of the output switches S₂ and S₄, the output current and voltage of the B1A inverter are discontinuous; therefore, a large output capacitor is needed. The HF current ripple is dependent on the input and output voltages as well as the value of the input inductor, as follows:

$$\mathsf{\Delta }{I}_{in }=\frac{V_{in}\left(V_o-V_{in}\right) }{L_1{f}_{\mathrm{s}}{V}_o}.$$

(19)

3.2. B1C

As shown in Figure 19, the B1C inverter has continuous input and output currents, which makes it suitable for RESs, especially PV generators.

As shown in

Table 3. Summary of the main features of boost DMSIs.

DMSI	Input Current			Output Voltage		Main Advantages	Main Drawbacks
	Type	Envelope	HF Ripples	Type	HF Ripples
B1A	Continuous	$\frac{I_o{V}_{o}sin\omega t }{2V_{in}}\left(sin\omega t+1\right)$	$\frac{V_{in}\left(V_o-V_{in}\right) }{L_1{f}_{\mathrm{s}}{V}_o}$	Discontinuous	$\frac{I_o^2\left(V_o-V_{in}\right) R}{C_o{f}_s{V}_o^2}$	■ Fewer components ■ Small input capacitance	■ Large output capacitor ■ High voltage across C1
B1C	Continuous	$\frac{I_o{V}_{o}sin\omega t }{2V_{in}}\left(sin\omega t+1\right)$	$\frac{V_{in}\left(V_o-V_{in}\right) }{f_{\mathrm{s}}{V}_o}\left[1/L_1+1/L_2\right]$	Continuous	$\frac{\left(V_o-V_{in}\right) }{L_2{f}_{\mathrm{s}}}$	■ Small input capacitors ■ Small output capacitor	■ Higher HF input current ripple. ■ High voltage across C1
B1D	Continuous	$\frac{I_o{V}_{o}sin\omega t }{2V_{in}}\left(sin\omega t+1\right)$	$\frac{V_{in}\left(V_o-V_{in}\right) }{L_1{f}_{\mathrm{s}}{V}_o}$	Continuous	$\frac{\left(V_o-V_{in}\right) }{L_2{f}_{\mathrm{s}}}$	■ Small input capacitors ■ Small output capacitor	■ High voltage across C1
B2D	Continuous	$\frac{I_{o}sin\omega t }{2V_{in}}\left(V_{o}sin\omega t+1\right)$	$\frac{V_o\left(V_{in}-V_o\right)I_o}{4V_{in}^2{f}_s^2{C}_1\Delta i_{L1}}$	Continuous	$\frac{R{I}_o\left(V_o-V_{in}\right) }{4C_o{L}_2{f}_s^2{V}_o^2}$	■ Small HF ripple input currents ■ Extremely low output voltage ripple	■ High voltage across C1
B1E	Continuous	$\frac{I_{o}sin\omega t }{2V_{in}}\left(V_{o}sin\omega t+1\right)$	≈zero	Discontinuous	$\frac{I_o^2\left(V_o-V_{in}\right) R}{C_o{f}_s{V}_o^2}$	■ Very small HF ripples at input side ■ Small/no input capacitance is needed	■ Large output capacitor is needed ■ Sinusoidal voltage at the middle capacitor C1
B2E	Continuous	$\frac{I_{o}sin\omega t }{2V_{in}}\left(V_{o}sin\omega t+1\right)$	≈zero	Discontinuous	$\frac{I_o^2\left(V_o-V_{in}\right) R}{C_o{f}_s{V}_o^2}$	■ Small HF ripples at input side ■ Small/no input capacitance is needed	■ Large output capacitor is needed
B1F	Discontinuous	$\frac{I_{o}sin\omega t }{2V_{in}}\left(V_{o}sin\omega t+1\right)$	—	Discontinuous	$\frac{I_o^2\left(V_o-V_{in}\right) R}{C_o{f}_s{V}_o^2}$	■ Small HF ripples across C1	■ Large input capacitor is needed. ■ Large output capacitor is needed.
B2F	Discontinuous	$\frac{I_{o}sin\omega t }{2V_{in}}\left(V_{o}sin\omega t+1\right)$	—	Continuous	$\frac{\left(V_o-V_{in}\right) }{L_2{f}_{\mathrm{s}}}$	■ Small HF current ripple in L1 ■ Sinusoidal current in L2	■ Large output capacitor is needed
B1G	Discontinuous	Io sin(ωt)	—	Continuous	$\frac{\left(V_o-V_{in}\right) }{L_2{f}_{\mathrm{s}}}$	■ Bidirectional output voltage ■ Sinusoidal currents in the inductors	■ Large voltage stresses across the switches ■ Large input capacitor is needed ■ Complex control
B2G	Discontinuous	Io sin(ωt)	—	Continuous	$\frac{\left(V_o-V_{in}\right) }{L_2{f}_{\mathrm{s}}}$	■ Bidirectional output voltage ■ Sinusoidal currents in the inductors	■ Large voltage stresses across the switches ■ Large input capacitor is needed ■ Complex control
B1P	Continuous	$\frac{I_{o}sin\omega t }{2V_{in}}\left(V_{o}sin\omega t+1\right)$	$\frac{V_{in}\left(V_o-V_{in}\right) }{f_{\mathrm{s}}{V}_o}\left[1/L_1+1/L_2\right]$	Discontinuous	—	■ Small HF current ripple in L1 ■ Average voltage across C1 is zero	■ Large output capacitor is needed

, the HF input ripple current is higher than the B1A inverter. On the downside, the voltage across the middle capacitor C₁ is high and equal to the summation of input and output voltages.

3.3. B1D

This inverter has a performance very close to the B1C except it has lower HF ripple currents.

3.4. B2D

Similar to B1D, the input current of the B2D inverter is continuous. The main advantage of this inverter is that the output voltage ripple is extremely low, which makes it attractive when reducing output total harmonic distortion (THD) is important in the application.

3.5. B1E and B2E

The B1E has a continuous current with very small HF ripple, which eliminates the need for input capacitors. This makes it very attractive for PV applications where the input capacitors are affecting the reliability of the system. The output current and voltage are discontinuous as the output current is the summation of the currents through C₁ and S₂. B2E is similar to B1E except the voltage across the capacitor C₁ is equal to the input voltage.

3.6. B1F and B2F

The B1F DMSI is similar to the B1E except it has discontinuous input and output currents. On the contrary, the B2F inverter has a continuous output current with a very small HF ripples, as shown in Table 3.

Table 3 summarizes the main characteristics of the boost DMSIs, showing the nature of input currents and output voltages as well as the main advantages and disadvantages of each type.

3.7. B1G and B2G

Unlike all other boost converters, the two converters descendent from cell G, B1G and B2G, can produce bidirectional output voltage according to

$$\begin{gathered} Vo=\frac{1-D}{1-2D}, \\ 0<D<0.5. \end{gathered}$$

(20)

Accordingly, the reference output voltages of the two differential converters are represented as

$$D_1=\frac{Vo1-Vin}{2Vo1-Vin} \mathrm{and} D_2=\frac{Vo2-Vin}{2Vo2-Vin}.$$

(21)

The two descendent DMSIs can generate bidirectional output voltages; therefore, the dc-bias is removed. The inverters produce discontinuous input and continuous output currents. The voltages across the semiconductor devices are higher than those of the other boost inverters.

3.8. B1P

The B1P inverter has continuous input and discontinuous output currents. The voltage across the capacitor C₁ is zero, which may be required in some applications when the capacitors need to be small.

4. Buck–Boost Inverters

Buck–boost inverters play a crucial role in connecting RESs to the utility grid and ac loads when the input voltage fluctuates below and above the output voltage. The DM buck–boost inverters have been presented in several publications [22,23,24,25,26,27]. There are eleven SSSD buck–boost converter topologies; seven of them are voltage-sourced boost-type converters, while the rest are current sourced.

The descendant dc/ac inverters are shown in Figure 20. The majority of these inverters have two right-hand-plane zeros (RHPZs), which complicates the control design.

4.1. bB1A

This DMSI is also known as the conventional buck–boost inverter and has been used mainly in grid-connected PV applications. The input current of this inverter is discontinuous as the input switch S₁ is connected in series with the voltage source V_in. The power transfer occurs through charging and discharging the shunt inductor L₁. The bB1A inverter is suitable for being galvanically isolated, converting L₁ into a coupled inductor acting as a HF transformer [28]. The output current of the bB1A DMSI is discontinuous, which needs a large capacitor at the output side. The bB1A inverter has one RHPZ, and its waveforms are shown in Figure 21.

4.2. bB1C

This DMSI is also known as the Cuk DM inverter and plays an important role in low-power energy conversion systems [29]. The bB1C inverter has a continuous input current, which is useful in PV systems where the value of input capacitance needs to be reduced significantly. The inverter also has continuous output current, which improves the THD when the inverter is connected to the utility ac grid. The bB1C inverter allows for galvanic isolation using a small HF transformer, which improves the safety, EMI, and voltage boosting ratio. The main drawback of the inverter is that it has two RHPZs, which complicates the control design with conventional linear controllers. The waveforms of the output voltage and input current are shown in Figure 22.

4.3. bB1D

Similar to the bB1C (Cuk) inverter, this DMSI has continuous input and output currents, which makes it suitable for RES applications. The inverter has one RHPZ, but is not suitable for HF isolation, which is considered a drawback.

4.4. bB2D

The structure of this DMSI is close to that of the bB1D inverter. The main difference is that the input inductor is moved to the output side. Consequently, the HF ripple in the output current is significantly reduced, which makes the inverter useful when it is required to reduce the THD of the output current.

4.5. bB1E and bB2E

The buck–boost converters in cell E have discontinuous input and output currents due to the existence of input switches at the input sides. Both inverters need large electrolytic capacitors at the output sides to smooth the output current and reduce the THD. The two inverters have 1 RHPZ, which simplifies the control design in comparison to the CS topologies. The two inverters do not allow for galvanic isolation using HF transformers.

4.6. bB1F

The bB1F is an amended configuration for the bB1A DMSI with an input LC filter to reduce the input current ripple. The other characteristics of the inverter remain the same as those of the bB1A version. It should be noted that although the input LC filter caused the input current to be continuous, the inverter is still voltage sourced, with one RHPZ.

4.7. bB2F

The bB2F inverter has a very small output current as the LC filter is moved to the output side. The input current is discontinuous, and the inverter is considered to be voltage sourced. The inverter has one RHPZ, which simplifies the control design in comparison to the other CS buck–boost converters.

4.8. bB1G

This is also known as the “Sepic” inverter, and it is very popular in RES applications, especially the PV solar systems. Its popularity comes from its attractive features such as it having low input current ripples, the ability for HF isolation, and output voltages of the same polarity as the input voltage. This feature is useful when it is required to reduce the switch count of the three-phase version of the DM inverter, as shown in [30]. On the downside, the bB1G DMSI has two RHPZs, which, in turn, complicate the control design. Also, the output current of the inverter is discontinuous and therefore requires a relatively large output capacitor.

4.9. bB2G

This topology is also known as the “Zeta” inverter and is considered as the flipped version of the Sepic one. This means that it has the same characteristics except the input current is discontinuous while the output one is continuous.

4.10. bB1P

This is the newer buck–boost inverter version which was published and analyzed for the first time in [8]. The existence of the two inductors—L₁ and L₂—around C₁ forces the average voltage of V_C1 to be zero. This simplifies the design of the HF transformer as cores with smaller sizes can be used with smaller splitting capacitors. Another advantage is that the inverter has one RHPZ. On the downside, the bB1P DMSI has both discontinuous input and output currents; hence, large capacitors may be required.

Table 4. Summary of the main features of buck–boost DMSIs.

DMSI	Input Current		Output Current		RHPZ	Isolation	Main Advantages	Main Drawbacks
	Type	HF Ripples	Type	HF Ripples
bB1A	Discontinuous	—	Discontinuous	$-$	1	Yes	■ Fewer components ■ Easy to control. ■ HF transformer can be used	■ Large input and output capacitors
bB1C “Cuk”	Continuous	$\frac{V_o{V}_{in} }{\left(V_o+V_{in}\right)L_1{f}_{\mathrm{s}}}$	Continuous	$\frac{V_o{V}_{in} }{\left(V_o+V_{in}\right)L_2{f}_{\mathrm{s}}}$	2	Yes	■ Small input and output capacitors ■ HF transformer can be used	■ Complex control
bB1D	Continuous	$\frac{V_o{V}_{in} }{\left(V_o+V_{in}\right)f_{\mathrm{s}}}\left[\frac{1 }{L_1}+\frac{1 }{L_2}\right]$	Continuous	$\frac{V_o{V}_{in} }{\left(V_o+V_{in}\right)L_2{f}_{\mathrm{s}}}$	1	No	■ Small input capacitors ■ Small output capacitor	■ Not possible to use HF transformer ■ High EMI
bB2D	Continuous	$\frac{V_o{V}_{in} }{\left(V_o+V_{in}\right)L_1{f}_{\mathrm{s}}}$	Continuous	$\frac{V_o{V}_{in} I_o }{4L_2{C}_1{\left(V_o+V_{in}\right)}^2{f}_s^2}$	1	No	■ Small HF ripple input currents ■ Extremely low output current ripple	■ Not possible to use HF transformer ■ High EMI
bB1E	Discontinuous	—	Discontinuous	$\frac{I_o^2 }{C_o{f}_s\left(V_o+V_{in}\right)}$	1	No	■ Control simpler than CS buck–boost inverters ■ Small HF ripples across C1	■ Large input and output capacitors needed ■ Not possible to use HF transformer ■ High EMI
bB2E	Discontinuous	—	Discontinuous	$\frac{I_o^2 }{C_o{f}_s\left(V_o+V_{in}\right)}$	1	No
bB1F	Continuous	$\frac{I_o{\left(V_o\right)}^2 }{4L_2{C}_1{\left(V_o+V_{in}\right)}^2{f}_s^2}$	Discontinuous	$\frac{I_o^2 }{C_o{f}_s\left(V_o+V_{in}\right)}$	1	Yes	■ Small input current ripple ■ Easy to control. ■ HF transformer can be used	■ Large output capacitor is needed. ■ Not possible to use HF transformer ■ High EMI
bB2F	Discontinuous	—	Continuous	$\frac{V_o{V}_{in} I_o }{4L_2{C}_1{\left(V_o+V_{in}\right)}^2{f}_s^2}$	1	No	■ Easy to control. ■ Very small HF ripple in the output current	■ Large input capacitor is needed
bB1G “Sepic”	Continuous	$\frac{V_o{V}_{in} }{\left(V_o+V_{in}\right)L_1{f}_{\mathrm{s}}}$	Continuous	$\frac{I_o^2 }{C_o{f}_s\left(V_o+V_{in}\right)}$	2	Yes	■ Small input current ripple ■ HF transformer can be used ■ Vo and Vin same polarity	■ Large output capacitor is needed ■ Complex control
bB2G “Zeta”	Discontinuous	—	Continuous	$\frac{V_o{V}_{in} }{\left(V_o+V_{in}\right)L_2{f}_{\mathrm{s}}}$	2	Yes	■ HF transformer can be used ■ Vo and Vin same polarity	■ Large input and output capacitor needed ■ Complex control
bB1P	Discontinuous	—	Discontinuous	$\frac{I_o^2 }{C_o{f}_s\left(V_o+V_{in}\right)}$	1	Yes	■ HF transformer can be used ■ Average voltage across C1 is zero ■ The size of the HF transformer is relatively small ■ Easy to control.	■ Large input and output capacitors are needed.

summarizes the main characteristics of the buck–boost DMSIs, showing the nature of the input and output currents, the number of RHPZs, the ability to be isolated with HF transformers, and the main advantages and disadvantages of each inverter type.

5. Design Considerations and Discussions

The SMPSs can be designed by selecting the suitable values of the passive elements and the ratings of the semiconductor devices. Knowing the peak voltages and peak currents through the converters, the values of the passive elements can be selected to optimize the maximum HF current ripples of the inductors’ currents and the maximum voltage ripples of the capacitors’ voltages. It is common to select the inductance L to limit the current ripple through the inductor ΔI_L to 10% of the peak current. Similarly, a capacitor C is usually designed so that its voltage ripple ΔV_C is below 5% of the peak voltage across it. The semiconductor devices’ voltages and currents are used to determine the minimum voltage and current ratings of the switches and diodes.

Table 5. Parameter selection formulae for buck DMSIs.

	Peak Duty–Cycle Ratio	L1	L2	C1	C2	Device Current Rating	Device Voltage Rating
b1A	$D=\frac{V_o}{V_{in}}$	$\frac{V_o\left(V_{in}-V_o\right)}{\Delta I_L{V}_{in}{f}_s}$	NA	$D\left(1-D\right)\frac{I_o}{f_s\Delta V_c}$	NA	$I_o$	$V_{in}$
b1C		$D\left(1-D\right)\frac{V_{in}}{\Delta I_{in}{f}_s}$	$D\left(1-D\right)\frac{V_{in}}{f_s\Delta I_{L2}}$	$D\left(1-D\right)\frac{I_o}{f_s\Delta V_c}$	NA	$I_o$	$V_{in}$
b1D		$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_{L1}{f}_s}$	$D\left(1-D\right)\frac{V_{in}}{\Delta I_{in}{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$I_o$	$V_{in}$
b2D		$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_{in}{f}_s}$	$D\left(1-D\right)\frac{V_{in}}{\Delta I_o{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$I_o$	$V_{in}$
b1E		$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_{L1}{f}_s}$	$\frac{\Delta I_{L1}{D}^2}{12C\Delta I_o{f_s}^2}$	$\frac{D\Delta I_{L1}}{8\Delta V_c{f}_s}$	NA	$I_o$	$V_{in}$
b2E		$D\left(1-D\right)\frac{V_{in}}{\Delta I_{L1}{f}_s}$	$\frac{\Delta I_{L1}{D}^2{t_s}^2}{24C\Delta I_o{f_s}^2}$	$\frac{D\Delta I_{L1}}{8\Delta V_c{f}_s}$	NA	$I_o$	$V_{in}$
b1F		$D\left(1-D\right)\frac{V_{in}}{\Delta I_{L1}{f}_s}$		$D\left(1-D\right)\frac{I_o}{\Delta V_c{f}_s}$	$\frac{\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$I_o$	$V_{in}$
b2F		$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_{in}{f}_s}$	$\frac{D\left(1-D\right)V_{in}}{\Delta I_{L2}{f}_s}$	$D\left(1-D\right)\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$I_o$	$V_{in}$
b1G	$D=\frac{V_{in}}{2V_{in}-V_o}$	$\left(1-D\right)\frac{V_{in}}{\Delta I_{L1}{f}_s}$	NA	$\left(1-D\right)\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D\left(1-D\right)t_s{I_o}^2}{V_{in}\left(2D-1\right)\Delta I_o{f}_s}$	$\frac{I_o}{D}$	$\frac{V_{in}}{D}$
b2G	$D=\frac{V_{in}}{2V_{in}-V_o}$	$\left(1-D\right)\frac{V_{in}}{\Delta I_{L1}{f}_s}$	$\left(1-D\right)\frac{V_{in}}{\Delta I_o{f}_s}$	NA	NA	$\frac{I_o}{D}$	$\frac{V_{in}}{D}$
b1P	$D=\frac{V_o}{V_{in}}$	$D\left(1-D\right)\frac{V_{in}}{\Delta I_{L1}{f}_s}$	$D\left(1-D\right)\frac{V_{in}}{\Delta I_{L2}{f}_s}$	$D\left(1-D\right)\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$I_o$	$V_{in}$

,

Table 6. Parameter selection formulae for boost DMSIs.

	Peak Duty–Cycle Ratio	L1	L2	C1	C2	Current Rating	Voltage Rating
B1A	$D=1-\frac{V_{in}}{V_o}$	$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	NA	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
B1C		$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_o{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
B1D		$\frac{D{V}_{in}}{\Delta I_{in}{f}_s}$	$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_{L2}{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
B2D		$\frac{D{V}_{in}}{\Delta I_{in}{f}_s}$	$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_{L2}{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
B1E		$\frac{D{V}_{in}}{\Delta I_{in}{f}_s}$	$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_o{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
B2E		$\frac{D{I}_{in}}{12C{f_s}^2\Delta I_{L1}}$	$\frac{D{V}_{in}}{\Delta I_{L2}{f}_s}$	$\frac{D\Delta I_{L2}}{4\Delta V_c{f}_s}$	$\frac{D\left(1-D\right){{\overline{I}}_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
B1F		$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{D\Delta V_c}{4\Delta I_{L2}{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
B2F		$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_{L2}{f}_s }$	$D\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
B1G	$D=\frac{V_{in}}{2V_{in}-V_o}$	$\frac{D\left(1-D\right)}{\left(1-2D\right)}\frac{V_{in}}{\Delta I_{L1}{f}_s}$	$\frac{D\left(1-D\right)}{\left(1-2D\right)}\frac{V_{in}}{\Delta I_{L2}{f}_s}$	$\frac{D\left(1-D\right)}{\left(1-2D\right)}\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D{I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-2D\right)}$	$\frac{V_{in}}{\left(1-2D\right)}$
B2G	$D=\frac{V_{in}}{2V_{in}-V_o}$	$\frac{D\left(1-D\right)}{\left(1-2D\right)}\frac{V_{in}}{\Delta I_{L1}{f}_s}$	$\frac{D\left(1-D\right)}{\left(1-2D\right)}\frac{V_{in}}{I_{L2}}$	$\frac{D\left(1-D\right)}{\left(1-2D\right)}\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D{{\overline{I}}_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-2D\right)}$	$\frac{V_{in}}{\left(1-2D\right)}$
B1P	$D=1-\frac{V_{in}}{V_o}$	$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_{L2}{f}_s }$	$D\frac{{\overline{I}}_o}{\Delta V_c{f}_s}$	$\frac{D\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$

and

Table 7. Parameter selection formulae for buck–boost DMSIs.

	Peak Duty–Cycle Ratio	L1	L2	C1	C2	Device Current Rating	Device Voltage Rating
bB1A	$D=\frac{V_o}{V_{in}+V_o}$	$\frac{D{V}_{in}}{\Delta I_{in}{f}_s }$	NA	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB1C		$\frac{D{V}_{in}}{\Delta I_{in}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_o{f}_s }$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB1D		$\frac{D{V}_{in}}{\Delta I_{in}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_o{f}_s }$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB2D		$\frac{D{V}_{in}}{\Delta I_{in}{f}_s }$	$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_o{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$.	$\frac{V_{in}}{\left(1-D\right)}$
bB1E		$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_o{f}_s}$	$\frac{D\Delta I_{L1}}{4\Delta V_c{f}_s}$	$\frac{\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB2E		$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_o{f}_s }$	$\frac{D\Delta I_{L1}}{4\Delta V_c{f}_s}$	$\frac{\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB1F		$\frac{D\Delta V_c}{4\Delta I_{in}{f}_s}$	$\frac{D{V}_{in}}{\Delta I_{L2}{f}_s }$	$D\frac{I_o}{\Delta V_c{f}_s}$	$\frac{\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB2F		$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{\left(1-D\right)\Delta V_c}{4\Delta I_o{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	$D\frac{I_o}{\Delta V_c{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB1G		$\frac{D{V}_{in}}{\Delta I_{in}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_{L2}{f}_s }$	$D\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D{I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB2G		$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_o{f}_s }$	$D\frac{I_o}{\Delta V_c{f}_s}$	NA	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$
bB1P		$\frac{D{V}_{in}}{\Delta I_{L1}{f}_s }$	$\frac{D{V}_{in}}{\Delta I_{L2}{f}_s }$	$D\frac{I_o}{\Delta V_c{f}_s}$	$\frac{D\left(1-D\right){I_o}^2}{V_{in}\Delta I_o{f}_s}$	$\frac{I_o}{\left(1-D\right)}$	$\frac{V_{in}}{\left(1-D\right)}$

summarize the formulae employed to design the components of the buck, boost, and buck–boost DMSIs, respectively.

Experimental results are carried out for the different DMSIs to provide an estimate of their power losses and hence their efficiencies from 250 W to 2.5 kW. To provide a benchmark between all SPMIs, the parameters in

Table 8. Parameter values of the DMSIs in the experiments.

Parameter	Value
Switching frequency	fs = 20 kHz
Inductors	L1 = L2 = 1 mH
Capacitors	C1 = C2 = 20 μF
Output capacitor	Co = 1 μF
Load	R = 10 Ω
Switches	MOSFETs: IRFI4020H
Digital Signal Processor	TMS320F28335

have been used for all tests.

The efficiency comparison is shown in Figure 23, where the b1C DMSI has the best efficiency. The different voltage conversion ratios of the inverters from cell G (b1G and b2G) caused them to have the highest power losses and hence the lowest efficiency.

Similarly, the different boost DMSIs were tested using the same parameters in Table 8 but at lower power (from 100 W to 1300 W). Figure 24 shows the efficiencies of the different inverters with identical passive components. B1C and B1P have better overall efficiency than the conventional CSI. B2G has the worst efficiency because of the higher inductor and switch currents. For Cell D inverters, B1D has better efficiency than B2D for D < 0.5, while B2D has better efficiency for D > 0.5. B1E and B2E have comparable efficiency.

For the buck–boost DMSIs comparison in Figure 25, bB1C (Cuk) and Sepic (bB1G) have the lowest power losses and hence the best efficiency; this is because they have low inductor and switch currents. bB1D and bB1F have comparable efficiency. Comparing bB2D with both bB1D and bB1F, bB2D has a better efficiency for higher load power, while bB1D and bB1F inverters have better efficiency in the low-power region. The buck–boost topologies from cell E (bB1E and bB2E) have the lowest efficiency.

6. Conclusions

This paper categorized the buck, boost, and buck–boost inverter families used in low-power energy conversion. The concepts of the DM inverter have been explained, and the associated mathematical calculations for the duty–cycle ratios have been presented. The single-phase inverters derived from the SSSD converters were presented and compared. The comparison features include the shapes of the currents’ and voltages’ waveforms, the component sizes, and the high-frequency ripple. Inverters with small size and low ripples were used for RES applications, such as PV and fuel cells applications, to ensure maximum power harvesting. Although the total efficiency depends mainly on the conduction and switching power losses in the devices, it is important to ensure that input and output current ripples, which degrade the output power from a RES, are kept within a specific range. Other important features, such as reducing the THD, which requires passive elements with higher values, size, and weight, control complexity, and capacitor stresses were discussed. For the buck–boost inverters, the five topologies that allow for galvanic isolation with HF transformers or coupled inductors have been identified. The RHPZs of the buck–boost inverter were studied to assess the complexity of the required control design. Comparison tables summarize the main advantages and disadvantages of the DMSIs topologies to enable researchers and engineers to choose the suitable configuration for the targeted application and specifications.