Architectural Proposal for Low-Cost Portable Digital Oscilloscopes Based on Microcontrollers and Operational Amplifiers

Abstract

Recently, an increasing number of people have employed do-it-yourself (DIY) and do-it-with-others (DIWO) techniques and processes to develop unique technology products. This trend is commonly called the maker movement and fosters the creation of own electronic and mechanical devices and tools. Oscilloscopes are really useful tools to diagnose problems and analyze electronic devices and electrical circuits, and thus they should not stay outside this trend. To contribute to this field, an architecture to make low-cost portable digital oscilloscopes is proposed. The proposal is mainly based on general-purpose microcontrollers and operational amplifiers. Following this approach, a portable oscilloscope with two input channels, a graphic display, a synchronism detector, internal and external triggers, and a digital signal analyzer function is designed. Furthermore, different options for the implementation are proposed and discussed.

1. Introduction

Oscilloscopes play a key role in the diagnosis, design, and study of electronic devices. They allow the user to visualize voltage signals and perform measurements, both in real time. Its use has widely grown in the industry, scientific community, and more recently in the consumer electronics sector [1].

On the other hand, the growth of the maker movement is moving individuals to make their own electromechanical devices and tools [2,3]. This movement is primarily the name given to the increasing number of people employing do-it-yourself (DIY) and do-it-with-others (DIWO) techniques and processes to develop unique technology products. This approach offers some advantages: the adaptation to specific application requirements and price constraints, the possibility of finding faults and replacing components if an error occurs, the enhancement of the device if needed, the integration with other systems, and last but not least, the expertise and knowledge obtained in the field. Making an oscilloscope is the perfect way to learn and practice analog and digital electronics. It provides a motivating challenge to learn the working principles and the implementation of circuits with operational amplifiers, analog multiplexers, filters, analog-digital converters, digital-analog converters, and microcontrollers. Furthermore, learning-by-doing facilitates the development of meaningful learning to increase knowledge retention [4].

Several previous works related to oscilloscopes are focused on calibration issues. Kim et al. propose a method for calibrating the distortions produced by impairments of the analog-to-digital converters (ADCs) used in the digital real-time oscilloscopes [5]. A hybrid time-base (HTB) device for coherent sampling oscilloscopes is presented in [6]. The HTB device reduces the uncertainty of determining the time position of the sample in the horizontal channel of the sampling oscilloscope. Ovidiu-Catalin et al. describe a compensation PCB for the oscilloscope probes. The problem shown and solved comes from the necessity of having a long oscilloscope cable (3-m long) connected directly to a device under test (DUT) [7].

Other related works study how to use oscilloscopes in specific applications. In this line, Kazachek et al. developed a method to analyze photon pulses from photomultiplier tubes based on a digital oscilloscope and a computer that is used to set the thresholds and count pulses [8]. The iPad as a virtual oscilloscope for measuring time constants in RC and LR circuits is discussed in [9]. Angrisani et al. presented a remote laboratory that combined the use of an oscilloscope, a signal generator, a multimeter, and a Field Programmable Analog Array (FPAA) to emulate different circuits in [10].

However, the research works that are focused on oscilloscope design and digitizers are scarce. A digital oscilloscope architecture consisting of three parallel channels is presented in [11]. Each channel includes a sampler and a cascaded synchronous ADC. Thanks to frequency interleaving operations, the overall system bandwidth can be three times larger. Elfasie et al. propose the design of an oscilloscope based on using the Arduino interface LabVIEW [12]. Monsurrò et al. present and compare two architectures of 4-channel mixing-filtering-processing (MFP) digitizers: parallel and hierarchical [13]. A portable oscilloscope with a touch screen and 200 KHz of bandwidth is proposed in [14].

In this work, an architecture to make low-cost portable digital oscilloscopes based on microcontrollers and operational amplifiers is proposed. The noise in the analog section of the oscilloscope is analyzed. The functional modules, their interactions, and the main equations are detailed. In addition, different options for the implementation are proposed and discussed. Although different oscilloscopes could be created based on this architecture, component examples are given to design an oscilloscope with the following features:

• Low-cost.
• 2 channels, 4 MHz of real bandwidth, input impedance of 1 MOhm, DC/AC/GND selector, dynamic range: from 2 mV/div to 20 mV/div, maximum supported voltage 600 V.
• Synchronism modes: periodic and one capture.
• Trigger: from input channels and external.
• Digital display to work without being connected to a computer.
• Operation as a digital analyzer. Visualization of eight simultaneous digital signals.
• Digital handling without analog selectors.

The remaining part of the paper is structured as follows. The architecture of the oscilloscope is divided into modules in Section 2. Section 3 details the analog modules. Section 4 explains the synchronism detector. The digital modules are described in Section 5. The paper ends with the conclusions and future work lines. Finally, the Appendix A studies the noise in the system.

2. Abstract Oscilloscope Architecture

The abstract architecture of the oscilloscope is shown in Figure 1. It is composed of a synchronism detector, an analog section, a digital section, an analog-to-digital conversion section, a multiplexer, and a display.

The analog section is in charge of impedance adaptation, the channel selection, the AC/DC/GND selection, and the signal conditioning. As inputs, it receives the signals in the input channels and the CA (Control of Analog Section) signal from the digital section.

The synchronism detector detects and extracts the trigger information (sync signal) from the input channels. It receives as inputs the signals in the input channels (CH1, CH2) and the CS (Control of Synchronism) signal to select what input is used to detect the synchronism.

The analog signals are digitized by the ADC. The digital signal from the ADC (internal channel) and the external digital channels go through the multiplexer and are selected by the CM (Control of Multiplexer) signal.

The digital section supervises all the tasks carried out by the oscilloscope, maintains communication with the display, collects data from the ADC, and prints it out. It also attends the external petitions, provides a user-friendly experience, and adjusts the sampling frequency.

In summary, the signal flow path is as follows. The signals go through the analog section, where they are adjusted to the input range of the ADC. In the ADC, they are converted into digital format and fed to the digital section, where they are processed to be shown on the display. All these modules are explained in detail in the following sections.

3. Analog Section and ADC

Once the functionality of the main modules in the architecture and their interactions have been described. This section will analyze the fundamental equations and the behavior of each module inside the analog section and will explain how they can be implemented with operational amplifiers.

As commented before, the analog section is composed of different modules: impedance adaptation, DC/AC/GND selection, voltage reference adder, and signal conditioning. Some signal conditioning circuits do not provide a big input impedance. This leads to placing the impedance adaptation as the first stage of the analog section. The order of the modules in the analog section is depicted in Figure 2: impedance adaptation, AC/DC/GND selector, signal conditioning, vertical slider, and finally the ADC.

One important constraint to designing the circuits in the analog section is the voltage supply. A power supply of 9 V has been imposed as a requirement. This voltage facilitates the portability of the device as it can use 9 V commercial alkaline batteries or power banks. In addition, it also could use standard 9 V charge adapters. To work with the operational amplifiers, this 9 V must be converted into symmetric voltage ±4.5 V. This voltage will be key to selecting the electronic components.

In general, the procedure described above is applied in each channel of the oscilloscope. However, architectures that share some modules between channels can be implemented to save hardware costs. This only makes sense to measure periodic signals in both channels, in this case, in a trigger cycle, only one channel is captured, and in the following trigger cycle, the other input channel is captured. The only module that cannot be shared is the impedance adaptation, as the analog multiplexers usually provide low input impedance.

3.1. Selection of the Operational Amplifier

To make the impedance adaption and, in general, to construct all the stages in the analog section without losing quality in the signal, it is necessary to select a high-quality operational amplifier with specific features:

• Supply Voltage. It depends on the power supply used to power the oscilloscope. For the examples in this work, ±4.5 V has been set.
• Symmetric power. To work with positive and negative signals.
• High bandwidth. The bandwidth of the operational amplifiers must be at least as high as the bandwidth of the oscilloscope. In this case, we have set 1 MHz as a requirement.
• Rail-to-rail. This feature allows it to work close to the power range without saturation problems. Even if the OA has this feature, the range (−4—4 V) in the circuits has been used to work far enough from the saturation.
• High CMRR (Common Mode Rejection Ratio). It is key to guarantee a good common mode of rejection.
• Low harmonic disturbance. To reduce the noise introduction in the signals.

The bandwidth of an operational amplifier, $B{W}_{O{A}_i}$, can be approximated by (1).

$$B{W}_{O{A}_i}=\mathrm{m}\mathrm{i}\mathrm{n}\left\{\underset{f}{\mathrm{argmax}}\left(N{G}_i\left(f\right)\ge -3dB\right), \underset{f}{\mathrm{argmax}}(OV{S}_i\left(f\right)\ge V_{max})\right\}$$

(1)

where $N{G}_i:\mathbb{R}\to \mathbb{R}$ denotes the normalized gain in function of the frequency, $OV{S}_i\left(f\right):\mathbb{R}\to \mathbb{R}$ denotes the output voltage swing in function of the frequency, and the $V_{max}$ is the used range of the operational amplifier.

Based on the bandwidth of the operational amplifiers, the bandwidth of the whole analog section, $B{W}_{AS}$, can be estimated by (2), where $N_{OA}$ is the number of the operational amplifiers in the analog section.

$$B{W}_{AS}=\underset{i=1..N_{\mathit{OA}}}{\min }\left(B{W}_{O{A}_i}\right)$$

(2)

Then the effective bandwidth of the oscilloscope is given by

$$BW=\mathrm{m}\mathrm{i}\mathrm{n}\left\{B{W}_{AS},{\displaystyle \frac{fs}{2}},{\displaystyle \frac{1}{2t_c}}\right\}$$

(3)

where $fs$ denotes the sampling frequency and $t_c$ is the conversion time of the ADC. It is possible to see as the effective bandwidth of the oscilloscope is constrained by the analog section, the ADC, and the microcontroller.

Considering all these needs, one possible solution is the component AD8092. Figure 3 shows the normalized gain. It can be observed that the gain is perfectly maintained at 1 MHz. The −3 dB normalized gain is reached at 7 MHz. This is just one example. Depending on the budget and requirements, other operational amplifiers could be selected. The selection of the operational amplifier is key to guaranteeing the noise requirements. The noise analysis of the oscilloscope is shown in Appendix A.

If the signal is sampled very fast in the microcontroller but a slow OA is used, the expected bandwidth will not be reached. It is noteworthy that all electronic components, from the input to the capture, must fulfill this bandwidth.

On the other hand, the rail-to-rail characteristic changes with the frequency, so it is necessary to check that this feature is maintained at the required frequency. Figure 4 shows the variation in the output voltage swing in this OA. It is possible to see how the rail-to-rail feature is perfectly maintained at 1 MHz. However, as the working range is 4.5 V, the bandwidth can be extended to 4 MHz.

3.2. Impedance Adaptation and Device Protection

A key feature of any voltage measurement instrumentation is a high input impedance. To understand the problem, suppose one wants to measure the voltage in a voltage divider created by two resistors (Figure 5 left). As it is well known, this voltage is given by (4) [16].

$$V_{out}=V_{in}·{\displaystyle \frac{R_2}{(R_1+R_2)}}$$

(4)

where $R_1$ is the closest resistor to $V_{in}$ and $V_{out}$ is the voltage between terminals of the resistor $R_2$. However, if an equipment with an input impedance $R_{in}$ is used, as shown in Figure 5, right, then the measured voltage is given by (5) [16].

$$V_m=V_{in}·{\displaystyle \frac{R_2·R_{in}}{R_2·R_{in}+R_1 (R_2+R_{in})}}$$

(5)

When $R_{in}$ tends to be infinite, the measurement error $V_{err}=V_{out}-V_m$ tends to 0. However, when $R_{in}$ is low, the error grows and can be as high as $V_{out}$. Therefore, this impedance must be large enough to not disturb the measure. For further information on resistance derivations, such as those present in MOS (Metal-Oxide-Semiconductor) current, see [17].

To protect the device against high voltages while maintaining a high input impedance, the impedance adaption with a voltage divisor in series with a voltage follower can be implemented [18]. This scheme is shown in Figure 6. The voltage divisor of $R_1$ and $R_2$ protects the device, and the operational amplifier provides the impedance adaption. The resistor R3 can be used to adjust the offset of the amplifier.

The selection of the resistors $R_1$ and $R_2$ must fulfill simultaneously two different constraints:

$$R_1+{\displaystyle \frac{R_2·R_{ina}}{R_2+R_{ina}}}>R_{in}$$

(6)

$$Vcc>V_{max}{\displaystyle \frac{R_2·R_{ina}}{R_2·R_{ina}+R_1 (R_2+R_{ina})}}$$

(7)

where $R_{in}$ is the minimum input resistance that the oscilloscope must satisfy, $V_{max}$ is the maximum permitted voltage of the input signal, $Vcc$ is the power voltage of the instrument, and $R_{ina}$ is the input resistance of the operational amplifier. The first constraint is needed to guarantee the input impedance. The second constraint is required to protect the device. The adjustment of $R_1$ must be performed according to the selected operational amplifier. For example, if the operational amplifier model AD8092 is used, the value of $R_{ina}$ is 290 KOhm, then if the commercial values $R_1$ = 1.0 MOhm and $R_2$ = 91 Kohm are set, the $Z_{in}$ obtained is 1.07 MOhm, and the maximum input signal range is (−69, 69 V) for a symmetrical power supply of ±4.5 V. The voltage divider divides the value of the input signal between 15.

3.3. DC/AC/GND Selector

Oscilloscopes usually have a DC/AC/GND selector. When DC is selected, the whole signal is displayed, however, with AC, only the alternating component is displayed. The GND selects a 0 volts signal. This 0-volt signal may seem useless a priori; however, this makes sense when the vertical beam position is updated. The selection may be implemented by an analog multiplexer. The extraction of the alternating component is normally created by a high-pass filter (HPF). The HPF may be carried out by monolithic integrated circuits as [19], or by operational amplifiers as the Sallen-Key topologies [20].

The implementation of a double DC/AC/GND selector can be conducted by an operational amplifier together with an analog multiplexer with the topology depicted in Figure 7. The parasitic offset introduced by the operational amplifier can be removed by adjusting the Roff resistor. The operational amplifier is working on inverting amplifier configuration [18]. In Figure 7, the symbol ADG508A indicates the analog multiplexer.

By adjusting the digital inputs of the analog multiplexer, the AC, DC, and GND operations can be selected, as described in

Table 1. Operation selection with the DC/AC/GND selector.

A2	A1	A0	Operation
0	0	0	DC Channel 1
0	0	1	AC Channel 1
0	1	0	DC Channel 2
0	1	1	AC Channel 2
1	X	X	GND

.

The AC inputs are implemented with a high-pass filter in these inputs of the multiplexer. The transfer function between each of these inputs and the output is represented by (5). Of course, it is only applicable when the input is selected by the analog multiplexer. The values of the resistor R and capacitor C in Figure 7 are represented by $R_{AC}$ and $C_{AC}$ in (8).

$${\displaystyle \frac{V_{out}\left(s\right)}{V_{in}\left(s\right)}}=-{\displaystyle \frac{R_2}{R1}}{\displaystyle \frac{R_{AC}·C_{AC}·(R_1+R_{mux})·s}{R_{AC}·C_{AC}·(R_1+R_{mux})·s+(R_{AC}+R_1+R_{mux})}}$$

(8)

where $R_{mux}$ is the internal resistance of the analog multiplexer, $R_{AC}$ and $C_{AC}$ are the resistance and the capacitor of the high-pass filter, and finally $R_1$ and $R_2$ are resistors to adjust the gain.

The gain and the cut-off frequency of this high-pass filter are given by (9) and (10).

$$G={\displaystyle \frac{R_2}{R_1}}$$

(9)

$$fc={\displaystyle \frac{(R_{AC}+R_1+R_{mux})}{2\pi R_{AC} C_{AC}\left(R_{mux}+R_1\right)}}$$

(10)

Ideally the on resistance of an analog multiplexer, $R_{mux}$ in (5) and (7), is zero, but this is not real in the practice. If the device ADG508A is used as an analog multiplexer the value of $R_{mux}$ is 500 Ohm. The value of $fc$ can be set adjusting $R_{AC}$, $R_1$, and $C_{ac}$. Once these values are set, the gain of the filter can be adjusted with $R_2$. For example, if the commercial values $R_1$ = 100 KOhm, $R_2$ = 100 KOhm, $R_{AC}$ = 100 kOhm, and $C_{ac}$ = 3300 nF are set, a fc of 1 Hz and a unit gain were obtained. This frequency is low enough to remove the DC component of the signal without affecting the other frequencies of the signal. These values can be adjusted considering the frequency spectra of the signals to be studied.

3.4. Signal Conditioning

The signal conditioning is the most important module in the analog section. It is used to match the range of the input signal to the input range of the ADC. In the oscilloscopes, the input range is normally chosen by the selector V/DIV, and there is a predefined set of ranges. The range adapter divides or multiplies the values of the input signal to adjust the input range signal to the range of the ADC. If the selected range is larger than the range of the ADC, the signal is divided by a constant; if the range is smaller, the signal is amplified by another constant. The value of the constant depends on the selected range.

For instance, let us assume that an 8-bit converter with an input range of 5 V is used, with three predefined input ranges: (−15 V, 15 V), (−6 V, 6 V), and (−3 V, 3 V), and the input signal has a range (−1 V,1 V). If the range (−15 V, 15 V) is selected, the range adapter divides the input signal between 6. This way the range (−15 V, 15 V) = 30 V is mapped to the voltage range (0 V, 5 V) = 5 V of the ADC. Then, in a general way, the signal output of the range adapter and input of the ADC ($V\_input\_ADC$) is given by the expression.

$$V\_input\_ADC=V\_input{\displaystyle \frac{{\mathrm{R}\mathrm{a}\mathrm{n}\mathrm{g}\mathrm{e}}_{\mathrm{A}\mathrm{D}\mathrm{C}}}{{\mathrm{R}\mathrm{a}\mathrm{n}\mathrm{g}\mathrm{e}}_{\mathrm{a}\mathrm{d}\mathrm{a}\mathrm{p}}}}$$

(11)

On the other hand, the voltage associated $∆V$ with a step of the ADC (considering an ADC of $n$ bits) is given by (12).

$$∆V={\mathrm{R}\mathrm{a}\mathrm{n}\mathrm{g}\mathrm{e}}_{\mathrm{A}\mathrm{D}\mathrm{C}}/2^n$$

(12)

Based on this step, the number of digits used in the ADC considering the range of an input signal, $DI{G}_{values}$, is given by (13).

$$DI{G}_{values}={\displaystyle \frac{Rang{e}_{signal}}{∆V}}=2^n{\displaystyle \frac{Rang{e}_{signal}}{{\mathrm{R}\mathrm{a}\mathrm{n}\mathrm{g}\mathrm{e}}_{\mathrm{A}\mathrm{D}\mathrm{C}}}}$$

(13)

If a signal with the range (−1 V, 1 V) is introduced and the range (−15 V, 15 V) is selected, the signal is divided by 6. Thus, the range of the signal goes from (−1 V, 1 V) to (−1/6 V, 1/6 V) = 1/3 V. Thus, considering (3) the number of digital values used by the ADC is $DI{G}_{values}=256 \ast \left[\right(1/3)/5]\cong 17,$ that is 5 bits. If the range (−6 V, 6 V) is selected, only 42 values are used, that is 6 bits. Finally, if R3 is selected, 85 digital values of the converter are used, that is 7 bits. As shown, a better match between the signal input range and the range of the signal conditioning provides higher fidelity in the signal representation.

Signal conditioning can be implemented by operational amplifiers. As the signal input range has negative and positive values and the converter is only positive values, two different operational amplifier configurations are normally needed. An amplifier is used to scale the range, and the other is used in adder configuration to elevate the negative input values and make them positive. A different gain needs to be used for each different V/DIV. To do it, it is possible to change some of the resistors in the amplification configuration as the gain is a function of the relationship between the resistors. If the selector is analog, this can be performed directly by a mechanical switch, however, if it is digital, as in our case, an analog multiplexer must be included in the circuit.

The variable signal conditioner to adapt to the different DIV ranges can be implemented with analog multiplexers and operational amplifiers. The ranges can be adjusted by the relationship between the selected resistors. The selection of resistors should be made to meet the required gains, but care should be taken not to use extremely high resistor values, as they may introduce unwanted low-pass filters due to parasitic capacitors in the circuit. When this may be trouble, a solution is using several amplification stages in the cascade. In this line, Figure 8 shows a topology to implement a variable signal conditioner with two operational amplifiers in cascade. Each operational amplifier is working in an inverting amplifier configuration [18].

The output voltage of this circuit is given by (14).

$$V_{out}=V_{in}{\displaystyle \frac{R_{var\_1}+R_{mux\_1}}{R_{in\_1}}}·{\displaystyle \frac{R_{var\_2}+R_{mux\_2}}{R_{in\_2}}}$$

(14)

where $R_{var\_1}$ and $R_{var\_2}$ are the resistors selected by the analog multiplexers 1 and 2, and $R_{in\_1}$ and $R_{in\_2}$ are the resistors in serial with the multiplexors. $R_{var\_1}$ changes with channel selected, for example, attending Figure 8, if the channel S1 is selected, the value of $R_{var\_1}=R_{mux}+R1\_1$.

Each V/DIV in the V/DIV selector must be assigned a specific gain to adapt it to the range desired for the vertical slider. It is also necessary to consider the gain of the impedance adaption phase, due to the voltage divider to protect and reduce the voltage of the input signal (4). With the example values given in Section 3.1, the amplitude is divided by 15. Let us assume that the input range for the vertical slider is (−2 V, 2 V), this way the output of the vertical slider will vary in range (−4 V, 4 V). In this case,

Table 2. Example of gain calculation for the variable signal conditioner.

V/DIV	Vin MAX	MAX Vinput at Variable Signal Conditioner	Desired Vout at Variable Signal Conditioner	Gain in the Variable Signal Conditioner
10 V	30 V	2 V	2 V	1
5 V	15 V	1 V	2 V	2
2 V	6 V	400 mV	2 V	5
1 V	3 V	200 mV	2 V	10
500 mV	1.5 V	100 mV	2 V	20
200 mV	600 mV	40 mV	200 mV	50
100 mV	300 mV	20 mV	100 mV	100
50 mV	150 mV	10 mV	50 mV	200
20 mV	60 mV	4 mV	20 mV	500
10 mV	30 mV	2 mV	10 mV	1000

shows an example of the gain calculation. It is assumed that the oscilloscope will have six vertical divisions. Thus, the maximum voltage signal will be 3×V/DIV. For instance, if the range selected is 10 V V/DIV the maximum amplitude to be represented will be 30. As the impedance adaption divides it between 15, the maximum input in the signal conditioner will be 2 V in this case. As the maximum desired voltage at the output of the variable signal conditioner is 2 V, the gain of this module must be 1.

In this example, the ten different gains are needed, however, as the selected analog multiplexer only has eight channels, two analog multiplexers are needed. This process can be adjusted depending on the desired ranges of the signal and the configuration of the oscilloscope. In order to reduce combinations as much as possible, these gains can be redistributed, as shown in

Table 3. Example of gain redistribution between stages of the variable signal conditioner.

Total Gain	Gain 1	Gain 2
1	1	1
2	1	2
5	5	1
10	5	2
20	10	2
50	10	5
100	100	1
200	100	2
500	100	5
1000	100	10

.

This way, only four gains per stage are needed, as shown in

Table 4. Example of gains required per stage in the variable signal conditioner.

Gain 1	Gain 2	Channel
1	1	11
5	2	10
10	5	01
100	10	00

.

Therefore, 2 bits per stage, i.e., 4 bits, are required for control. It is important to note that, as far as possible, the highest gain should be placed in the first stage to reduce the noise.

According to (8), the minimum gain value is given for $Rva{r}_1=0$, as the minimum gain must be 1, then the condition $Ri{n}_1=Rmu{x}_1$ must be fulfilled. This also happens with the second stage. Thus, $Rvar$ must be computed based on the value of the on-resistance of the analog multiplexer. Based on this fact, the values to be placed in the output channels of the analog multiplexers can be calculated (

Table 5. Example of resistor values to be placed at the output channels of the analog multiplexers.

Channel	Gain 1	$\mathit{R}\mathit{v}\mathit{a}{\mathit{r}}_1$	Gain 2	$\mathit{R}\mathit{v}\mathit{a}{\mathit{r}}_2$
11	1	0	1	0
10	5	4Rmux_1	2	Rmux_2
01	10	9Rmux_1	5	4Rmux_2
00	100	99Rmux_1	10	9Rmux_2

). The explained procedure could be applied for other different gains.

3.5. Vertical Slider

When using an oscilloscope, it is very useful to be able to raise and lower the signal on the screen at will. This is possible thanks to the vertical slider. This module adds a voltage reference to the output of the signal conditioner. To avoid saturation problems, this addition must be performed in the analog section instead of the digital section. To understand the problem, see Figure 9. AS denotes Analog Section, and DS means Digital Section. The image at the left represents a sinusoidal signal with amplitude A. The motivation of the vertical slider is to observe more clearly the positive or negative semicycle of a signal. To do it, this signal is amplified by two, thus the new amplitude is 2A. Then, if V_ref is decreased to −A, the whole positive semicycle with amplitude 2A can be observed (Figure 9b).

On the other hand, if the slider was implemented in the digital section just moving pixels, the problem of the saturation would appear. When the signal is doubled, the operational amplifiers reach saturation, and the largest values of the signal are fixed to the saturation value. Then, if the pixels are moved in the digital section to draw the signal in a different position, a straight line is observed at the top part of the signal due to the saturation (Figure 9c).

As explained and shown in Figure 2, the output of the variable signal conditioner feeds the input of the vertical slider. This component can be implemented by an adder topology [18] in cascade with an inverting amplifier, as depicted in Figure 10.

The output voltage of this circuit is given by the expression (15).

$$V_{out}={\displaystyle \frac{R_5}{R_4}}\left({\displaystyle \frac{R_3}{R_1}}{V}_{in}+{\displaystyle \frac{R_3}{R_2}}{V}_{ref}\right)$$

(15)

The voltage $V_{ref}$ can be adjusted by a potentiometer. But to do this completely in a digital way without potentiometers, a Digital to Analog Converter (DAC) commanded by the microcontroller can be used.

In that case, DACs based on Pulse Width Modulation (PWM) should be avoided to prevent introducing disturbances into the measurement. Therefore, a suitable candidate could be a well-known electronic component, as the DAC0800. Digitally, we are able to control the current passing through the converter, we do not directly control the voltage. It is like a variable resistor; if an external voltage is set, it is possible to control the current with which that voltage is discharged by adjusting the digital inputs of the DAC.

Different values can be set in resistors R1—R5 to configure the behavior of the vertical slider. For instance, if the input range is (−2 V, 2 V), the voltage reference range is (−2 V, 2 V), and the output of the vertical slider is (−4 V,4 V) the set of resistor values R1 to R5 can be set to 1 KOhm.

3.6. Analog to Digital Converter

It is necessary to choose a converter capable of offering the desired time characteristics (we must not be satisfied with the conversion time $tc$, it is also necessary to check that the conversion interface adapts to the possibilities of the digital section). We must pay attention to the number of precision bits and whether the converter returns the data in parallel or in series. It is also important to pay attention to the supply voltage required, the signal-to-noise ratio (SNR), and the ENOB (Effective Number of Bits). Otherwise, it can happen that the benefits of a carefully designed analog stage, studied to introduce as little noise, are ruined by a poor choice of the ADC.

Most modern low-cost microcontrollers offer analog converters inside with sampling rates of a few MSPS (mega samples per second). For example, the STM32H5 family from ST Microelectronics Feature ADC sampling rates of up to 5 MSPS with a 12-bit resolution. Combined with DMA (Direct Memory Access) capability, it makes a good choice for this home-made application, as it reduces the part count. These devices have two independent ADC and two DMA peripherals, so two input oscilloscope channels can be sampled simultaneously and stored in microcontroller internal memory.

In case higher sampling frequencies are required, another option is to use external flash-based ADCs. For instance, the ADC1175 could be used as an external ADC. The ADC1175 is a low power, 20 MSPS analog-to-digital converter that digitizes signals to 8 bits while consuming just 60 mW of power (typical). The ADC1175 uses a unique architecture that achieves 7.5 effective bits. Output formatting is straight binary coding.

In any case, it is recommended to use the following search criteria:

-

Effective Number of Bits: ENOB. Instead of the number of bits of the converter, it is better to use the ENOB. The ENOB is a measure of the number of effective bits of the conversion. For instance, if an 8-bit converter has an ENOB of 7.6, it means that only 7 bits are really effective. Thus, to ensure a clearance in the accuracy, it is recommended to consider the truncation of the ENOB.

-

Minimum conversion time: tc. This time must be set depending on the expected bandwidth. If the expected bandwidth is BW, to comply with the Nyquist criteria, the sampling frequency should be greater or equal to 2 × BW, and thus the conversion time should be less than 1/2 × BW. This is the minimum theoretical sampling frequency, however, in practice, it is preferred to sample faster to work far from the Nyquist frequency, for example, working at 5 × BW.

-

Simple sampling time schedule: continuous sampling with no waiting for enabling. If an external ADC is used, this feature facilitates the interface ADC-microcontroller and contributes to maximizing the performance of the microcontroller.

-

Low supply voltage: the supply voltage must match with the supply voltage available in the device. In our example, the supply voltage is +4.5 V.

-

Input range: this input range must match with the range established in the signal conditioning. In our example, this value is 4 V.

4. Synchronism Detector

A digital oscilloscope can capture and display periodic signals and finite duration signals. In the first case, the extraction of the synchromism plays a key role, without this component, the image would move on the screen, and taking measures would be impracticable.

The general process to display a signal is the following: first the signal is captured, then the screen is cleared, and finally the captured data are displayed. If the signal is periodic, this process is repeated cyclically. If the data captured in two consecutive iterations are different, the image displayed on the screen will also be different. This would be perceived by the user as a moving image.

To start the capture always at the same points of the signal’s cycle, a common practice is to detect when the signal crosses a specific voltage level. For example, it would be easy to detect when the signal is bigger or less than zero volts by a comparator. This can be easily implemented by an operational amplifier. However, if the signal has a DC component, perhaps it does not cross the zero value. Thus, the voltage value to compare the signal is not fixed but variable, normally by a potentiometer. This voltage value is usually named the trigger level. Instead of having an external trigger voltage level, it is also possible to eliminate the DC component by applying a high-pass filter and then detect when the signal crosses the zero value.

In addition to detecting zero crossings, it is also possible to extract the synchronism by applying a band pass filter with a high gain in the passband. This filter can remove the DC component and also reduce the noise at high frequencies. If the passband gain is sufficiently high, the operational amplifier will saturate and act as a comparator. This configuration is less sensitive to noise problems than standard comparators.

In Figure 1, it is possible to see how the output of this module is the signal sync. The synchronism detector can extract the sync signal from channel 1 or channel 2, but not simultaneously. The CS signal is used to select what channel is the source of the synchronism. This selection can be implemented by a multiplexer. If two different sync signals were produced, one per channel, with triggers at separate times, and each signal was displayed with its own sync signal, it would not be possible to measure the phase difference between the signals.

As explained, it is possible to implement a synchronism detector with a pass-band filter with a high gain in the pass band. Figure 11 shows an implementation of this device with an operational amplifier and an analog multiplexer. The analog multiplexer is used to select the signal from which to extract the sync. The resistor R4 is used to adapt the voltage to the input of the microcontroller, as this input must not receive a negative voltage.

The transfer function between the selected signal and the output synchronism detector is given by (14).

$${\displaystyle \frac{V_{out}\left(s\right)}{V_{i{n}_s}\left(s\right)}}={\displaystyle \frac{R_1{C}_{1}s}{1+\left(R_1+R_{mux}\right)C_{1}s}}\left({\displaystyle \frac{1+\left(R_2+R_3\right)C_{2}s}{1+R_2{C}_{2}s}}\right)$$

(16)

where $V_{i{n}_s}\left(s\right)$ is the signal selected by the multiplexor, $R_{mux}$ is the resistance of the multiplexor, and [$C_1$, $C_2$, $R_1$,$R_2$,$R_3$] can be selected to adjust the frequencies and the gain of the filter. Some examples of values that can be used in this circuit are $R_1$ = 100 KOhm, $R_2$ = 220 Ohm, $R_3$ = 220 Ohm, $C_1$ = 3300 nF, $C_2$ = 33 pF.

5. Digital Section and Visualization

The digital section oversees the following functionalities:

• Execution control: The digital section controls continuously what the equipment is doing. It must be able to provide an uninterrupted execution flow and to control the different stages that make up the oscilloscope.
• Control of the sampling frequency and mode: In this stage, the data coming from the converter are sampled; therefore, the sampling frequency desired by the user needs to be defined. The activation of the different sampling modes is controlled: refresh mode, capture mode, or freeze mode.
• Measurement control: It oversees managing the calculation operations related to measurement, such as: variation of T/DIV and V/DIV and the determination of the cursors.
• Visualization: This is responsible for managing communication with the display and for shaping the image to be presented on the screen.
• User interface management: The user interface shall be constructed by means of a menu system.
• Attention of external interruptions: It checks if the user has pressed any button and acts accordingly.

All these functions can be performed by different software modules. The digital section can be considered as a conglomerate of logical modules orchestrated by a control unit. As was performed in the analog section, the section can be decomposed into multiple functional blocks, as shown in Figure 12.

The module in the middle of the figure is the control unit (CU). This module is essential in microprocessors and, in general, in all devices composed of several digital components. In the case of software applications, this is the main execution flow. This is the block that is responsible for orchestrating the rest of the components, it is responsible for requesting each component what it must do at any given moment. The communication between the CU and the other blocks is bidirectional, as the CU must send the action to be executed, and the blocks have to report their status.

Regarding the communication inside and outside, as a means of communication between the sampling block and the visualization stage, a memory area has been represented where the samples are stored. While communication with the outside of the digital section is bidirectional, there are blocks that need to receive input data (Interface Management, Sampling and Synchro) while others provide information to the outside (Visualization and Analog Control).

The visualization module manages the digital signals to control the display in both modes: graphic and character. It generates all the menus, grids, and information to be displayed. The measure management module is in charge of performing measurements in the signal, such as the cursors and the adjustment of the values considering the voltage and time division. The synchronism module controls the synchronism detector, generating the signals to select the correct internal or external synchronism source, and ensuring that the signal is static on the screen when the sampling is working in refresh mode. Finally, the interface module is in charge of the user menu and attends to the buttons pressed by the user. The sampling module manages the sampling mode: refresh, capture, or freeze, it also receives the data provided by the ADC and stores it in memory.

Figure 13 shows the flowchart of the working principle of the oscilloscope. It can work in three different modes: Refresh (Mref), Capture (MCap), and Freeze (MFreeze). The refresh mode is the mode in which the signal is continuously refreshed, i.e., erased and redrawn, on the screen. For its correct representation, the signal to be represented must be periodic. Otherwise, the synchronism would be lost, and the signal would dance on the screen.

In the capture mode, the signal is only painted once on the screen. This mode is very useful in representing transients or impulsive type signals. Finally, the freeze mode is the same as the refresh mode but allowing the user to keep the image still when desired.

The first step in the flowchart is to initialize all the internal configuration parameters used by the digital section to a known state. One possible initialization is to start in capture mode with a single DC channel. After initialization, the system checks the type of active mode and acts accordingly.

Depending on the mode, the performance is different:

• Refresh mode: The signal is synchronized. Sampling is performed. The signal on the screen is erased, and the new signal is painted.
• Capture mode: If the capture bit is active, it samples the signal. It erases whatever is on the screen, paints the captured signal, and disables the capture bit, so that only a single capture is performed. The user activities capture the bit from the interface.
• Freeze mode: If the freeze bit is not set (meaning that the signal has not been frozen), then it works in the same way as the refresh mode.

Before passing from one stage to another, the CU always waits for the previous stage to finish. Finally, it activates the interface management to know if the user has requested the execution of any function, in case there is any requested function, it executes it.

It is important to note that the system has two behaviors when collecting the signal, a synchronous one in which the system waits for the synchronism signal before sampling (refresh and freeze mode), and an asynchronous one in which the signal is sampled at the instant the user wants (capture mode).

When the user selects capture mode, he/she leaves a pending request to switch to capture mode. The CU will evaluate if there are any pending requests, and view the requests to switch to capture mode. The CU executes the function of switching to capture mode, in this case, it instructs the display stage to delete and marks the capture mode in the mode register. When the user wants to make a capture, it will leave pending the capture request, the capture function enables the capture bit (Cap); then, in the next execution of the loop, if it picks up the signal, it only does so once because after painting, the capture bit is disabled.

On the other hand, the frozen mode works in a different way, by selecting the frozen mode, the user may wish to freeze the signal. What this function does is enable the freeze bit (Con), so the image is frozen since the next execution does not erase the signal from the screen, the image remains frozen until the user requests the defrost function. The defrost function disables the freeze bit, so that in the next execution of the loop, it will behave similarly to the refresh mode.

5.1. Selection of the Embedded Device

The following recommendations can be considered when selecting the embedded device to implement the digital section:

• Type of device. There are different alternatives to implementing the digital section. Microcontrollers are the cheapest option, they normally include embedded ADCs, flash program memory, and communication protocol handlers to facilitate the interaction with external devices such as the display; however, if high sampling frequencies are required, it may not be fast enough. For high sampling frequencies, the next option could be to use a Digital Signal Processor (DSP). DSPs are normally more expensive but faster than microcontrollers, and provide specific features for signal processing, such as specific Fast Fourier Transform (FFT) instructions useful to analyze the frequency spectrum of the signal, and MAC (Multiplication and Accumulation) instructions to implement digital filters. For very high sampling frequencies, the best option is using an FPGA (Field Programable Gate Array). At present, some of these devices have embedded ADCs and interface handlers as the microcontrollers but can work with very high sampling frequencies.
• Direct Memory Access. DMA allows to transfer information between subsystems and the memory without intervention of the central processing unit. This way, the data provided by the ADC can be directly stored in the memory. This capability is useful for both internal and external ADCs, as the data transfer can be performed between external ports or the internal ADC and the memory. It is recommended to select devices with this capability to save clock cycles and facilitate the sampling management.
• Embedded RAM. It is needed to store the samples of the signal for further processing. If the device has embedded RAM, the circuit development is simpler and the data transfer is faster, thus, devices with embedded RAM are recommended.
• Embedded ADCs. The number of ADCs determines the number of signal channels that can be simultaneously sampled. For a dual-channel oscilloscope, it is recommended to use embedded devices with two embedded ADCs. There are some FPGAs that have several embedded ADCs [21]. However, it is always necessary to check the conversion time of the embedded ADC, as it limits the sampling frequency. If the conversion time of the embedded ADCs is not enough, external ADCs can also be used (Figure 1).
• Embedded clock. Embedded devices normally have an embedded clock. This feature facilitates the electronic development and is highly recommended.
• CPU Speed. It is normally measured in MIPS (Millions in Instructions per Second) or MFLOPS (Millions of Floating Operations per Second). As the user cannot perceive fast changes in the screen, the samples are first stored, then processed, and finally displayed. Therefore, when the device has DMA, the number of MIPS is not so determinant in the sampling frequency. When the device has no DMA, it is needed to take into account that the total MIPS cannot be directly used as sampling frequency, as at least two instructions per sample are needed: one to move from the ADC to the memory position and another to increment the memory pointer.
• Number of GPIO. The number of general-purpose input output pins (GPIO) must be high enough to ensure the correct interface with the analog section. Per channel, four pins for the signal conditioner and two pins for the AC/DC/GND selector are needed. The ADC needs one special pin for analog signals if the ADC is embedded, or 8–12 pins to transfer the digital sample if the ADC is external.
• Low consumption. Embedded devices with large power consumption complicate the design of the power source, making it necessary to use switched-mode power supplies. These power supplies can introduce noise into the system, and it is necessary to isolate them to work with positive and negative signals.
• Package type. If the oscilloscope is planned to be tested with protoboards, the DIP format is recommended, as adaption sockets or soldering skills are not necessary. If the oscilloscope is implemented with PCB, the maker needs to consider that there are package types difficult to be manually soldered as BGA, and SOP, SOIC, and QFP are easier.
• Development tools. Manufacturers of embedded devices provide Software Development Kits (SDK) to program and debug the code in the devices. In addition to these manufacturer tools, there are general embedded simulation tools, such as PROTEUS [22]. These tools allow to simulate analog and digital circuits and contribute to accelerating the development of electronic solutions. It is recommended to use embedded devices supported by some of these simulation tools.

Different embedded devices can be selected following the previous guidelines. Some recent, such as the series STM32H5 from ST, which provides embedded DMA and two embedded ADCs (but with LQFP packaging, which complicates prototyping with protoboards); or even older ones like the PIC16F87 from Microchip, in which an external ADC is recommended, but with DIP packaging, which facilitates prototyping.

5.2. Sampling

Usage of ADC combined with DMA is pretty straightforward in modern microcontrollers, as manufacturers offer extensive HAL (hardware abstraction layer) libraries to configure peripheral operations. ADC and DMA peripherals work in the background without affecting the main execution loop, so the main program can perform other functions and access the captured data only when necessary.

For a good signal representation, circular buffer configuration and continuous sampling are proposed. Using this configuration, it is possible to have data already captured when the trigger event occurs and is possible to represent an interval that shows the signal before and after the trigger (Figure 14).

To ensure constant sampling, a timer shall be configured in the microcontroller to activate the start of each sample capture. Timer frequency shall be adjusted to optimize the memory buffer usage, considering the time/div selected by the user. For small time/div selections (in the μs order), maximum timer frequency shall be configured. When a higher time interval wants to be represented, it is necessary to slow down the timer to increase the time between samples.

$$Mem\_buffer\_time={\displaystyle \frac{Mem\_buffer\_size}{f_s}}$$

(17)

For microcontrollers without DMA, a less intuitive approach can be followed: Obtain a constant capture period by keeping a controlled number of microcontroller Central Processing Unit (CPU) cycles between samples. The microcontroller will be busy during the complete capture buffer, disabling interrupts and using only the strictly necessary instructions to read ADC data and store it in the random-access memory (RAM). Between each capture, there must be the same instruction cycles, so a known delay is inserted to complete the period time. This process is shown in Figure 15. For a reduced component count and ease of design, the first option should be a microcontroller featuring enough RAM to hold the capture buffer (and of course all the other necessary program variables), otherwise, an external RAM shall be used.

5.3. Display

To get a good signal quality in the display without wasting resources, vertical screen resolution and ADC resolution (2ⁿ bits) should be as close as possible. Screen horizontal resolution and buffer size should be in the same order (screen resolution should be larger to reserve some space for signal info and user menus). A minimum screen resolution of 128 × 240 pixels is recommended, to be able to display signals with a vertical precision of at least 100 possible values and with a horizontal resolution of at least 160–200 points in order to represent several cycles of a signal with decent accuracy. This is the authors’ recommendation; however, other resolutions could be used.

To display captured data for the user, a small Liquid Crystal Display (LCD) or Thin Film Transistor (TFT) screen can be used. There are open libraries available online for the most popular displays, such as the Light and Versatile Graphics Library (LVGL) [23].

LVGL has an updated list of LCD controller libraries, with different interfaces (one of the most common interfaces is SPI). It also offers a wide number of examples for displaying objects such as text, lines, buttons useful to represent oscilloscope signals, and user menus with no great effort.

5.4. User Interface

User interface may be through a traditional interface of buttons or using a touch screen. For any of the solutions, the approach followed does not change much: an interrupt shall be generated when a push or touch is detected. It is particularly important that these actions do not disturb the main operation of retrieving signal samples from the ADC and storing these values in the RAM memory.

Depending on the display mode selected (typical modes are Normal, Auto, and Single), displayed data would be refreshed periodically (Normal/Auto) or the image would be captured and frozen (Single). This mode is especially useful to have time to inspect the behavior of the captured signals. For refresh modes, it would be desired to capture a data buffer, display it as fast as possible, capture again, and refresh the screen with the newly captured data. Screen refresh rate would be determined by the time/div setting. Figure 16 shows an example of the graphical menu.

To get a functional device, a menu to access different options shall be available. To navigate between menus and submenus, the current position must be tracked down to not lose focus. The complexity in the management of a menu increases exponentially with the number of submenus, the number of links, the functions associated with the items in the menu, etc. Another very problematic part is the control of what it has to do in each moment depending on the button pressed. The complexity is enormous, to do it by flat code it would require a very high number of checks, and it would turn the code into something almost unreadable, not to mention what would happen every time a modification in the menu needs to be performed, reorder it, add a new link, or add new submenus. To solve these problems, an FSM (finite-state machine) structure with current menu position and transitions to another position depending on the user action is the most straightforward solution. Figure 17 shows an example of an FSM where E1 to E6 represent examples of states and the set [L, R, U, D, O] is the set of buttons handled by the user. L means “Left button”, R denotes “Right control button”, U means “Up control button”, D means “Down control button”, and O denotes “OK control button”. This control buttons allow the user to move between the menus (Figure 17).

In the design of sequential systems, each state has at least one associated output, indicating how the system has to behave in each state. In this case, it is not interesting to associate an output to each state, but associating functions. Associating a function to each state is a mistake, if this is performed, the function would be carried out continuously until the state changes. There may be functions that only need to be executed once, and if they are executed twice, the result is not correct. Five functions must be associated with each state, one for each button, in this way, the function would not be continuously executed, it would only be carried out when the user requests it, that is, when one of the five buttons is pressed. Each time the user presses a button, a function is executed, and the state switching is evaluated.

There are different possible options for the menus in the graphical interface. In our implementation, the main screen allows access to the Signal Menu, to the Mode Menu, and to Options (Figure 18). This figure also shows the associated FSM.

When the user is on this screen and the selector is the first position of the menu (E0), there are only two possible transitions in the FSM. The user can press D and the selector goes down (E1), or the user can press O to move to the signal menu (E4). The switching of states can be stored in a table in the ROM to be managed by the microcontroller, such as

Table 6. Example of switching state table associated to the general screen.

State	L	R	U	D	O
0	0	0	0	1	4
1	1	1	0	2	8
2	2	2	1	2	12

. The functions associated with each button can be also stored in a table in the ROM (

Table 7. Example of function table associated to general screen.

State	L	R	U	D	O
0	-	-	-	Move down Selector	Paint Signal Menu
1	1	1	Move down Selector	Paint Signal Menu	Paint Signal Menu
2	2	2	Move down Selector	-	Paint Options Menu

). In this case, in the microcontroller can be stored, for example, the memory address where the function to be executed is stored.

When the user selects the signal menu, the interface changes to the screen shown in Figure 19. This is the main interface to visualize analog signals.

When the user changes the scale in one of the channels, the gain in the variable signal conditioner of the analog section must change. When the user changes the selector AC/DC/GND the digital signals A0–A2 in Figure 7 and Table 1 must be updated to select the desired option. The vertical slider is adjusted by selecting V_ref on this menu. In this case, the general menu map implemented is shown in Figure 20.

One of the most useful characteristics of digital oscilloscopes is the possibility of obtaining measures from the captured signals. They can be manual measures, moving vertical and/or horizontal cursors through the screen and showing their position. Another possibility is to allow the oscilloscope to track the captured signal by setting an ‘x’ position on the time axis (horizontal) and reading out the vertical position on the voltage axis. Depending on the microcontroller used, it may not be prepared to perform arithmetic operations without slowing down the device and making the user experience annoying. In that case, it is possible to use look-up tables to obtain immediately the results based on the x and y positions and the current V/DIV selection.

Figure 21 shows an example of the implementation of the graphical interface to operate with cursors. From this interface, up to two cursors can be activated simultaneously to provide information on the signals available on the screen. The cursor position is represented by a square. To have a user-friendly interface, it is better to select the position of the cursors on the time axis. The position on the vertical axis shall be automatically calculated according to the signal, and the cursors shall be superimposed on the value of the selected signal at that point.

An extra feature easy to implement in a digital oscilloscope is a logic analyzer. When debugging a digital interface, such as a communication bus, it would be useful to capture more than two channels, but it may be enough to acquire the signals just as low (‘0’) or high (‘1’). If the microcontroller has enough free general-purpose input/output (GPIO) pins, it is easy to capture the digital information in these pins and display, for example, 8 or 16 digital signals that would be in a low state if the input signal is below a defined threshold value or high if it is above it. Figure 22 shows the menu that was implemented for the logic analyzer.

In this case, the most useful capture mode is the ’Single’ capture, but ‘Auto’ or ‘Normal’ modes could be easily implemented as well. To trigger the signal, all selected channels are continuously captured until a low to high or high to low transition is detected in the trigger channel, and then the memory buffer starts being filled. When the buffer is completed, it can be printed out on the display. A more complex but more versatile option is to use a circular buffer, recording continuously data in the RAM. This way, it is possible to get a snapshot of a “window” surrounding the triggering event.

6. Discussion

Table 8. Comparison of proposed architecture with other low-cost oscilloscopes.

	Bandwidth	Channels	Sensitivity	Input Impedance	Approx. Price
This work	Section 3.1 Equations (1)–(3) can be adjusted selecting the OA. Example: 4 MHz	Section 3 Section 3.6 Section 5.1 Example: 2 CH, AC/DC/GND	Section 3.4 Example: 10 mV/Div–10 V/Div	Section 3.2 Section 3.1 Example: 1 M ohm	Variable Example: 57 USD
DSO138	200 kHz	1 CH AC/DC/GND	10 mV/Div–5 V/Div	1 M ohm	20–40 USD
Kuman DSO	200 kHz	1 CH AC/DC/GND	5 mV/Div–20 V/Div	1 M ohm	35 USD
DSO212	1 MHz	2 CH AC/DC	20 mV/Div~10 V/Div	1 M ohm	150 USD

compares the proposed architecture with market low-cost oscilloscopes. The bandwidth, the number of channels, the coupling, the sensitivity, the input impedance, and the approximated price are compared. As the proposed architecture can be configured with different hardware devices to match different requirements, the table shows the sections of this work where the procedure to configure the feature is explained. Furthermore, the features obtained with the numerical examples provided in these sections are summarized in the table.

It is possible to observe that oscilloscopes with a bandwidth over 1 MHz are more expensive, one of the reasons is the need for higher-quality OA. The number of channels is another feature that determines an increase in the price. It is noticeable as the features of the oscilloscope created with the examples of the proposed components are better than the other market low-cost oscilloscopes.

The paper does not propose a specific oscilloscope but an architectural proposal to implement oscilloscopes. Following this architecture, different oscilloscopes with different performance parameters can be designed adequately, selecting the components. In

Table 9. Price list and total cost.

Component	With PIC16F877A		With STM32H5
	Quantity	Unit Price	Quantity	Unit Price
Embedded device	2	5 USD	1	5 USD
ILI9488-type display	1	7 USD	1	7 USD
ADC (Texas Instruments ADC1175)	1	3 USD	0	0
DAC (Texas Instruments DAC0800)	1	2 USD	0	0
PLL 74HC4046A	1	0.76 USD	0	0
Analog multiplexer (Vishay DG408)	3	2 USD	3	2 USD
OpAmps (AD8092)	6	3 USD	6	3 USD
DD1912 power supply	1	4 USD	1	4 USD
Passive components	50	0.05 USD	50	0.05 USD
Cabling and PCB		6 USD		6 USD
Case and connectors		9 USD		9 USD
	Total cost	68.26 USD	Total cost	57.5 USD

, a list of prices of a specific design is shown to demonstrate that it is possible to reach a low-cost implementation.

7. Conclusions and Future Works

In this work, a functional architecture to make low-cost digital portable oscilloscopes is proposed. The proposal is mainly based on general-purpose microcontrollers and operational amplifiers. Components are selected to make a digital oscilloscope with the following features: two input channels of 2 MHz, an input impedance of 1 MOhm, a DC/AC/GND selector, a graphic display, a synchronism detector, an internal and external trigger, and in addition, it can work as a digital signal analyzer.

As main future work lines, it is possible to highlight extending the proposal to make a spectrum analyzer, and the evaluation of the methodology in a prototype and to perform specific application tests.