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Article

A Behavior Model of SiC DMOSFET Considering Thermal-Runaway Failures in Short-Circuit and Avalanche Breakdown Faults

1
Department of Electrical Engineering, Tsinghua University, Beijing 100084, China
2
Beijing Smart-Chip Microelectronics Technology Co., Ltd., Beijing 102200, China
*
Author to whom correspondence should be addressed.
Electronics 2024, 13(5), 996; https://doi.org/10.3390/electronics13050996
Submission received: 28 January 2024 / Revised: 4 March 2024 / Accepted: 5 March 2024 / Published: 6 March 2024
(This article belongs to the Section Power Electronics)

Abstract

Accurate fault simulation and failure prediction have long been challenges for SiC MOSFETs users. This paper presents a behavior model of Silicon Carbide (SiC) double-implanted MOSFET (DMOSFET), considering thermal-runaway failures in short-circuit and avalanche breakdown faults on the basis of cell-level physical processes. The proposed model can simulate the faults with extremely high accuracy and precisely predict SiC DMOSFET’s short-circuit withstand time and critical avalanche energy. By finite-element simulations, cell-level physical processes of short-circuit and avalanche breakdown faults are clarified. The mechanisms of thermal-runaway failures are deeply discussed with references to existing studies. Based on semiconductor and device physics mechanisms, the proposed model is constructed upon a traditional behavior model of SiC MOSFET with several parallel branches that are proposed to describe the thermal-runaway failures during both faults. The Cauer thermal network model is used for estimating junction temperature within it. The proposed model is constructed in Simulink, and it is validated using short-circuit and unclamped inductive switching (UIS) tests.
Keywords: silicon carbide (SiC) MOSFET; avalanche breakdown; short circuit; behavior model; failure prediction; thermal runaway silicon carbide (SiC) MOSFET; avalanche breakdown; short circuit; behavior model; failure prediction; thermal runaway

Share and Cite

MDPI and ACS Style

Wu, Y.; Li, C.; Zheng, Z.; Wang, L.; Zhao, W.; Zou, Q. A Behavior Model of SiC DMOSFET Considering Thermal-Runaway Failures in Short-Circuit and Avalanche Breakdown Faults. Electronics 2024, 13, 996. https://doi.org/10.3390/electronics13050996

AMA Style

Wu Y, Li C, Zheng Z, Wang L, Zhao W, Zou Q. A Behavior Model of SiC DMOSFET Considering Thermal-Runaway Failures in Short-Circuit and Avalanche Breakdown Faults. Electronics. 2024; 13(5):996. https://doi.org/10.3390/electronics13050996

Chicago/Turabian Style

Wu, Yifan, Chi Li, Zedong Zheng, Lianzhong Wang, Wenxian Zhao, and Qifeng Zou. 2024. "A Behavior Model of SiC DMOSFET Considering Thermal-Runaway Failures in Short-Circuit and Avalanche Breakdown Faults" Electronics 13, no. 5: 996. https://doi.org/10.3390/electronics13050996

APA Style

Wu, Y., Li, C., Zheng, Z., Wang, L., Zhao, W., & Zou, Q. (2024). A Behavior Model of SiC DMOSFET Considering Thermal-Runaway Failures in Short-Circuit and Avalanche Breakdown Faults. Electronics, 13(5), 996. https://doi.org/10.3390/electronics13050996

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