Development of an Extended-Band mTRL Calibration Kit for On-Wafer Characterization of InP-HEMTs up to 1.1 THz

Abstract

In this work, we present a wideband on-wafer characterization technique for InAlAs/InGaAs/InAs InP-based high-electron mobility transistors (HEMTs) using an optimized multiline Thru-Reflect-Line (mTRL) calibration kit. Our goal is to directly extract transition frequency f_T and maximum frequency of oscillation f_max values from S-parameters measurements with frequencies up to 1.1 THz and overcome the limitations of the traditional 20 dB/dec extrapolation method using lower-frequency band measurements. Indeed, as the state-of-the-art transistors now exhibit cutoff frequencies exceeding 1 THz, standard low-frequency extrapolation methods become increasingly inaccurate. Full-wave electromagnetic simulations were used to design low-loss coplanar waveguide (CPW) access structures with stable impedance and minimal parasitic effects. These structures were co-fabricated with HEMTs and calibration standards on the same InP substrate. The 2-finger transistor with a 80 nm gate length exhibits a directly measured f_T = 320 GHz and f_max = 800 GHz. The technique showed high consistency across six frequency bands and confirms that direct broadband measurement with mTRL improves accuracy. This work highlights the metrological strength of mTRL-based setups for next-generation THz device characterization.

1. Introduction

InP-based HEMTs are key enablers of terahertz (THz) electronics, serving critical roles in high-resolution imaging, ultra-fast wireless communications, and spectroscopy [1]. The superior electron mobility and high saturation mobility of InP-based heterostructures allow these devices to reach circuit operating frequencies well above 300 GHz.

Two critical figures of merit for these transistors are the transition frequency f_T, which characterizes current gain, and the maximum frequency of oscillation f_max, which defines power gain capability. These are typically extracted from the current gain ∣H₂₁∣² and Mason’s unilateral gain U, respectively, determined from S-parameter measurements [2]. However, conventional RF test benches are limited to 110 GHz, requiring extrapolation using a −20 dB/dec slope, which introduces uncertainty, especially for f_max, often located almost a decade beyond 110 GHz [3].

Common calibration methods such as Short-Open-Load-Thru (SOLT) and Line-Reflect-Reflect-Match (LRRM) [4,5,6,7] are limited at high frequencies due to the difficulty of fabricating accurate match standards and the use of different impedance standard substrates (ISS). These introduce parasitic mismatches and affect measurement repeatability.

To overcome these issues, we implement an on-wafer multiline Thru-Reflect-Line (mTRL) calibration method that enables accurate wideband characterization on the same substrate (InP) as the device under test. Unlike SOLT and LRRM, mTRL uses only transmission lines and reflect structures, avoiding broadband match standards and reducing calibration complexity. Moreover, the use of identical substrate and interconnect materials ensures minimal dielectric discontinuities and higher measurement reliability.

This paper demonstrates for the first time the full characterization of an InP-HEMT from 250 MHz to 1.1 THz, using an optimized mTRL approach. We detail the simulation of coplanar access structures, fabrication of transistors and calibration standards, and provide DC and RF measurement results over six continuous frequency bands.

2. Coplanar Access Optimization for Sub-THz On-Wafer Characterization

In order to accurately characterize InP-based HEMTs at frequencies approaching 1.1 THz, the design of the coplanar waveguide (CPW) access lines becomes a crucial aspect. These structures serve a dual function: they must allow low loss transmission of RF signals to and from the device under test (DUT), and they are also reused as calibration standards in the on-wafer mTRL kit. Therefore, their electrical performance must be carefully optimized over the entire frequency range of interest [8,9,10,11].

We began by analyzing the standard CPW configuration that had previously been employed for measurements up to 110 GHz [12]. This baseline design consists of a signal conductor flanked by ground planes with a ground-to-ground spacing of 70 µm and signal width of 30 µm (Figure 1). Using full-wave electromagnetic simulations in HFSS [13], we evaluated its high-frequency behavior (Figure 1) on a 100 µm CPW length.

The results revealed that although this structure performs adequately below 100 GHz, its insertion loss S₂₁ deteriorates rapidly beyond 200 GHz, falling to −17 dB at 1.1 THz. Simultaneously, the return losses S₁₁ and S₂₂ increase to nearly 0 dB, indicating severe impedance mismatch and reflection. To better understand the origin of this performance degradation, we studied the electromagnetic energy distribution in the structure through Poynting vector plots at two representative frequencies (Figure 2).

At 92 GHz, the electromagnetic energy is tightly confined between the signal line and ground planes, showing effective quasi-TEM mode propagation. However, at 1 THz, the vector field reveals strong leakage into the substrate. This is a direct consequence of the excitation of higher-order and substrate modes, which lead to significant signal loss and distortion.

To mitigate these undesired effects, we performed a parametric study to evaluate the influence of the ground-to-ground spacing d on wave confinement and impedance behavior. For each configuration, we adjusted the signal width W and gap G using TX-Line [14] in order to analytically target a 50 Ω impedance at low frequencies. The characteristic impedance Z_C was then extracted from the HFSS simulated S-parameters using standard impedance transformation equations [15].

The results show that as the spacing d decreases from 70 µm to 11.5 µm, Z_C becomes more stable and closer to the ideal 50 Ω target. For d = 11.5 µm remains nearly flat across the entire frequency band, while wider structures exhibit significant deviation (up to 800 Ω at 1.1 THz for d = 70 μm) (Figure 3). This behavior is attributed to improved electromagnetic field confinement, which reduces modal dispersion and parasitic coupling to the substrate. Based on this analysis, we selected the geometry with d = 11.5 μm, W = 4.5 μm and G = 3.5 μm.

This optimized CPW shows dramatically improved transmission characteristics. S₂₁ remains better than −1.1 dB up to 1.1 THz, and S₁₁ remain well below −23 dB, confirming excellent impedance matching and minimal signal reflection (Figure 4). Finally, to validate that this improvement was not limited to impedance behavior alone, we analyzed the Poynting vector distribution at 1 THz for the optimized geometry. The electromagnetic energy is now fully confined around the signal conductor, and no significant leakage toward the substrate is observed (Figure 4). This confirms the suppression of unwanted modes and highlights the suitability of this design for broadband on-wafer measurements.

3. On-Wafer Multiline Thru-Reflect-Line (mTRL) Calibration

For accurate broadband S-parameter measurements, it is essential to use a calibration method capable of maintaining both repeatability and consistency across frequency bands extending into the THz range. Traditional methods such as LRRM and SOLT are effective up to ~110 GHz, but become increasingly inaccurate beyond this frequency, due to fabrication complexity, mode conversion, and substrate dielectric mismatches. To address these limitations, we implemented an mTRL calibration directly on the same InP substrate as the transistor under test. Unlike SOLT or LRRM, mTRL requires only transmission lines of varying lengths (Thru and Line standards) and a reflect standard, eliminating the need for a broadband matched load [16,17].

This simplifies fabrication and improves calibration robustness over a wide frequency range. However, the probe configuration used for on-wafer measurements up to 1.1 THz limits the minimum signal conductor width that can be electrically coupled to the structure to 15.5 µm. This value represents the mark of the probe on the structure. To accommodate this constraint, contact pads were integrated into the structure to enable proper probe alignment.

The mTRL kit was designed using the optimized CPW structures detailed in Section II, ensuring that the same transmission line geometry is used both for the DUT and the calibration. This minimizes discontinuities and suppresses parasitic reflections due to geometry or substrate changes. The fabrication involved depositing a Ti/Pt/Au metal stack (25/25/750 nm) on the InP substrate, which has a dielectric constant of 12.4 and a loss tangent of 3 × 10⁻⁴.

Each frequency band was supported by Line standards with increasing physical lengths: 80 µm (Thru), 120 µm, 140 µm, 160 µm, 180 µm, 200 µm, 240 µm, 300 µm, 450 µm, and 580 µm (Figure 5). This range enables sufficient phase diversity for matrix inversion during mTRL extraction, improving calibration accuracy across the 250 MHz–1.1 THz band.

To validate the kit, we measured a 1000-µm CPW line and compared the calibrated S-parameters to full-wave HFSS simulations (Figure 6). The comparison between the simulated and measured CPW lines were conducted on a 1000 µm length, to reduce the influence of parasitic effects such as probe-to-substrate coupling (strongly affecting the measurement in the [220–325 GHz] range using an infinity probe) and the use of a sufficient propagation length allows for a more accurate analysis of the resulting S-parameters.

The measured S-parameters closely matches the simulation across the entire band (Figure 6), with a deviation of less than 1.5 dB for the S₂₁ (Figure 6b). Minor ripples above 750 GHz are attributed to limited dynamic range of the frequency extenders in [750–820 GHz] and beyond 1 THz. The S₂₁ phase shows continuous behavior with a maximum discrepancy of 30° (Figure 7), likely due to effective permittivity mismatch between simulation (ε_eff = 6.5) and measurement (ε_eff ≈ 7.3). This small error can also partially due to uncertainty of probe placement and optimized probe overtravel used on each contact after multiple probing. The propagation constant (Figure 8) remains continuous and stable, confirming the robustness of the calibration method.

It is important to note that in the range [220–325 GHz], both the measured S₂₁ and the propagation constant show an unexpected behavior with overestimated losses. We believe that is due to probe–substrate coupling, not corrected with the mTRL.

4. Fabrication of mTRL Calibration Kit and InP HEMTs

To validate the proposed wideband characterization methodology, we fabricated both the HEMTs and the calibration structures on a single InP wafer. This integration ensures uniform dielectric environments and removes calibration discontinuities commonly observed when using separate impedance standard substrates (ISS). The mTRL calibration kit was designed to operate over six continuous frequency bands: [250 MHz–110 GHz], [140–220 GHz], [220–325 GHz], [325–480 GHz], [500–750 GHz] and [750–1.1 THz]. Each band was addressed by a corresponding configuration of transmission lines and reflect structures, all based on the optimized CPW geometry detailed in Section 3.

The HEMT structures investigated in this work were fabricated on InP substrates using a pseudomorphic InAlAs/InGaAs/InAs epitaxial design optimized for high-frequency operation. The epitaxy was engineered to maximize electron mobility while maintaining high carrier density, which is essential for achieving large transconductance and low access resistance [12].

A composite channel structure combining InGaAs and an ultra-thin InAs insertion layer was employed to benefit from the high electron saturation mobility of InAs, while ensuring good lattice matching and thermal stability. The channel was separated from the Schottky gate by a thin InAlAs spacer and a dual δ-doping scheme, designed to simultaneously minimize parasitic access resistance and suppress short-channel effects. The structures were defined using electron-beam lithography, followed by Ti/Pt/Au metallization (25/25/500 nm) to ensure low contact resistance and high reproducibility at THz frequencies (Figure 9).

Transfer length method (TLM) measurements yielded a specific contact resistance of approximately 0.02 Ω·mm, confirming that the contact process is suitable for high-speed applications. The gate length was defined at 80 nm to improve f_T and enhance f_max, the transistor employed an asymmetric double-recess profile, where the gate was embedded within a shorter recess on the source side and a longer recess on the drain side. This design reduces the output conductance g_ds by suppressing drain-induced barrier lowering and improves the impedance environment seen by the intrinsic device at high frequency, leading to higher power gain and better matching. Three device configurations were fabricated, differing only in gate width (W_G = 2 × 4 µm, 2 × 8 µm, and 2 × 12 µm) to evaluate the influence of gate periphery on the extracted RF parameters under identical biasing and calibration conditions.

Each transistor was integrated with co-designed CPW access lines optimized in Section III. The reference plane was aligned with the inner edges of the probe pads, and contact pads were designed to comply with sub-THz probe dimensions (minimum 15.5 µm conductor width). These access lines were fabricated simultaneously with the transistors to ensure consistent impedance, eliminate probe discontinuities, and facilitate high-accuracy on-wafer calibration using the mTRL method. The final layout was designed to accommodate RF probing across six continuous frequency bands.

5. DC and RF Characterization Results

5.1. DC Results

The static electrical behavior of the fabricated transistors was first assessed to verify the integrity of the fabrication process and confirm the expected current drive capabilities. Measurements were performed on the device with gate width W_G = 2 × 4 µm under standard conditions.

The output characteristics (Figure 10) exhibit excellent linearity and saturation behavior, with a maximum drain current density of 491 mA/mm at V_GS = 0 V and V_DS = 800 mV. This level of performance indicates efficient carrier injection and confirms the quality of the ohmic contacts and channel design.

The transconductance curve shows a peak value of 2000 mS/mm, reflecting high electron mobility and effective gate control. The narrow gate length combined with the asymmetrically recessed profile ensures a steep transfer characteristic, suitable for high-gain, high-frequency applications.

5.2. RF Measurements and De-Embedding

The transistors were characterized using S-parameter measurements from 250 MHz to 1.1 THz, acquired across six frequency bands using waveguide frequency extenders and an mTRL-calibrated on-wafer probe setup. The mTRL method allowed accurate alignment of the measurement reference plane at the CPW reference pads, minimizing parasitic contributions from probe contacts and access lines. To isolate the intrinsic performance of the transistors, we fabricated open and short de-embedding structures on the same substrate. These were used to remove residual parasitic effects associated with probe pads and interconnections [18].

The open-short de-embedded small-signal parameters of the transistor (Wg = 2 × 4 µm) were extracted under bias conditions of V_GS = 0 V and V_DS = 800 mV (Figure 11 and Figure 12). The magnitude (Figure 11) and phase (Figure 12) of S₂₁ and S₁₂ remained continuous and consistent across all frequency bands, confirming the effectiveness of both the access design and the calibration procedure. The same behavior is observed on the S₁₁ and S₂₂ parameters. As explained earlier, the ripples above 750 GHz are associated with the limited dynamic range of the frequency extenders.

Using complex S-parameter measurement, Mason’s unilateral gain U and the extrinsic short circuit current gain ∣H₂₁∣² were calculated using Equations (1) and (2) and given in Figure 13a and Figure 13b, respectively.

$$U=\left|{\displaystyle \frac{{\left|\frac{S_{21}}{S_{12}}-1\right|}^2}{2\left[K\left|\frac{S_{21}}{S_{12}}\right|-R_e(\frac{S_{21}}{S_{12}})\right]}}\right|$$

(1)

and

$${\left|H_{21}\right|}^2={\left|{\displaystyle \frac{-2S_{21}}{\left(1-S_{11}\right)\left(1-S_{22}\right)+S_{12}{S}_{21}}}\right|}^2$$

(2)

The transition at 0 dB of ∣H₂₁∣² and U gives directly the values of f_T and f_max respectively.

The transistor exhibits a f_T = 320 GHz and f_max = 800 GHz (Figure 13). These values are in line with advanced InP-HEMT performance levels and confirm the robustness of the characterization chain.

To further highlight the importance of full-band measurement, we compared the directly measured values to those obtained by extrapolating from the [250 MHz–110 GHz] band using a standard −20 dB/decade slope. For the W_G = 2 × 4 µm device, this extrapolation yielded an f_max of 550 GHz, underestimating the actual measured value of 800 GHz by more than 230 GHz (

Table 1. Comparison Between Measured F_max and [250 MHz–110 GHz] Extrapolated f_max using mTRL.

Transistor Width	Fmax-Measured (GHz)	Fmax-Extrapolated (GHz)
2 × 4 µm	800	550
2 × 8 µm	655	545
2 × 12 µm	500	570

).

These results emphasize the limitations of extrapolation when used alone, particularly for narrower devices. The semi-logarithmic nature of gain roll-off often leads to under- or overestimation depending on the measurement range and the device parasitics.

6. Conclusions

This work proposed a complete methodology for direct, on-wafer S-parameter characterization of InP-based HEMTs from 250 MHz to 1.1 THz, using an optimized coplanar access design and a custom-built mTRL calibration kit fabricated on the same substrate as the device under test. The combination of geometry-optimized CPW interconnections, substrate-consistent calibration, and broadband S-parameter acquisition enabled a precise extraction of key high-frequency figures of merit—notably f_T = 320 GHz and f_max = 800 GHz without relying on extrapolation from limited-bandwidth data. While the extracted values of f_T and f_max do not represent new performance records, the focus of this study lies in the metrological framework rather than device benchmarking. Indeed, the results clearly reveal the limitations of conventional extrapolation techniques, which produced deviations exceeding 230 GHz in f_max compared to the full-band measured values. Such discrepancies are significant in the THz regime, where even small inaccuracies in gain estimation can misrepresent the actual usable bandwidth of the transistor.

The use of mTRL calibration across six continuous frequency bands allowed seamless gain reconstruction and validated the continuity and reliability of the measurement chain. Furthermore, by reusing the same optimized CPW structures for both calibration standards and transistor access, the approach reduced geometrical and dielectric mismatches, improving accuracy and reducing setup complexity. The methodology developed here can be directly extended to future HEMT technologies or other sub-THz active devices, where measurement accuracy across a wide frequency span is critical for development, modeling, and circuit integration. In that context, this work proposes not merely a measurement technique, but a platform for reliable THz transistor metrology