Heuristic Enz–Krummenacher–Vittoz (EKV) Model Fitting for Low-Power Integrated Circuit Design: An Open-Source Implementation

Abstract

Accurate parameter extraction for the Enz–Krummenacher–Vittoz (EKV) model is crucial for low-power integrated circuit design, especially in weak and moderate inversion regions. This work introduces a novel iterative subranging (ISR) technique for EKV model fitting, implemented in Python (version 3.10.12) using SciPy (version 1.10.1), NumPy (version 1.24.3), and Matplotlib (version 3.7.1). The core of the methodology is the Fitter class, which refines the threshold voltage ($V_{TH}$) by progressively narrowing the fitting range, controlled by the fit_range_parameter. This approach achieves a relative fitting error below 5% within a continuous interval of drain current, ensuring accurate parameter extraction in the region of interest while considering the full data range. Validation using SkyWater130 NMOS data demonstrated that the ISR method covers an inversion coefficient (IC) range from $1\times {10}^{-3}$ to nearly 50, showcasing its ability to accurately model device behavior across weak, moderate, and strong inversion. Compared to state-of-the-art EKV extraction methods, the ISR method exhibited at least a ×2 reduction in fitting error within the weak inversion region. More importantly, the ISR method is easily tunable by the designer in order to focus on specific current regions, where a greater accuracy is desired. This is a distinctive characteristic of the ISR method not present in any other extraction procedure. Moreover, the method demonstrated strong robustness against measurement noise, maintaining accuracy even with a 1 nA RMS noise level. This work provides a powerful and accessible tool for EKV model parameter extraction, enhancing reproducibility and accuracy in analog circuit design for low-power applications.

1. Introduction

Effective circuit design necessitates a balance between model accuracy and design tractability. While complex models like BSIM offer high accuracy [1,2,3], their computational complexity can hinder intuitive design exploration and rapid prototyping. Simplified models, such as the classic Schichman–Hodges model [4], provide ease of use but often lack the precision required for modern low-power integrated circuits (ICs), particularly in weak and subthreshold regions of operation. This gap between oversimplified and computationally intensive models poses a significant challenge for designers balancing accuracy and efficiency.

The Enz–Krummenacher–Vittoz (EKV) model emerges as a promising solution [5,6,7]. It achieves a balance between accuracy and simplicity, enabling designers to perform insightful “back-of-the-envelope” calculations and gain deeper physical insights into circuit behavior [8]. By supporting hand calculations and rapid estimations, the EKV model empowers designers to explore design alternatives and refine concepts before resorting to computationally intensive simulations. Thanks to these characteristics, the EKV model attracted significant attention in the low-power-design community. Its use has been demonstrated in various applications, including low-power amplifiers, data converters, and other analog circuits [9,10,11].

This work introduces a novel methodology for efficient EKV model parameter extraction, specifically tailored for low-power IC design. Leveraging open-source tools and a carefully designed fitting algorithm, this approach bridges the gap between analytical insights and simulation-based verification. As part of this work, we have developed freely accessible Python scripts. The use of open-source tools not only enhances accessibility but also promotes reproducibility and collaboration, which are critical for advancing low-power IC design.

The proposed methodology includes considerations on data preprocessing techniques, iterative parameter refinement strategies, and optimizations for low-power applications. Its effectiveness is demonstrated through a case study involving a 1.8 V NFET device from the open-source SkyWater130 technology. The results highlight the accuracy and efficiency of the extraction approach, while also identifying areas for future improvement.

The remainder of this paper is organized as follows: Section 2 provides a brief overview of the MOSFET models with a focus on the EKV model and its relevance to low-power IC design. Section 3 details the proposed heuristic methodology for extracting of the main DC parameters of the MOSFET device, including data preprocessing and parameter refinement strategies. The term heuristic refers to the fit_range_parameter, a dimensionless parameter used in the proposed iterative subranging fitting procedure. Determining the optimal fit_range_parameter for specific voltage and current ranges is not possible a priori, as it depends on the specific transistor characteristics. Section 4 presents the implementation using open-source tools. Section 5 demonstrates the methodology through a case study using the SkyWater130 technology. Finally, Section 6 discusses the results, limitations, and potential future work.

2. Background

2.1. Overview on MOSFET Models

MOSFET modeling is often regarded as an “art” due to the multitude of interacting physical phenomena that define the electrical characteristics of the device. The continuous advancement of FET technologies—including feature downscaling, the introduction of novel materials, and complex geometries beyond traditional epitaxial fabrication—poses significant challenges to the accuracy of established models. This is reflected in the extensive and continually expanding literature on the subject [12,13,14,15,16,17,18,19].

In extremely downscaled MOSFETs found in advanced integrated circuit nodes, several key physical phenomena become prominent. These include short-channel effects (SCEs), such as threshold voltage roll-off and drain-induced barrier lowering (DIBL), where the drain voltage significantly influences the channel potential [12]. Additionally, velocity saturation becomes critical as, at high electric fields, carrier velocity saturates, deviating from the linear relationship with the electric field. Gate-induced drain leakage (GIDL), caused by quantum mechanical tunneling through the gate oxide, and other quantum effects, such as quantum confinement, become increasingly significant as device dimensions shrink [13].

The relative importance of these phenomena in design depends on the specific application. For example, in high-power or RF circuits, velocity saturation may play a crucial role in limiting performance [11], while in ultra-low-power designs, threshold voltage control is paramount. Even small variations in threshold voltage can significantly impact leakage currents and standby power consumption.

In this rapidly evolving landscape, designers heavily rely on the accuracy of device models provided by the technology process design kit (PDK). Industrial standards primarily utilize BSIM (Berkeley Short-channel IGFET Model) [15,16] and HiSIM (Hiroshima University STARC IGFET Model) [17,18], with the PSP (Philips Surface Potential) model also used in some contexts [19]. These surface-potential-based models provide accurate representations of device behavior across a wide range of operating conditions. They incorporate hundreds of parameters to enable precise simulations across varying device dimensions (W and L), process–temperature–voltage (PVT) variations, local mismatch effects, and well-proximity effects. Their standardization ensures compatibility between different EDA tools and foundries, facilitating widespread adoption.

However, the complexity of these models can hinder design intuition and awareness. Therefore, simplified models with a reduced set of parameters are crucial for initial design exploration. These models allow designers to quickly identify promising operating regions before fine-tuning their designs with accurate simulations using the full PDK models.

The square-law model, valid only in strong inversion, provides a basic quadratic relationship between drain current and gate voltage [4], while the exponential model captures subthreshold behavior with a simple exponential dependence. Although useful for fundamental understanding, these models are limited in accuracy and range of validity. Charge-based models, such as EKV (Enz–Krummenacher–Vittoz) [5] and ACM (Advanced Compact MOSFET) [20], introduce the concept of an inversion coefficient (IC) as a key design parameter, replacing the traditional overdrive voltage ($V_{GS}-V_{TH}$). This approach facilitates intuitive modeling of moderate and weak inversion regions, going beyond the simple on/off view of device operation.

The inversion coefficient (IC) is defined as a normalized measure of the inversion charge in the channel, capturing the transition between subthreshold, moderate inversion, and strong inversion regions. Unlike the classical overdrive voltage, which does not directly capture the underlying physical mechanisms governing MOSFET operation—especially in the mixed drift–diffusion current regime—IC provides a direct link between the charge-based physics and the MOSFET current conduction mechanisms.

A key advantage of the IC approach is its direct applicability to analog and low-power design. One of the most critical design metrics in analog circuits is the transconductance-to-current ratio ($g_m/I_D$). This ratio is of great importance, since it is used to quantify the transconductance for a given amount of current (i.e., power consumption). Since $g_m$ is pivotal in determining speed, gain, and noise in a vast class of analog circuits [21], the $g_m/I_D$ ratio is the key parameter to determine power efficiency [22]. Traditional MOSFET models express $g_m$ as a function of $V_{GS}$ and $V_{TH}$, but this approach fails to capture the strong variation in $g_m/I_D$ in different regions of operation. By contrast, IC-based models naturally express $g_m/I_D$ as a function of IC, providing a single, unified expression valid across all operating regions [23]:

$${\displaystyle \frac{g_m}{I_D}}={\displaystyle \frac{1}{n{U}_T}}·{\displaystyle \frac{1-e^{-\sqrt{\mathrm{IC}}}}{\sqrt{\mathrm{IC}}}},$$

(1)

where n is the subthreshold slope factor and $U_T=k_{B}T/q$ is the thermal voltage (here, $k_B$ is the Boltzmann constant, T the operating temperature, and q the elementary charge). Equation (1) predicts the saturation of the $g_m/I_D$ ratio to a maximum value of $1/\left(n{U}_T\right)$ in weak inversion (small values of IC). Conversely, in strong inversion (where IC is significantly larger than unity), it predicts a $1/\sqrt{\mathrm{IC}}$ roll-off, indicating a decrease in transconductance efficiency with increasing inversion charge.

While both the EKV and ACM models share the fundamental concept of the inversion coefficient, they differ in their mathematical formulations and application contexts. The EKV model, known for its simplicity, symmetry, and analytical tractability, is particularly well suited for hand calculations and educational purposes. It provides a clear and unified understanding of MOSFET behavior across all regions of operation (weak, moderate, and strong inversion) and emphasizes normalized currents, making it intuitive for analog design. In contrast, the ACM model focuses on higher accuracy and incorporates more detailed physical effects, such as mobility degradation, velocity saturation, and short-channel effects, making it suitable for computer-aided design and simulation of deep-submicron and nanometer-scale technologies [24]. While the EKV model is ideal for initial design exploration and gaining physical insight, the ACM model is better equipped for detailed, technology-specific simulations. Therefore, the two models are not strictly competing but rather complementary, each serving different needs in the design and analysis of MOSFETs.

While the EKV model offers greater detail and accuracy compared to oversimplified models, the challenge of extracting accurate model parameters from electrical measurements remains. As previously discussed, various physical phenomena can limit the accuracy of the EKV model. From a device modeling perspective, several strategies have been employed to enhance accuracy. These include explicitly introducing new parameters into the current equations, such as the channel length modulation parameter $\lambda$, and incorporating implicit dependencies in the main parameters, like the voltage dependence of the subthreshold slope factor. Adaptations of the EKV model, tailored for accurate electrical simulation, have emerged, employing a comprehensive set of parameters to reflect the physical effects previously outlined [25].

While these approaches enhance model fidelity, they increase complexity, potentially hindering the designer’s practical use of the model. In contrast, this work adopts a different approach: maintaining minimal model complexity while defining a clear region of validity in terms of voltage and current ranges. This strategy promotes greater confidence and awareness of the model’s local accuracy in design practice, facilitating its effective application.

While numerous parameter extraction methodologies have been proposed in the literature [26,27,28], this work distinguishes itself by addressing a critical limitation found in existing approaches. Notably, a recent parameter extraction procedure from Enz’s group [8] shares similarities with conventional MOSFET parameter extraction, particularly in its initial electrical test bench setup. This method, which will serve as a comparative benchmark in Section 5, provides global estimations of MOSFET parameters across the entire range of electrical characteristics. However, it lacks the ability to prioritize accuracy within specific operating regions.

In contrast, the novel contribution of this work lies in its development of a parameter extraction methodology that maintains simplicity while introducing a mechanism to adapt fitting accuracy to targeted MOSFET operating regions, spanning from weak to strong inversion. This allows designers to tailor the model precision to their specific application requirements, ensuring accurate representations of device behavior within critical operating regimes. This is achieved by the introduction of a specific parameter to control the fitting range. The role of this new parameter, termed fit_range_parameter, is extensively discussed in Section 3.3.

2.2. The Simplified EKV Model

In the simplified EKV model [5,8], the drain current $I_D$ is a function of voltage applied to the gate, the source, the drain, and the bulk terminals. The latter is usually used as local reference; hence, the following potentials are considered: $V_{GB}$, $V_{SB}$, and $V_{DB}$, corresponding, respectively, to the gate–bulk voltage, the source–bulk voltage, and the drain–bulk voltage. The EKV expression for $I_D$ is as follows:

$$I_D=I_S\left[{ln}^2\left(1+exp{\displaystyle \frac{V_P-V_{SB}}{2U_T}}\right)-{ln}^2\left(1+exp{\displaystyle \frac{V_P-V_{DB}}{2U_T}}\right)\right],$$

(2)

where

• $I_S$ is the specific current, given by $I_S=2n\mu C_{ox}{U}_T^2{\displaystyle \frac{W}{L}}$;
• $V_P$ is the pinch-off voltage, defined as $V_P={\displaystyle \frac{V_{GB}-V_{TH}}{n}}$ (here, $V_{TH}$ is typically defined as the gate voltage at which the inversion charge density equals the depletion charge density);
• $U_T$ and n are the thermal voltage and the subthreshold slope factor, respectively (previously defined in Section 2.1);
• $\mu$ is the carrier mobility;
• $C_{ox}$ is the oxide capacitance per unit area;
• W and L are the width and the length of the transistor, respectively.

Starting from Equation (2), approximate forms can be derived considering, for example, the saturation region ($V_{DB}\gg V_p$): $I_D\approx I_S{ln}^2\left(1+exp{\displaystyle \frac{V_P-V_{SB}}{2U_T}}\right)$. On the other hand, further approximations can be derived for weak inversion (w.i.) or strong inversion (s.i.) operation, which are usually the basis of hand calculations:

$$I_D\approx I_{S}exp{\displaystyle \frac{V_{GB}-V_{TH}}{n{U}_T}}exp{\displaystyle \frac{-V_{SB}}{U_T}}(\mathrm{w}.\mathrm{i}.);$$

(3)

$$I_D\approx {\displaystyle \frac{\beta }{2n}}{\left(V_{GB}-V_{TH}-n{V}_{SB}\right)}^2,\mathrm{where}\beta ={\displaystyle \frac{I_S}{2n{U}_T^2}}(\mathrm{s}.\mathrm{i}.).$$

(4)

The inversion coefficient, IC, is defined as follows:

$$\mathrm{IC}={\displaystyle \frac{I_D}{I_S}}.$$

(5)

As already discussed, IC is a common indicator for the region of operation: $\mathrm{IC}<0.1$ indicates w.i. operation, $0.1<\mathrm{IC}<10$ indicates moderate inversion (m.i.), and, finally, $\mathrm{IC}>10$ indicates s.i. operation. A complete derivation of approximate expressions can be found in [29].

2.3. The Rise of Open-Source Tools in Integrated Circuit Design

The increasing adoption of open-source tools and methodologies has significantly impacted the landscape of integrated circuit design. Open-source tools offer several key advantages:

• Accessibility: Open-source tools are freely available, democratizing access to advanced design tools and empowering researchers, academics, and independent designers [30].
• Cost-Effectiveness: Eliminating the high costs associated with commercial licenses makes open-source tools an attractive option for both individual researchers and smaller organizations.
• Transparency and Collaboration: Open-source tools foster transparency and collaboration by allowing users to inspect, modify, and contribute to the codebase. This collaborative environment accelerates innovation and fosters a vibrant community of developers and users [31].
• Security: Open-source tools benefit from a large and active community of developers and users who continuously review and improve the codebase. This collaborative approach enhances security by enabling rapid identification and resolution of vulnerabilities [32,33].
• Flexibility and Customization: Open-source tools provide greater flexibility and customization options compared to commercial tools, allowing users to tailor them to their specific needs and research requirements [34,35].
• Education and Research: Open-source tools play a crucial role in education and research by providing students and researchers with hands-on experience with real-world design tools and methodologies [36].

The growing maturity and capabilities of open-source EDA tools, such as ngspice, GHDL, Verilator, and OpenLane, have made them increasingly viable for academic and industrial applications. These tools provide a powerful platform for design exploration, simulation, and verification, enabling researchers and designers to tackle complex challenges and push the boundaries of integrated circuit technology.

This work leverages the power of open-source tools, developed in the widespread Python language, to develop a readily accessible and customizable framework for EKV model parameter extraction, contributing to the ongoing advancement of open-source EDA and empowering the design community with efficient and accessible tools for low-power circuit design.

3. Methodology

3.1. Electrical Configuration for Data Extraction

This work employs a heuristic approach to extract EKV model parameters from measured I-V characteristics of a generic MOSFET device. The electrical test bench to extract the characteristics of the drain current versus the gate voltage is shown in Figure 1. In this configuration, the bulk and the source terminals are grounded. In this study, the drain voltage was set to 1.2 V to minimize short-channel effects such as DIBL, velocity saturation, and channel length modulation, which are not explicitly included in the current fitting methodology. On the other hand, the value of 1.2 V is high enough to allow saturation operation of the device. While the approach is primarily designed for long-channel MOSFETs, future work will extend the method to incorporate these effects and explore model accuracy under varying drain biases. This configuration is easily reproducible in experimental settings using a two-channel source monitoring unit (SMU).

With this electrical configuration, Equation (2) simplifies to the following:

$$I_D\left(V_G\right)=I_S{ln}^2\left(1+exp{\displaystyle \frac{V_G-V_{TH}}{2n{U}_T}}\right).$$

(6)

The purpose of the fitting is to evaluate the following parameters: $V_{TH}$, $I_S$, and n.

The extracted $I_D$ values are expected to be monotonic with respect to $V_G$ and span multiple orders of magnitude (e.g., from femtoamperes to fractions of milliamperes). In real measurement settings, noise may disrupt the monotonic behavior especially at low levels of current. These aspects are relevant to data preprocessing strategies for the fitting procedure.

3.2. Least-Squares Optimization: Weighting and Log-Scaling

In least-squares optimization, the goal is to minimize the sum of the squared residuals between the observed data and the model predictions. Mathematically, this is expressed as follows:

$$\mathrm{Minimize}:\sum _{i=1}^N{\left(I_{D,\mathrm{meas}}\left(V_{G,i}\right)-I_{D,\mathrm{model}}\left(V_{G,i}\right)\right)}^2.$$

(7)

Here, $I_{D,\mathrm{meas}}\left(V_{G,i}\right)$ and $I_{D,\mathrm{model}}\left(V_{G,i}\right)$ are the measured and predicted values of the drain current at the gate voltage $V_{G,i}$, respectively.

Direct application of the least-squares error to data spanning several orders of magnitude leads to dominance of the fitting to the range of data where larger values are present. The residuals (i.e., the terms $I_{D,\mathrm{meas}}\left(V_{G,i}\right)-I_{D,\mathrm{model}}\left(V_{G,i}\right)$) are squared, so larger currents contribute disproportionately more to the total error. For example, a residual of 1 µA contributes ${(1\times {10}^{-6})}^2=1\times {10}^{-12}$, while a residual of 1 fA contributes ${(1\times {10}^{-15})}^2=1\times {10}^{-30}$. For this reason, the direct application of a fitting routine on the whole range leads to a fitted model biased toward accurately describing the strong-inversion region at the expense of the weak inversion region.

To address this issue and achieve a better fit across the entire range of operation (weak, moderate, and strong inversion), one can employ the following strategies: (i) weighted least squares (WLS) and (ii) logarithmic scaling (LogS).

The WLS strategy consists of introducing a weighting function to explicitly control the contribution of each data point to the total error. A natural weighting function candidate could be the squared inverse of the measured current:

$$\mathrm{Minimize}:\sum _{i=1}^N{w}_i·{\left(I_{D,\mathrm{meas}}\left(V_{G,i}\right)-I_{D,\mathrm{model}}\left(V_{G,i}\right)\right)}^2;w_i={\displaystyle \frac{1}{I_{D,\mathrm{meas}}^2\left(V_{G,i}\right)}}.$$

(8)

The WLS reduces the dominance of high-current regions by equalizing the weight of low-current regions. However, WLS could lead to overemphasizing noise, both numerical or physical, in the weak inversion region.

The LogS strategy can be used to transform the current data and model predictions into logarithmic space before performing the least-squares optimization. This effectively equalizes the weights of the residuals across all current levels. The optimization problem becomes the following:

$$\mathrm{Minimize}:\sum _{i=1}^N{\left({log}_{10}\left[I_{D,\mathrm{meas}}\left(V_{G,i}\right)\right]-{log}_{10}\left[I_{D,\mathrm{model}}\left(V_{G,i}\right)\right]\right)}^2.$$

(9)

This method is numerically robust, as the extracted $I_D$ values from the electrical test bench in Figure 1 are always positive. In the case of real measurements, precaution should be taken to handle zero or negative current values, which may be present at low-current values due to random noise or offsets in the acquisition instrumentation.

3.3. Heuristic EKV Model Fitting

The core of the methodology lies in an iterative refinement process that focuses on accurately determining the $V_{TH}$, $I_S$, and n parameters within a specific region of the experimental $I_D\left(V_G\right)$ data.

The operative framework of the heuristic EKV fitting method is shown in Figure 2. The designer, after selecting the transistor type (NMOS or PMOS), geometry (W and L), flavor (regular core, low threshold, input/output, etc.), and process/temperature corner conditions, performs a SPICE simulation using the test bench shown in Figure 1. This simulation extracts the $I_D\left(V_G\right)$ data, which are then saved to a comma-separated values (CSV) file.

Subsequently, the designer executes the Python script with a trial value for the fit_range_parameter, ranging between 1 and 2. This range will be justified in the following discussion. The script outputs the extracted values of $V_{TH}$, $I_S$, and n, as well as the region of validity for the fitting of Equation (6) within the $I_D\left(V_G\right)$ characteristics. The validity region is determined by evaluating the relative error between the fitted $I_D$ and the experimental $I_D$.

If the validity range is unsatisfactory, particularly if the circuit application requires operating values of $I_D$ or $V_G$ outside this range, the designer can iterate the fitting process with a different fit_range_parameter. As will be discussed later, the fit_range_parameter controls the narrowing of the fitting range.

The value of this parameter influences whether the fitting emphasizes the weak inversion region (low-power operation) or the moderate/strong inversion regions (higher-current conditions). The optimal fit_range_parameter depends on the intended application: smaller values prioritize subthreshold behavior for low-power designs, while larger values are suitable for designs where strong inversion regions are more relevant.

This fitting procedure is termed “heuristic” because the optimal fit_range_parameter is not known a priori, and the designer may iterate the fitting procedure to achieve the desired result. Figure 2 provides an algorithmic overview of the fitting procedure, which consists of three main steps: (i) initial full-range fit; (ii) iterative threshold voltage refinement; and (iii) fit quality assessment. Each step is detailed in the following subsections.

3.3.1. Initial Full-Range Fit

An initial fit is performed across the entire measured voltage range to obtain preliminary estimates for $V_{TH}$, specific current ($I_S$), and subthreshold slope factor (n). The fit is performed using the “curve_fit” function [37] from the SciPy library [38]. The model function is the $I_D\left(V_G\right)$ relationship of Equation (6). The initial guess for the three parameters, $V_{TH}$, $I_S$, and n, is as follows: the average of $V_{G,i}$, the average of $I_D\left(V_{G,i}\right)$, and 1.5, respectively.

3.3.2. Iterative Threshold Voltage Refinement

The $V_G$ fitting range is progressively narrowed by iteratively reducing the upper voltage bound based on the previously extracted $V_{TH}$. At each new iteration, the upper bound of the subrange, $V_{G,\mathrm{up}}$, is updated to the following:

$$V_{G,\mathrm{up}}=\mathtt{fit}\_\mathtt{range}\_\mathtt{parameter}·V_{TH},$$

(10)

where $V_{TH}$ is the estimated threshold parameter from the previous iteration.

fit_range_parameter controls the extent of this narrowing in each iteration. A value close to 1 emphasizes convergence towards weak inversion behavior, while higher values prioritize stronger inversion regions. In each iteration, the EKV model from Equation (6) is refitted within the reduced voltage range [0, $V_{G,\mathrm{up}}$], and the new $V_{TH}$ estimate is compared to the previous value.

The iterative process continues until either the relative change in $V_{TH}$, ${ϵ}_{V_{TH}}$, falls below a predefined error margin (given by the error_margin parameter) or the maximum number of iterations is reached. ${ϵ}_{V_{TH}}$ is calculated from the current and the previous iteration values of $V_{TH}$, which are $V_{TH}^{\left(c\right)}$ and $V_{TH}^{\left(p\right)}$, respectively, as follows:

$${ϵ}_{V_{TH}}=2{\displaystyle \frac{V_{TH}^{\left(c\right)}-V_{TH}^{\left(p\right)}}{V_{TH}^{\left(c\right)}+V_{TH}^{\left(p\right)}}}.$$

(11)

The convergence of this iterative process to the true value of $V_{TH}$ is facilitated by several factors. First, the input $I_D\left(V_G\right)$ data are assumed to be monotonic. Second, the fitting relationship defined by Equation (6) is also monotonic. These conditions, while not sufficient, are necessary for convergence given the stopping criterion of Equation (11).

The update rule defined by Equation (10) further enhances convergence by progressively narrowing the fitting region. This effectively reduces the influence of high-end $I_D$ values, which could dominate the least-squares error minimization (see Equation (7)) and potentially lead to inaccurate $V_{TH}$ estimates.

Furthermore, within the narrowed fitting region, $I_D$ and its derivative with respect to $V_G$ are not only monotonic but also exhibit a well-behaved, non-oscillatory trend. This allows for a smooth convergence of the fitting parameters ($V_{TH}$, $I_S$, n) without oscillatory or divergent behavior.

To ensure robustness, a maximum iteration limit is implemented as a secondary stopping criterion, safeguarding against potential issues such as incorrect input data that may violate the monotonicity assumptions.

Empirically, the algorithm has demonstrated rapid convergence, with all extraction steps in the case study of Section 5 converging within a maximum of three iterations. This suggests the numerical stability and efficiency of the proposed method.

3.3.3. Fit Quality Assessment

After convergence, the quality of the fit is assessed by comparing the fitted current values to the measured data within a specified voltage range around the final $V_{TH}$. A quality margin is defined to determine the acceptable deviation between the fitted and measured currents:

$$\left|{\displaystyle \frac{I_{D,\mathrm{meas}}\left(V_{G,i}\right)-I_{D,\mathrm{model}}\left(V_{G,i}\right)}{I_{D,\mathrm{meas}}\left(V_{G,i}\right)}}\right|\le \mathtt{quality}\_\mathtt{margin}.$$

(12)

The voltage range within which the fit error remains below the quality margin is identified, providing a measure of the fit validity.

4. Implementation

The proposed methodology is implemented in Python using the following key libraries: NumPy for numerical array operations and mathematical functions; SciPy for curve fitting and optimization algorithms (specifically “curve_fit”); Pandas for efficient data handling and manipulation of the input CSV file; Matplotlib for generating plots to visualize the fitting results.

The core implementation resides in the “_fit_data” method of the “Fitter” class, which encapsulates the entire fitting process. This function (i) reads the input CSV file using “pandas” to extract voltage and current data; (ii) performs the iterative fitting procedure, including threshold voltage refinement, and evaluates the fit quality; (iii) provides options for controlling the fitting process, such as the “fit_range_parameter”, “max_iter”, and “error_margin”; and (iv) evaluates the fit quality region. The initialization method calls the “_fit_data” function, and if the “plot_fit” is true, generates optional plots to visualize the measured data, fitted curve, and the fit quality region. A simplified version of the code is reported in Appendix A.1.

5. Results and Discussion

5.1. Case Study

The proposed methodology was applied to measured data from a low-power MOSFET in the SkyWater130 technology, specifically the primitive nfet_01v8 device. This case study demonstrates the effectiveness of the iterative subranging fitting approach in extracting EKV model parameters across different regions of operation: weak inversion (w.i.), moderate inversion (m.i.), and strong inversion (s.i.).

The impact of different values of fit_range_parameter on the fitting results is shown in Figure 3a–c. Electrical simulations to extract the $I_D\left(V_G\right)$ characteristics (as in Figure 1) were performed using ngspice on a set of NMOS devices with the following aspect ratios: ($W/L$ = 0.4 µm/0.33 µm, $W/L$ = 4 µm/3.3 µm, $W/L$ = 40 µm/33 µm). In all the simulations, the temperature was set to 27 Celsius. The plot legends provide the $V_G$ and $I_D$ validity ranges for each fitted characteristic, which are automatically computed using Equation (12) with a 5% error criterion.

In Figure 3a, a fit_range_parameter value of 1.1 allows for optimal fitting in the weak and moderate inversion regions in all cases. This range covers the transition from weak to moderate inversion, which is critical for low-power design. In Figure 3b, fit_range_parameter is set to 1.001 to emphasize fitting accuracy in the weak inversion region. Finally, in Figure 3c, fit_range_parameter is set to 1.6 to optimize the fit for the strong inversion region.

Table 1. Effects of fit_range_parameter value on the IC region covered by the fitting ($W/L$ = 0.4 µm/0.33 µm case).

fit_range_parameter	Extracted ${\mathit{I}}_{\mathit{S}}$	${\mathit{I}}_{\mathit{D}}$ Validity Interval	IC Interval
	[µA]	[µA]	Equation (5)
1.001	0.574	0.001–0.515	≈0.001–0.9
1.100	1.015	0.006–6.644	≈0.006–6.5
1.600	0.534	0.356–25.842	≈0.7–48

summarizes these observations for the device with $W/L$ = 0.4 µm/0.33 µm, where IC, calculated using Equation (5), is used for evaluation. Quantitatively, the proposed method is able to cover IC values ranging from $1\times {10}^{-3}$ to nearly 50.

Figure 4a compares the proposed heuristic iterative subranging (ISR) fitting method with the logarithmic scaling (logS) fitting approach discussed in Section 3.2 and the fitting derived from the parameter extraction method proposed by Enz–Chicco–Pezzola (ECP) [8].

The proposed method demonstrates superior accuracy in the weak and moderate inversion regions, defined by $V_G$ between 430 mV and 830 mV. The shaded green area in the figure indicates where the relative fitting error, as defined in Equation (12), is systematically below 5%. Within this region, the logS and ECP methods exhibit errors up to 10% and 16%, respectively, demonstrating at least a twofold improvement in localized accuracy with the ISR method. Outside of this range, ISR fitting rapidly loses accuracy, while, as expected, logS fitting does not deviate significantly. ECP fitting has an intermediate behavior, showing good accuracy in moderate/weak inversion, although in a smaller $V_G$ interval compared to IRS fitting. Notably, neither the logS nor the ECP fitting methods provide localized accuracy. As illustrated in the $I_D\left(V_G\right)$ characteristics of Figure 4b,c, these methods achieve accuracy in distinct, disjointed intervals that cannot be adjusted. Conversely, the ISR method enables this level of control through the fit_range_parameter.

To demonstrate the influence of the fit_range_parameter on the extracted EKV parameters, we performed extractions for values ranging from 1 to 2 on the 0.4 µm/0.33 µm test NMOS. The results of this experiment are shown in Figure 5, which also includes the extracted values from the logS and ECP fitting methods for comparison. The $V_{TH}$ parameter exhibits a small oscillation around the values obtained from the logS and ECP methods. Since these methods do not utilize the fit_range_parameter, their values remain constant, as shown in the plots. The $V_L$ and $V_H$ quantities, representing the lower and upper bounds of the $V_G$ validity interval, are also presented. As anticipated, the validity range shifts towards higher voltage values with increasing fit_range_parameter. A slight decrease in the extracted $V_{TH}$ values may be attributed to velocity saturation effects in the saturation region. Given that the simplified model used in this work does not account for this effect, the extraction procedure compensates by reducing the extracted $I_S$ values, showing a significant drop for fit_range_parameter values exceeding 1.6. The subthreshold slope factor, n, also follows this trend, dropping below unity for fit_range_parameter values slightly above 1.8, thus losing its physical relevance. This represents a limitation of the current ISR methodology, stemming from the initial simplifications, particularly the omission of channel length modulation. Techniques involving output impedance characterization under $V_{DS}$ stimulus, analogous to those presented in [8], offer a potential approach to address this effect, but their implementation is not within the purview of this investigation.

The robustness of the proposed method in the presence of measurement noise was assessed by introducing Gaussian noise into the electrically simulated $I_D\left(V_G\right)$ data. A white Gaussian noise distribution, with zero mean and standard deviations, ${\sigma }_I$, varying from 0.1 nA to 3.2 nA, was numerically added to each data point within the Python script. To obtain EKV parameter estimations, ISR parameter extraction was conducted on the noise-affected characteristics. For each current noise standard deviation, this procedure was iterated 1000 times, mirroring electrical Monte Carlo simulations, resulting in a 1000-sample statistical distribution. To obtain EKV parameter estimations, ISR parameter extraction was conducted on the noise-affected characteristics. A slight increase in the mean value for higher ${\sigma }_I$ is noticeable. This phenomenon is mainly due to a preprocessing data sanity check implemented in the Fitter class, which removes negative current values before the curve fitting procedure. At ${\sigma }_I$ = 1 nA, $V_{TH}$ is included in a 620–636 mV 1 $\sigma$ range, against its nominal value of 627 mV. The 1 $\sigma$ range represents a maximum deviation of approximately $\pm 1.4\%$ from the nominal value (see Figure 6).

A single noise-fitting instance for ${\sigma }_I$ = 1 nA is presented in Figure 7. The ISR method’s performance is shown in (a), and the logS method’s in (b). Notably, the ECP extraction function was unable to fit the noisy data, and consequently, its results are not displayed. This failure stems from the reliance on $g_m$, which involves the derivative of $I_D$, substantially increasing noise susceptibility. The logarithmic scaling method is shown to be highly vulnerable to noise, yielding unreliable parameter values. In contrast, the proposed heuristic iterative subranging method remains robust, providing acceptable results. This robustness against measurement uncertainties makes the proposed method suitable for real-world applications where preprocessing of measured data may be limited [27].

5.2. Design Example: Wide-Swing Cascode Current Mirror

To illustrate the practical application of the heuristic EKV model fitting method, we consider the wide-swing cascode current mirror depicted in Figure 8a [39]. In this implementation, all transistor bulks are grounded, and all transistors operate in strong inversion. Nominally, M1 and M2 are identical (${\beta }_1={\beta }_2$), as are M3 and M4 (${\beta }_3={\beta }_4$). The input and output currents are denoted as $I_{in}$ and $I_{out}$ respecitvely. The voltage $V_N$ is set to ensure M4 saturation ($V_N>V_{P4}+V_{P2}$, being $V_{P4}$ and $V_{P2}$, the pinch-off voltages of M4 and M2, respectively). The values allowed for the cascode control voltage, $V_C$, are discussed in the following analysis.

Utilizing the approximate EKV strong inversion expression (Equation (4)), and the relationship $\beta =I_S/\left(2U_T^2\right)$, we derive the following:

$$V_{G1}=V_{TH1}+\sqrt{{\displaystyle \frac{2n_1{I}_{in}}{{\beta }_1}}}=V_{TH1}+2n_1{U}_T\sqrt{{\displaystyle \frac{I_{in}}{I_{S1}}}}$$

(13)

and

$$V_{P1}={\displaystyle \frac{V_{G1}-V_{TH1}}{n_1}}=2U_T\sqrt{{\displaystyle \frac{I_{in}}{I_{S1}}}}.$$

(14)

Here, $V_{TH1}$, $n_1$, $I_{S1}$, and $V_{P1}$ represent the threshold voltage, subthreshold slope factor, specific current, and pinch-off voltage of M1, respectively.

The first constraint, $V_{DS1}=V_{D1}\ge V_{P1}$, ensures M1 saturation. Given that $V_{D1}=V_{S3}$ due to the M1–M3 stacking, M3 must also be considered.

To maintain current mirroring precision, M3 should also operate in saturation, leading to the second constraint: $V_{DS3}\ge V_{P3}={\displaystyle \frac{V_C-V_{TH3}}{n_3}}$, where $V_{DS3}=V_{G1}-V_{S3}$.

These constraints yield the following inequalities:

$$\left\{\begin{array}{c}{V}_{S3}\ge V_{P1},\hfill \\ V_{G1}-V_{S3}\ge V_{P3}.\hfill \end{array}\right.$$

(15)

Applying Equation (4) to M3, we find $V_{S3}$:

$$V_{S3}={\displaystyle \frac{1}{n_3}}\left(V_{P3}-2n_3{U}_T\sqrt{{\displaystyle \frac{I_{in}}{I_{S3}}}}\right)={\displaystyle \frac{1}{n_3}}\left(V_{P3}-{\displaystyle \frac{n_3}{n_1}}\sqrt{{\displaystyle \frac{I_{S1}}{I_{S3}}}}{V}_{P1}\right),$$

(16)

which, when substituted into Equation (15), gives the following:

$$\left\{\begin{array}{c}{V}_{P3}\ge \left(n_3+{\displaystyle \frac{n_3}{n_1}}\sqrt{{\displaystyle \frac{I_{S1}}{I_{S3}}}}\right)V_{P1},\hfill \\ V_{P3}\le {\displaystyle \frac{1}{1+n_3}}\left(n_1{n}_3+{\displaystyle \frac{n_3}{n_1}}\sqrt{{\displaystyle \frac{I_{S1}}{I_{S3}}}}\right)V_{P1}+{\displaystyle \frac{n_3}{1+n_3}}{V}_{TH1}.\hfill \end{array}\right.$$

(17)

Since $V_{P3}={\displaystyle \frac{V_C-V_{TH3}}{n_3}}$, we can make $V_C$ explicit in the inequalities above:

$$\left\{\begin{array}{c}{V}_C\ge n_3\left(n_3+{\displaystyle \frac{n_3}{n_1}}\sqrt{{\displaystyle \frac{I_{S1}}{I_{S3}}}}\right)V_{P1}+V_{TH3},\hfill \\ V_C\le {\displaystyle \frac{n_3}{1+n_3}}\left(n_1{n}_3+{\displaystyle \frac{n_3}{n_1}}\sqrt{{\displaystyle \frac{I_{S1}}{I_{S3}}}}\right)V_{P1}+{\displaystyle \frac{n_3^2}{1+n_3}}{V}_{TH1}+V_{TH3}.\hfill \end{array}\right.$$

(18)

Figure 8b illustrates the valid operating region for $V_C$, given by the inequalities of Equation (18) and considering $V_{P1}\propto \sqrt{I_{in}}$ by virtue of Equation (14). The voltage intercept values of the plot, $V_{C1}$ and $V_{C2}$, are determined from Equation (18) as $I_{in}\to 0$ ($V_{P1}\to 0$):

$$V_{C1}=V_{TH3},V_{C2}={\displaystyle \frac{n_3^2}{1+n_3}}{V}_{TH1}+V_{TH3}.$$

(19)

The green region in Figure 8b represents the valid operating area, defined by Equation (18). The shaded left area indicates the transition to moderate inversion at low current levels. The plot shows that a specific $V_C$, indicated with $V_C^{\ast }$, defines an $I_{in}$ operating range ($I_{in1}\le I_{in}\le I_{in2}$), provided $V_C<V_{C,max}$. At $V_C=V_{C,max}$, the $I_{in}$ interval reduces to a single point. For $V_C>V_{C,max}$, M3 enters the linear region.

Rather than utilizing these analytical expressions for circuit design, this work focuses on demonstrating the accuracy of the EKV model, with parameters extracted using the iterative subranging method, against BSIM4 simulations, using ngspice. Specifically, we compare the DC values of $V_{G1}$ and $V_{S3}$ as a function of $I_{in}$.

Transistor details and extracted parameters are summarized in

Table 2. Design details of the wide-swing cascode mirror of Figure 8. fit_range_parameter = 1.65.

Device		M1, M2	M3, M4
W, L	[µm]	2.0, 1.0	2.0, 0.5
Extracted $V_{TH}$	[mV]	578	609
Extracted $I_S$	[µA]	0.845	1.413
Extracted n		1.146	1.095
Valid current range	[µA]	0.9–57.9	1.9–105.7
Valid gate voltage range	[V]	0.61–1.08	0.65–1.09

. Parameter extraction was performed using fit_range_parameter = 1.65 for all devices, a value manually adjusted to ensure a current validity range of 2 µA to 60 µA. Based on the extracted parameters, $V_{C1}$ and $V_{C2}$ were estimated to be 609 mV and 939 mV, respectively. The bias voltages $V_C$ and $V_N$ were set to 1.3 V and 1.0 V, respectively.

Figure 9 illustrates the comparison between electrical simulation and the strong-inversion EKV approximation (Equations (13) and (16)) using the extracted parameters. While the simplified model provides acceptable accuracy within the gate voltage range reported in Table 2, it shows a visible deviation in the $V_{G1}$ trace for $I_{in}>30$ µA. This deviation highlights the limitations of the simplified EKV model, which does not account for channel length modulation effects, as outlined in Section 2.2.

6. Conclusions

This work presents a novel approach to fitting the EKV model to MOSFET data using an iterative subranging technique. The proposed methodology is implemented in Python, with the core functionality encapsulated in the Fitter class. This provides a robust framework for extracting key MOSFET parameters, including the threshold voltage ($V_{TH}$), the specific current ($I_S$), and the subthreshold slope factor (n).

The iterative subranging technique is a key innovation of this work. By progressively narrowing the voltage range used for fitting, controlled by the fit_range_parameter, the method ensures accurate parameter extraction in the region of interest (e.g., weak inversion) while still considering the full range of data. This approach is particularly effective for low-power IC design, where accurate modeling of weak and moderate inversion regions is critical.

The implementation includes several practical features to enhance usability and robustness:

• Flexibility: Users can control various aspects of the fitting process, such as the number of iterations (max_iter) and error margins (error_margin), allowing for tailored parameter extraction.
• Fit Quality Assessment: The fit_quality function evaluates the quality of the fitted curve by comparing it to the measured data within a specified error margin (quality_margin). This provides a quantitative measure of the fitting accuracy and is particularly useful in design practice to increase confidence in preliminary analytical estimations prior to extensive electrical simulations.
• Open-Source and Reproducibility: By leveraging open-source tools like scipy, numpy, and matplotlib, the implementation promotes reproducibility and accessibility, aligning with the principles of open science.

The proposed methodology was validated using measured data from a low-power MOSFET in the SkyWater130 technology, demonstrating its effectiveness across different regions of operation (weak, moderate, and strong inversion). The results highlight the method’s robustness against measurement noise and its ability to provide accurate parameter extraction even in the presence of uncertainties. Furthermore, a minimal design example has been discussed to demonstrate the practical benefits of the extraction methodology. The extracted parameters are specific to the SkyWater130 technology and may vary for other fabrication processes. However, the proposed methodology is adaptable to different technologies by adjusting the model and fitting parameters.

Future work could explore automated methods for selecting the fit_range_parameter and extending the approach to other device models and technologies. In the current implementation, the extraction methodology focused on only three model parameters: $V_{TH}$, $I_S$, and n, which are of paramount importance for DC and low-frequency operation of analog circuits, especially when designed with mature technologies. However, the proposed framework can be expanded to incorporate nanoscaled technologies and high-speed designs by including additional model parameters. Future work could incorporate more complex models to address short-channel effects and improve accuracy in advanced technologies.

The proposed methodology has significant potential for applications in low-power IC design, particularly for circuits operating in weak and moderate inversion regions. This includes subthreshold amplifiers and ultra-low-power sensor interfaces [40,41,42,43,44]. The Python implementation of the iterative subranging method is available as open-source software to facilitate its adoption and further development.