Detailed Characterization of Isolated Single and Half-Bridge Gate Drivers from Room Temperature to Cryogenic Temperatures

Abstract

This study provides a comprehensive characterization of various isolated single and half-bridge gate drivers over the entire temperature range from room temperature down to −194 °C. Unlike previous studies, which primarily focused on electrical output parameters such as rise/fall times and propagation delays, this paper also explores critical functionalities like undervoltage lockout (UVLO) and common-mode transient immunity (CMTI). The first comprehensive characterization of the power-up and power-down behavior of gate drivers identified critical operating states for practical use. In addition, CMTI testing revealed the premature functional failures of some drivers at low temperatures.

1. Introduction

Cryogenic power electronics offer the potential to significantly improve the overall system efficiency, particularly as part of superconducting propulsion systems for future electric aircraft. However, this advancement requires the careful selection of electronic components that not only perform reliably at cryogenic temperatures but also enhance the efficiency of the entire power electronics system. Consequently, many studies have focused on characterizing both passive and active electronic components at low temperatures. The greatest potential for reducing power losses at cryogenic temperatures lies in semiconductor devices based on silicon and gallium nitride (GaN) [1]. However, power electronics consist of more than just power semiconductors. In particular, the components of the commutation cell and the driver circuit must be placed close to the power semiconductors, meaning they too are exposed to low temperatures. As modern wide-bandgap (WBG) semiconductors are switched at increasingly high speeds, it becomes crucial to position driver circuits near the power switches in order to minimize parasitic elements, such as lead inductances. Since no commercially available driver is fully specified for operation at temperatures as low as liquid nitrogen (LN2, −196 °C), this study presents a detailed characterization of various single and half-bridge drivers.

Although several studies have investigated driver performance at low temperatures, these often focus on specific electrical parameters such as rise/fall times [2,3,4,5] and propagation delay [3,4,5] and merely depict the gate output voltage over time to illustrate the turn-on and turn-off behavior [6,7] or are restricted to measurements at a single temperature, typically 77 K [8,9]. Furthermore, in some publications, the measurement conditions are not adequately described, or driver ICs are tested with auxiliary power supply components at low temperatures, which can affect the driver’s temperature behavior and obscure its actual performance [7,8]. Consequently, these studies do not provide a comprehensive understanding of the functional temperature range at low temperatures and are difficult to compare, preventing a detailed analysis and comparison of the behavior of individual drivers under such conditions. However, a general trend toward shorter switching times and propagation delays at lower temperatures can be observed. As a result, an increase in gate voltage ringing is also noticeable at deeper temperatures.

In contrast, the latest paper [10] shifts away from characterizing commercial gate drivers and focuses on designing a reliable gate driver with magnetic signal isolation while also developing a robust power supply, both capable of operating across a wide temperature range from 77 K to 300 K.

Previous studies, as well as our own investigations, have shown that ICs based on Si-CMOS technology can operate at −196 °C, while bipolar and BiCMOS technologies predominantly exhibit functional failures at such low temperatures [1].

The novelty of this article can be summarized as follows:

• A comprehensive characterization of commercially available isolated single and half-bridge gate drivers from room temperature down to −194 °C;
• A detailed analysis of driver output characteristics and critical performance aspects such as undervoltage lockout (UVLO) and common-mode transient immunity (CMTI), along with the identification of critical operating states for practical applications;
• Valuable insights and design recommendations for engineers in the industry working on power electronics for temperatures below −40 °C (outside the minimum specified datasheet temperature).

Section 2 outlines the most relevant parameters of an isolated gate driver and discusses key application challenges, including the Miller effect. Section 3 provides a detailed description of the characterization methodology, covering the measurement setup, the investigated gate drivers, and the corresponding measurement circuits and parameters. Section 4 presents the experimental results obtained from testing the gate drivers from cryogenic to room temperatures.

2. Application Aspects

Gate drivers (highlighted in green in Figure 1 for single gate drivers) serve as the interface between the signal generation and the power semiconductor switch, performing several key functions. Their primary role is to ensure precise switching transitions by delivering the required voltage levels to the gate of a power transistor. This enables the transistor to switch efficiently and reliably between fully conducting and blocking states while preventing undesired switching events. Another important function of the driver IC is to amplify the current of a typically digital control signal to enable fast charging and discharging of the gate, thereby shortening switching times and minimizing switching losses. Additionally, isolating gate drivers can provide galvanic isolation between the control and load circuits, ensuring electrical separation and enhancing system safety. The most relevant parameters of an isolating driver circuit, which can also be temperature dependent, are

• Rise time and fall time of the driver output stage;
• Output current source and sink capability;
• Logical functionalities such as propagation delay and undervoltage lockout (UVLO);
• Common mode transient immunity (CMTI).

CMTI is the robustness of a driver against fast voltage transients across the isolation barrier without malfunctions and failures occurring. This is important because very high voltage gradients occur in power electronic converters due to the switching processes, which can affect the proper circuit functionality and thus the reliability of a system. As illustrated in Figure 1, the so-called Miller effect in a half-bridge circuit also poses a significant challenge, as it can lead to undesired switching events, particularly parasitic turn-on (PTO), resulting in excessive heating and potential damage. When the high-side transistor is turned on, for example, a steep voltage rise dv_ds/dt occurs at the low-side transistor, causing a current i_dg to flow via C_gd and the gate resistor R_g to the source or ground. At this moment, the low-side transistor, which must remain “OFF” (v_gs = 0 V), experiences a voltage pulse at its gate due to the current passing through the gate resistor. This pulse, however, must not exceed the threshold voltage of the transistor, otherwise a destructive short circuit would occur in the power semiconductor half-bridge (T1, T2). It is important to note that the temperature-dependent behavior of the threshold voltage varies on the transistor material. In standard Si MOSFET, for example, the threshold voltage (typ. 2 to 4 V at 20 °C) increases by approx. 30% at −196 °C [11]. The threshold voltage of GaN HEMTs (typ. 1.1 to 1.6 V at 20 °C) shows lower temperature dependence. This voltage can increase by approximately 15% down to −196 °C [11,12], but in some cases, depending on the HEMT technology, it can also show a decrease of up to 30% [12].

3. Materials and Methods

To date, only the fundamental functions and performance parameters of the output stage of a driver have been characterized [2,3,4,5,6,7,8]. However, this paper presents, for the first time, a detailed characterization of commercially available driver ICs from room temperature down to cryogenic temperatures, considering all of the relevant parameters of a driver circuit as outlined in Section 2. The test circuits and measurement methods used for this characterization are illustrated in the following figures. Figure 2a presents a simplified schematic of the test circuit, showing the recorded voltages for a single driver, while Figure 2b depicts the test circuit and measurement signals for the half-bridge drivers. Figure 3 illustrates the test setup using a block diagram. As shown, all measurement signals are externally routed through isolation from the cold chamber and recorded using calibrated measurement instruments to ensure reliable voltage detection at low temperatures.

All temperature specifications in this paper refer to the case temperature of the DUT. Given a typical thermal resistance of approximately 50 K/W for the IC package, the chip temperature in all DUTs remained at most 10 K above the case temperature under steady-state conditions. This is particularly relevant for the UVLO measurements, where the driver remains ON for a maximum of 400 ms. To further minimize ΔT, the rise time, fall time, propagation delay, and CMTI tests were conducted with measurement durations in the ms range. On the input side, the drivers receive a square-wave digital signal v_i from a signal generator and a supply voltage V_DDI (5 V or 3.3 V).

On the output side, the drivers are supplied by voltage V_DD (or V_DDA/B). The output stage is typically implemented as a complementary MOSFET stage often with separately accessible drain terminals. This design facilitates independent control of the turn-on and turn-off times of the power transistor using individual gate resistors. In Figure 2a,b, however, a simplified representation is shown with a gate resistor R_g, which can be placed at the driver outputs if needed.

Instead of directly driving the gate of a power FET, a highly linear and temperature-stable NP0 capacitor C_i (i = 1, 2, 3) is used as a dummy load, with capacitance values of 2 nF for single drivers and 4.7 nF for half bridge drivers. This approach deliberately exceeds the typical input capacitances C_iss of Si or GaN transistors, enabling a more accurate assessment of the driver’s output current capability. When referring to the output voltage, this always denotes the measured voltage across the capacitive load (v_c or v_c,A/B), which, in most cases with a zero-ohm gate resistor, corresponds to the driver’s output voltage (v_o or v_o,A/B). Additionally, 24 kΩ pull-up resistors R_i (i = 1, 2, 3) are connected to the driver outputs and a fixed 12 V source V_i (i = 1, 2, 3) to inject a small current in the mA range. This enables the detection of undesired undefined floating potentials at the driver’s output, which can be critical in practical applications due to the Miller effect. All voltage levels and passive component values used in the respective test circuits, along with the tested single and half-bridge drivers, are summarized in

Table 1. Investigated driver IC’S (S: single driver, HB: half-bridge driver).

Gate Driver	Type	Color	Manufacturer	Galvan. Isolation	VDDA/B	Ci, i = 1, 2, 3	Rg
Si8271AB-IS	S		Skyworks Solutions Inc. (Irvine, CA, USA)	Semiconductor-based barrrier	12 V	2 nF	0 Ω
Si8271ABD-IS	S		Skyworks Solutions Inc. (Irvine, CA, USA)	Semiconductor-based barrrier	12 V	2 nF	0 Ω
ADUM4121-1ARIZ	S		Analog Devices Inc. (Wilmington, MA, USA)	Inductive	12 V	2 nF	3.9 Ω
UCC5304DWVR	S		Texas Instruments (Dallas, TX, USA)	Capacitive	12 V	2 nF	0 Ω
UCC5350SBD	S		Texas Instruments (Dallas, TX, USA)	Capacitive	12 V	2 nF	0 Ω
MAX22701EASA	S		Analog Devices Inc. (Wilmington, MA, USA)	Capacitive	20 V	2 nF	0 Ω
Si8275ABD-IS1	HB		Skyworks Solutions Inc. (Irvine, CA, USA)	Semiconductor-based barrrier	12 V	4.7 nF	0 Ω
ADUM4221-2	HB		Analog Devices Inc. (Wilmington, MA, USA)	Inductive	12 V	4.7 nF	0 Ω
2EDF7275F	HB		Infineon Technologies (Neubiberg, Germany)	Inductive	12 V	4.7 nF	3 Ω
UCC21551-Q1	HB		Texas Instruments (Dallas, TX, USA)	Capacitive	15 V	4.7 nF	0 Ω
NCP51820	HB		onsemi (Phoenix, AZ, USA)		12 V	4.7 nF	0 Ω

.

The measurement results are presented in Section 4, with Section 4.1 focusing on the low-temperature behavior of the driver’s output parameters. The rise time and fall time of the output signal (v_o or v_o,A/B) are defined as the time required for the voltage to transition between 10% and 90% of its final value (or vice versa). The drivers’ current sourcing and sinking capabilities directly influence the rise and fall times at a given load capacitance. Conversely, the mean output current capability can be derived from the measured rise and fall times using a known highly linear (NP0) load capacitance based on the following relation (the designations correspond to Figure 2a but are also applicable to Figure 2b):

$$i_{ON,OFF}={\displaystyle \frac{C_1\cdot V_{DD}}{t_{rise,fall}}}$$

(1)

The source and sink capability is mainly determined by the output MOSFETs saturation characteristic and on-state resistance. Measurements were performed without an external gate resistor unless otherwise noted. In case of the ADUM4121, a non-zero gate resistance was applied per datasheet recommendations to prevent excessive output ringing. The same was performed with the 2EDF7275F. In practical applications, any smaller gate current can be set by incorporating additional external gate resistors.

Section 4.2 and Section 4.3 analyze key parameters of the driver’s logic functional units at low temperatures, specifically the propagation delay (Section 4.2) as well as the undervoltage lockout threshold (Section 4.3). The propagation delay is defined as the time difference between input and output signal transitions, measured at the 50% voltage level. A distinction is made between “low to high” and “high to low” transitions. The test method for determining the undervoltage lockout turn-on (positive-going) and turn-off (negative-going) threshold values is illustrated in Figure 4. A periodic square-wave input signal is applied while the driver supply voltage v_DD (or v_DD,A/B) is gradually increased and decreased following a ramp function, with the output signal recorded throughout the process. As long as the supply voltage remains below the undervoltage lockout (UVLO) threshold specified in the datasheet, the output should remain actively pulled to zero. This requirement also applies during the descending ramp of the supply voltage: once the voltage falls below the UVLO threshold, the output must transition to zero and remain actively fixed at this level until the UVLO threshold is exceeded again. Undervoltage monitoring is crucial for the safe operation of power semiconductor switches, as activation with insufficient gate voltage can lead to excessive losses and potential destruction of the power switch. The supply voltage ramp simulates real-world scenarios commonly encountered in practical applications, particularly when the supply voltage (e.g., v_DD,A in Figure 2b) is derived from a bootstrap circuit. In such cases, it may take several switching cycles before a stable supply voltage is reached after power-up.

Common mode transient immunity CMTI is a critical parameter for high-side gate drivers, defining their resistance to transient common-mode disturbances and specifying the allowable voltage gradient dv/dt that can be applied without compromising error-free and reliable operation. This applies to both positive and negative gradients. Due to parasitic capacitive coupling between the primary and secondary sides, fast transients can pass through the isolation barrier, potentially leading to erroneous driver behavior. Such effects include false triggering and timing errors, such as delayed or missing switching pulses, which can result in malfunctions or even permanent damage to the power transistor. Incomplete or erratic switching events may also cause excessive heat dissipation, further increasing the risk of failure. Standard CMTI tests were performed in accordance with IEC 61000-4-4, as outlined in the datasheets and depicted in Figure 2b. By applying controlled common-mode voltage transients v_HV across the driver’s ground references, the output signals v_o,A/B (or v_o) are monitored to evaluate transient robustness. Care was taken to ensure that the high-voltage transients generated by the Schlöder SFT1420 burst generator did not exceed the specified transient isolation voltage of each device under test (DUT).

For the CMTI tests, the secondary side was used as the reference ground. The high-voltage input side was powered by a 9 V battery, followed by a linear regulator (LDO) to generate the required primary-side supply voltage (5 V or 3.3 V). Control signals were applied via fiber optics to minimize ground-coupling effects. To further reduce interference, the battery, LDO, and fiber optic receivers were placed outside the cryogenic chamber, with a short coaxial cable transmitting the signal to the DUT board inside the chamber. This signal was terminated with 50 Ω near the DUT input, and supply voltage blocking capacitors were placed in close proximity to the DUT. The output-side supply voltage was provided by a laboratory power supply.

Since the highly sensitive voltage probes should not be exposed to cryogenic temperatures, it was essential to keep the twisted cables leading to external measurement equipment as short as possible. To address these requirements, a special cold chamber with a comparable thin insulation layer was developed (see Figure 5), which is much smaller (with a smaller insulation thickness and, therefore, a shorter cable length to the outside) compared to the one described in [13]. As shown in Figure 6, this cooling chamber, operated with liquid nitrogen, enables precise temperature control, maintaining well-defined DUT temperatures from room temperature down to −194 °C. Thermocouples were attached to both the test board and the DUT to accurately control and monitor temperatures throughout the tests. The CMTI test results are discussed in Section 4.4.

4. Test Results

4.1. Driver Output

The driver output stage is a critical element for precisely controlling the power transistor, enabling rapid and reliable switching between conducting and non-conducting states. The main functions of the output stage include providing the necessary voltage to ensure full turn-on of the transistor and providing high source and sink currents to rapidly charge and discharge the gate capacitance in order to reduce the on and off times, resulting in low switching losses.

Figure 7 shows the measured temperature-dependent output voltage v_o using Si8271 as an example. As can be seen, the rise and fall times decrease slightly with temperature, which also results in a slightly increased ringing.

In general, as can be seen in Figure 8 and Figure 9, most gate drivers show decreasing rise and fall times, indicating an increase current capability with lower temperatures. In each diagram, the second y-axis (on the right) represents the current source and sink capability, calculated from the measured rise and fall times according to (1). It is important to note that this reflects the average current capability, which is more relevant to practical applications and may somewhat differ from the peak current specified in the respective datasheets. The expected increase in current capability with lower temperatures occurs because, as the temperature decreases, the on-resistance reduces, and the saturation current increases for both the p-channel and n-channel Si-MOSFETs in the driver output stage. However, certain individual “outliers” demonstrate that this general trend can be overlaid and even reversed by influences of the complex IC-internal circuitry.

Three test results are particularly noticeable, as follows:

• In general, the rise and fall times stay within a quite narrow window over the entire temperature range, where-by the fastest drivers exhibit the most stable behavior;
• The MAX22701 (purple curve) and UCC5304 (green curve) in Figure 8a and the 2EDF7275F (light green) in Figure 9a show a trend reversal at very low temperatures;
• The UCC5304 and UCC5350 could only be characterized down to −175 °C, the MAX22701 down to −150 °C, and the NCP51820 down to −90 °C. In all these cases, no output pulses were provided at lower temperatures. For the NCP51820, examining the UVLO threshold at low temperatures indicates a problem with the IC-internal UVLO monitoring as the root cause. For the MAX22701, it is unclear whether the chip technology used is CMOS or BiCMOS; the latter could explain the limitations observed at very low temperatures. Regarding the UCC53xx devices, we noted a parameter scatter in the functional limits at low temperatures. In some cases, output signals were still delivered even down to −190 °C.

4.2. Propagation Delay

A driver IC comprises several functional blocks that control, amplify, and transmit signals from the digital input to the output. The time it takes for an input signal to pass through these functional blocks is called the propagation delay. The propagation delay of a driver should be largely independent of temperature, as it is typically part of the control loop in a switch-mode converter. Specifically, the turn-on and turn-off delays should run in parallel; otherwise, the output switching pulse width may vary with temperature, deviating from the input command. This is highly undesirable, particularly when setting the dead time in a half-bridge configuration, which is the period during which both transistors must be turned off to avoid bridge short circuits.

The measurement results are shown in Figure 10 and Figure 11. Since the low-side channel behaves very similarly to the high-side channel, only the propagation delay of the high-side channel of the half-bridge drivers is shown in Figure 11. The curves show a widely stable propagation delay, with a few exceptions: the turn-on delay of the MAX22701 (magenta) noticeable increases below −100 °C, while the turn-off delay shows only a slight rise. Contrary to the general trend, the UCC5350 in Figure 10 and UCC21551 in Figure 11 show an increase in propagation delay toward very low temperatures. However, these measurements continue to follow the trend already specified in the datasheet within the standard operating temperature range. As mentioned earlier, the MAX22701, NCP51820, UCC5304, and UCC5350 could not be characterized down to the lowest temperatures.

As seen, individual experimental characterization is crucial, as predicting the low-temperature behavior of the propagation delay is generally not feasible without detailed information about the driver’s internal circuitry.

4.3. Undervoltage Lockout

An important logical function of a driver-IC, crucial for the reliable and efficient operation of power semiconductors, is the undervoltage lockout. This internal protective function monitors the driver’s supply voltage (V_DD or V_DDA/B) and prevents inadequate control of the power transistor when the voltage falls below a specified threshold. This helps prevent malfunctions and potential thermal damage caused by increased on-state resistance and incomplete switching operations. For effective protection, the UVLO threshold must be chosen to align with the threshold window and transfer characteristics of the power semiconductor being controlled. To avoid oscillations around the UVLO threshold, hysteresis is implemented. This means that a higher supply voltage is required to activate the output (turn-on or positive-going threshold) than to transition into the lockout state (turn-off or negative-going threshold). The UVLO function within a driver IC consists of several circuit blocks, such as comparators and logic gates, each exhibiting its own temperature-dependent characteristics.

To monitor whether the driver output is able to provide a well-defined zero state when the IC is inactive, a pull-up resistor is used as illustrated in Figure 2a,b. The pull-up resistor R_1/2/3 = 24 kΩ is connected to a fixed 12 V source and injects a current of about 0.5 mA, simulating a Miller effect scenario.

The measured output voltage v_o (or v_o,A/B) during ramping up and down of the driver supply voltage v_DD (or v_DD,A/B) with an applied periodic input signal is shown in Figure 12 and Figure 13. It should be noted that, for better clarity, the measured driver supply voltages v_DD (or v_DD,A/B) at each temperature level are overlaid in black rather than following the color scheme. This ensures that the temperature-dependent output voltage v_o (or v_o,A/B) is clearly distinguishable and easily identifiable. As can be seen, no IC is able to pull the output down to zero voltage when the supply voltage is zero. This can be explained by Figure 14, where the diodes shown in parallel with the complementary MOSFETs of the driver output stage represent the intrinsic body diodes of the respective MOSFETs, illustrated with a diode symbol for clarity. As long as the supply voltage is insufficient to turn on either the p-MOS or the n-MOS in the driver output, the injected current flows through the body diode of the p-MOS (red current path) and charges the capacitor at the driver supply pin.

In this situation, the voltage v_o at the driver output exceeds the supply voltage v_DD by the forward voltage of the body diode. For typical Si p/n-diodes, this forward voltage increases with decreasing temperature and reaches about 0.8 V at −194 °C for the low injected current used in this test. The color scheme follows the rainbow scheme from magenta for the lowest temperature to red for room temperature. As can be seen from Figure 12 and Figure 13, the supply voltage must rise above 2.5 V before the n-MOS can be activated and the output is actively pulled to zero, depending on the driver IC. The minimum supply voltage required for this activation increases with decreasing temperature, as does the threshold voltage of the n-MOS.

Notable exceptions are the single drivers UCC5304, UCC5350, and MAX22701 as well as the half-bridge drivers 2EDF7275F and UCC21551. These devices obviously contain an additional clamping circuit that ensures the output voltage is limited within this supply voltage range. However, even these devices are unable to reliably limit the output voltage to values below 1 V, even against the very low injection current used in the tests.

The floating state output voltage levels vary from approximately 1.0 V to 1.8 V at room temperature to 1.5 V to 2.8 V at −194 °C. A similar behavior is observed in all drivers as the driver voltage decreases. Below a certain supply voltage, the driver can no longer actively drive its output to a zero state.

A short numerical example should illustrate the problem with the help of Figure 14: assume that the power MOSFET has a Miller capacitance of C_gd = 20 pF and a dv_ds/dt = 50 V/ns occurs. Then, a current i_dg = 1A is injected causing a voltage drop of 2 V across a typical chip internal gate resistance of R_g,i = 2 Ω. If the driver now allows an output voltage of 2.5 V when there is no or insufficient supply voltage, a voltage v_g,i of 4.5 V occurs at the inner MOSFET gate, which already exceeds the typical threshold voltage of Si and SiC MOSFET. If there is an additional external gate resistor (R_g,on) in the circuit, the situation becomes even worse, and a parasitic turn-on becomes unavoidable. This problem becomes even more critical when controlling GaN HEMTs due to their low threshold voltage levels.

As soon as the driver’s internal logic becomes functional, the output is actively pulled to zero. In the subsequent voltage range until the UVLO turn-on threshold is reached, no impermissible switching operations at the output (glitches) were detected over the entire temperature range for all drivers tested, except for the ADUM4221 (see Figure 13b).

The latter showed a pronounced malfunction near the UVLO threshold at very low temperatures, with impermissible switching operations and phases during which the output stage was even deactivated. This issue, similar to situations with supply voltages close to zero, manifests as output voltages exceeding the driver supply voltage. At both the UVLO turn-on and turn-off thresholds, all gate drivers showed a pulse shortening due to a lack of synchronization between the UVLO output enable and the control or input pulses. From an application point of view, however, this is generally not a critical issue.

According to the specification, the driver must deliver output pulses between the UVLO “ON min” and “ON max” limits and must shut down within the UVLO “OFF max” and “OFF min” limits. Above the UVLO threshold and within the functional temperature range shown in Figure 8 and Figure 9, all drivers provided regular output pulses with a level corresponding to the driver supply voltage. At the 1 kHz frequency used for the tests, these pulses are represented as colored areas in the diagrams. Nevertheless, the integrity of the output pulses within the regular operating range, i.e., above UVLO, was verified in all cases, particularly at low temperatures.

As shown in Figure 12 and Figure 13, the power-up and power-down behavior of all drivers tested is largely symmetrical. Upon crossing the UVLO threshold with decreasing supply voltage (as shown in the right-hand side images), the output voltage is initially actively pulled to zero. However, from approximately 0.1 s onward, the output voltage is no longer held at zero, and, similar to the behavior with the rising supply voltage ramp, floating-state output voltages are observed. Here, the output voltage also exceeds the driver supply voltage by the forward voltage of the body diode. This behavior can also be explained by the malfunctioning of the internal logic at low driver supply voltage levels. The non-linear decay of the supply voltage is due to the characteristic of the programmable DC voltage source used, which could provide very low output voltages only with limited dynamics due to the lack of active sink capability. However, this voltage curve closely resembles the real supply voltage behavior in an application after power-off.

In addition to investigating the behavior of the output stage within the UVLO operating range, an important objective of this test was to analyze the temperature dependence of the driver’s UVLO threshold. The dashed lines in Figure 12 and Figure 13 give the UVLO threshold range as specified in the respective datasheet for room temperature. An overview of the test results for both the positive- and negative-going UVLO thresholds as a function of temperature is presented in Figure 15 and Figure 16.

All drivers, except the NCP51820, show a slight, and in the case of the MAX22701, a more pronounced, decrease in the UVLO thresholds as the temperature decreases. Overall, however, the UVLO thresholds of all inconspicuous drivers are found to be remarkably stable. Nevertheless, from an application engineering perspective, a slight increase in the UVLO threshold values as the temperature decreases, corresponding to the increase in the threshold voltage of the power components, would be desirable.

The half-bridge driver NCP51820 is based on level shifter technology and the only tested device without galvanic isolation. This device was included because it is specifically announced as a driver designed to meet the requirements for GaN transistors and therefore could be attractive for cryogenic GaN applications. Unfortunately, the driver failed at liquid nitrogen temperatures. As shown in Figure 16b, the issue is likely due to the UVLO threshold running away below −75 °C. At −95 °C, the UVLO threshold already exceeds the maximum driver supply voltage.

The two drivers Si8271AB and Si8271ABD behave similarly regarding their UVLO behavior (see Figure 12a,b and Figure 15a,c). The designation “D” in the name stands for a “deglitch” variant. However, the tests did not reveal any influence of this variant on the UVLO behavior.

4.4. Common Mode Transient Immunity

A high CMTI (Common Mode Transient Immunity) is crucial for isolating gate drivers, particularly when operating modern fast-switching power semiconductors. It is essential that the driver’s CMTI value exceeds the maximum voltage gradients across the floating power transistor. In cryogenic power electronics, the CMTI requirements are further increased due to the higher switching speeds of GaN and Si FET at lower temperatures. The measurement results indicate that the speed of GaN-HEMTs at cryogenic temperatures can nearly double from 70 V/ns to 130 V/ns compared to their performance at room temperature [14]. Modern drivers such as Si827x or MAX22701 are specified with a CMTI of up to 300 V/ns.

Since only output pulses from the CMTI tests are presented in the following figures, one detailed measurement result illustrating the evaluation of the CMTI behavior is shown in Figure 17 for the ADUM4121-1ARIZ. In addition to the driver input voltage at room temperature and at −194 °C, this figure also shows the burst voltage (v_HV) and the driver output signal during one burst period. In subsequent figures, only the burst signal and the output signal are shown. Please note that, in the present test setup, the reference potential of the burst generator is at the output of the drivers (see Figure 2b). As a result, positive voltage pulses cause a negative dv/dt at the rising edge, according to the usual definition related to the primary side.

During burst measurements with voltages up to 2500 V, significant noise superimposes the measured output voltage, as shown in Figure 18. Through extensive investigations (including short-circuited probes, etc.), we were able to verify that this noise was caused by interference coupled into the measurement setup and is not present in the output signal.

To improve the interpretation of the results, particularly with respect to potential faulty switching states, a low-pass filter with a sufficiently high cutoff frequency was used to attenuate the very high ringing frequencies. Depending on the CMTI value specified in the datasheet, tests were carried out at each temperature level with burst voltages ranging from 1 kV and 2.5 kV. With a rise/fall time of the burst pulses in the range of 5 to 7 ns, this results in voltage transients dv/dt in the range of 100 V/ns to 350 V/ns.

Please note that the selection of temperatures shown in the following figures was made based on specific anomalies observed in the individual drivers or due to the limited functionality in the low-temperature range, as previously explained.

Before discussing some drivers in detail, the following findings of the CMTI measurements can be summarized:

• The CMTI specification according to the datasheet was verified for almost all drivers at room temperature. Irregularities were detected in the Si8275 half-bridge driver at negative transient voltages (see Figure 19 and Figure 20);
• Within the specified CMTI value, the following drivers showed no irregularities over the entire temperature range from room temperature to −194 °C (comparable to Figure 17): Si8271AB/D, 2EDF7275F, ADUM4121, ADUM4221, UCC5350, and UCC5304 (for the latter two, see the mentioned parameter scatter with respect to the low-temperature functional limits also);
• For the MAX22701, a short-term shutdown of the output signal was also observed at 0 °C and +100 V/ns, i.e., within the specified CMTI range (typ. 300 V/ns), see Figure 21;
• With decreasing temperature and transient voltages exceeding the specified CMTI, some drivers tend to have higher voltage drops, temporary OFF states, or even driver damage: UCC5304, UCC5350, and UC21551.

While all other drivers tested were unremarkable at room temperature, the half-bridge driver Si8275 showed a conspicuous error pattern: specified in the datasheet as “min. 200 V/ns, max. 400 V/ns”, the driver behaved correctly at 250 V/ns during positive transients but an unusual malfunction occurred during negative transients (see Figure 19a,b).

Depending on the burst amplitude, this ranged from a brief deactivation of the HS and LS output signals within a single signal period (e.g., 130 V/ns at −1.4 kV burst, see Figure 20) to a complete interruption of the output signals for a significant period following a burst event. For instance, at −0.5 kV, the output signal was interrupted for 220 ms, while at −1.1 kV, as illustrated in Figure 19, the interruption was significantly reduced to 3.3 ms. Due to the long measurement time, both the input and output signals are represented as colored areas rather than pulses. The output signal automatically resumed without any external intervention (reset, etc.) after this interruption, applying to both the high-side (HS) and low-side (LS) outputs. Measurements conducted with replacement drivers from two different production batches, 2021 and 2024, showed consistent behavior. At negative transients exceeding 120 V/ns, malfunctions characterized by brief output deactivation were consistently observed across the entire temperature range down to −194 °C.

Within the typical CMTI specification, some drivers showed correct functioning across the entire temperature range from room temperature to −194 °C, under both negative and positive dv/dt conditions. This applies to the following drivers and the corresponding applied transient voltages: Si8271AB/D (±300 V/ns), 2EDF7275F (±300 V/ns), ADUM4121 (±200 V/ns), ADUM4221 (±170 V/ns), UCC5350 (±140 V/ns), and UCC5304 (±140 V/ns).

The CMTI behavior of the MAX22701 driver differed from that of the previously mentioned drivers. Within its specified typical CMTI of 300 V/ns, short-term deactivation of the output signal was already observed at 0 °C and positive transients with 100 V/ns, as illustrated in Figure 21 at 12 µs. At −150 °C, undefined output pulses occurred, and even after warming up to room temperature, the driver remained non-functional.

In general, interference on the driver output signal could be observed at high dv/dt values that approached or exceeded the specified maximum value. These were typically incomplete turn-on or turn-off operations with a duration of up to several hundred nanoseconds, which is shown in Figure 22 as an example. At −194 °C, the Si8271 showed short turn-off events at positive transients of 350 V/ns, while at negative transients of the same steepness, no false ON/OFF states were observed over the entire temperature range.

Some drivers showed permanent damage when the maximum specified dv/dt was exceeded, despite careful care not to exceed the maximum specified voltage amplitude. The UCC5304 showed irregularities at the output at −150 °C and +100 V/ns after voltage transients of up to ±300 V/ns were applied at each temperature level during the cooling process (see Figure 23). When the device was stressed exclusively with transients within the specification of ±130 V/ns, no irregularities were observed across the entire temperature range.

A similar behavior was observed with the UCC5350 (rated at typ. 120 V/ns). Starting at room temperature with transients exceeding 200 V/ns, no more output pulses were detected at −150 °C and functionality did not recover upon reheating to room temperature. After replacing the driver and limiting the transient voltage to ±130 V/ns at each temperature level, proper functionality was maintained down to −194 °C.

The UCC21551, with a dv/dt rating > 125 V/ns, exhibited similar behavior. At −100 °C and +170 V/ns, missing and shortened pulses were observed, as shown in Figure 24. When voltage transients of up to ±200 V/ns were applied at each temperature level, no output signal was produced at −125 °C or below. However, CMTI measurements at approx. ±70 V/ns across the entire temperature range showed no impact on the output signal.

5. Conclusions

This article presents a comprehensive characterization of isolated single- and half-bridge gate drivers over a temperature range extending from room temperature to −194 °C. The measurement setup and methodology are described in detail, with particular emphasis on the low-temperature test environment. Key performance parameters, including rise/fall times, propagation delay, undervoltage lockout (UVLO), and common-mode transient immunity (CMTI), were evaluated across the full temperature span.

Most tested drivers maintain a stable output signal down to −194 °C. For operation above −150 °C, the MAX22701 is a viable option, while the NCP51820 remains functional down to −75 °C. The UCC5350 and UCC5304 exhibit deviations below −175 °C, with some devices failing at −194 °C. However, other units from the same production batch, used in CMTI tests, remained fully operational at −194 °C, indicating potential device variability under cryogenic conditions.

Rise and fall times generally decrease with temperature, though some drivers exhibit an inverse trend at very low temperatures. While propagation delay typically shortens at lower temperatures, the UCC5350 and UCC21551 show increasing delays, and the MAX22701 experiences a sharp rise below −100 °C.

The first detailed characterization of power-up and power-down behavior in gate drivers highlighted key operational aspects for practical applications. The supply voltage ramp simulates real-world scenarios, especially in applications where the supply voltage is derived from a bootstrap circuit, which may take several switching cycles to stabilize after power-up. With the exception of the NCP51820, all tested drivers exhibit remarkably stable UVLO thresholds across their entire functional temperature range. Notably, the UCCx series, MAX22701, and 2EDF7275F display particularly low output voltage levels at low supply voltages. However, none of the tested drivers actively pulls the output to zero under low or zero supply voltage conditions. This effect becomes critical in applications where Miller current induces a voltage drop across the chip’s internal gate resistance, potentially driving the gate voltage of power transistors above their threshold, even in the absence of an external gate resistor. This challenge is exacerbated in GaN-based systems due to their lower threshold voltages compared to Si-MOSFETs.

Regarding CMTI performance, several drivers, including the Si8271AB/D (±300 V/ns), 2EDF7275F (±300 V/ns), ADuM4121 (±200 V/ns), ADuM4221 (±170 V/ns), UCC5350 (±140 V/ns), and UCC5304 (±140 V/ns), remained fully functional from room temperature to −194 °C under both positive and negative dv/dt conditions within their specified limits.

At lower temperatures and transient voltages near or beyond the specified CMTI ratings, some drivers exhibited anomalies, such as unintended switching events or possible degradation. For applications like drive converters, with inherently limited switching speeds, all mentioned drivers in the previous paragraph can operate down to −194 °C. However, for extremely fast switching applications, drivers with high CMTI robustness, such as the Si8271AB/D and 2EDF7275F (both rated at 300 V/ns), should be prioritized