An Experimental Review of Step-Down Converter Topologies with Wide Input Voltage Range for Modern Vehicle Low-Power Systems

Abstract

This study explored wide input voltage range step-down converters, which are crucial for supplying low-voltage power to microcontrollers, communication modems, and other low-power electronic circuits in modern vehicles that feature a diverse range of battery voltages, from 12 V to 90 V. Specifically, it focuses on converters suitable for devices employing 2G to 5G communication modems that typically require a 4 V supply. This article conducted a review of existing step-down converter technologies, focusing on the comparative analysis of synchronous versus asynchronous switched-inductor converters. Experimental data on 14 different converters is presented, where theoretical efficiency predictions are compared with empirical measurements. Using the dataset of 326 points gathered through experimental evaluation enabled evaluation of the accuracy of the efficiency estimating mathematical model, which demonstrated 73% accuracy for input voltages ranging from 12 V to 90 V and output currents from 0.1 A to 2 A. Further analysis demonstrated that estimating power losses in milliwatts enhanced the model’s accuracy, as indicated by a 94% correlation between measured and calculated power losses and an 87% correlation of measured power losses with measured temperature. This study provides insights that will guide both the authors and readers in developing more efficient DC-DC step-down converters, optimized for modern automotive applications.

1. Introduction

The integration of advanced electronic devices such as GNSS (Global Navigation Satellite System) trackers, Wi-Fi modems, and cellular modems has become increasingly prevalent in contemporary vehicular systems. These devices, which rely on 2G, 3G, 4G, or 5G network technologies, require a stable 4 V power supply, with an output current specification of 0.1–2 A [1,2,3]. Given the wide range of battery voltages found in modern vehicles, ranging from 12 V in standard light vehicles (with a growing trend toward 48 V systems) [4,5] to 72 V and higher in electric bicycles and scooters [6], wide input range DC-DC converters are essential to ensure stable voltage regulation across this diverse landscape of applications.

While existing review articles on DC-DC converters offer valuable insights, they tend to focus on general applications [7,8,9] or specific automotive use cases [10,11,12]. However, these reviews often cannot provide detailed knowledge of converters designed for wide input range applications in low-power systems. This study aimed to address these gaps by providing a focused evaluation of DC-DC converters specifically suited for low-power vehicular applications including GNSS trackers [13], vehicle-to-vehicle (V2V) [14] and vehicle-to-everything (V2X) [15] communication systems, Advanced Driver Assistance Systems (ADAS) [16], and various other vehicular electronic circuits. This article presented an in-depth evaluation of 14 different step-down DC-DC converters. This sample size allows for a comprehensive analysis, enabling detailed comparisons and providing valuable insights into their performance under standardized conditions.

The selection of an appropriate converter topology is critical, based on efficiency, size, cost, and complexity considerations relative to the application’s requirements. An analytical review of these topologies and their practical performance comparison is essential for understanding their operational principles, design parameters, and suitability for various applications. This evaluation aids in the strategic selection of converter topologies to ensure alignment with performance objectives. Previous studies [7,8,17,18,19] revealed a review and serves as a foundational reference in this field. The summary of these analyses is encapsulated in

Table 1. Summary of DC-DC converter topologies and evaluation for wide input voltage range applications.

Topology		Verdict *	Comments
Switched-Inductor Converters	Buck	Suitable	Simple topology, only 2 switches are required, relatively smaller PCBs are required Potentially can achieve good efficiency over a wide input voltage range High switching losses A large size of passive components
Switched-Inductor Converters	Tapped Inductor	Suitable, but not ideal	More than 2 switches are required, larger PCB area is required Efficiency losses due to losses in inductors are hard to control over a wide input voltage range
Switched-Inductor Converters	Coupled Inductor	Suitable, but not ideal	Performance is potentially good, but size and complexity are not ideal Voltage overshoot Large DC magnetizing current
Isolated Converters	LLC; Dual Active Bridge	Suitable, but not ideal	Requires large PCB/IC area (high number of switches)
Switched-Capacitor Converters	Switched Capacitor	Not suitable	A high number of switches >Fixed voltage conversion ratio
Hybrid Converters	Single Path; Multi-Path; Extended Buck; Three-level Buck	Suitable in terms of efficiency	Can be hard to implement due to the high number of switches Low voltage stress on switches

* Requirements: wide input voltage range of 10–90 V, 0.1–2 A output current, 4 V output voltage.

, providing a consolidated view of the step-down DC-DC converter landscape and evaluating each topology for our specific wide input voltage range application.

In summary, Table 1 shows that simple buck converters offer an effective trade-off between complexity, solution size, and performance for high step-down ratio, low-power applications. These converters, along with their control mechanisms, currently dominate the market for powering compact devices such as GNSS and cellular modems in modern vehicles. Although hybrid topologies may offer higher efficiency in some cases, they typically involve increased design complexity and are less prevalent in low-power applications. Therefore, this study primarily focuses on buck converters as a practical and widely adopted solution.

The experimental review article presents a unified PCB design and testing methodology applied across 14 step-down DC-DC converters. Each converter was mounted on a custom PCB and evaluated under consistent conditions to ensure comparability. The resulting performance data serve as a benchmark for future research and the development of integrated converters targeting automotive and similar wide input voltage environments. While the initial design focus is on buck converters, future investigations may explore hybrid topologies that could offer improved efficiency without compromising size and integration, especially in applications where high step-down ratios lead to extremely low duty cycles and associated performance limitations.

The core contribution of this article lies in the detailed experimental review of 14 commercial DC-DC converters and the application of a validated mathematical model for predicting their efficiency. By targeting low-power vehicular systems, this work experimentally addresses a specific application domain that is often overlooked in broader converter reviews. The findings not only enhance understanding of converter behavior under realistic conditions but also provide a practical foundation for optimizing future IC designs intended for wide input voltage ranges in automotive electronics. The evaluated converters were selected to represent a broad cross-section of commercially available solutions, including devices from different manufacturers, various internal architectures, and both synchronous and asynchronous designs. The set also includes both integrated converters and controller-based configurations with external power stages, enabling a comprehensive comparison across common implementation approaches.

This paper is organized as follows: A review of different step-down converter topologies and types are presented in Section 2. Efficiency and power losses are estimated in Section 3 and Section 4. Equipment under test (EUT) parameter specification, experimental test methodology, and results are given in Section 5, Section 6, Section 7, Section 8 and Section 9 with a discussion in Section 10. This paper is summarized with conclusions, providing references and extended results in Appendix A and Appendix B.

2. Overview of Buck DC-DC Controllers and Converters

The majority of step-down converters currently available in the market are based on the conventional buck architecture [20,21]. Depending on their specific configuration, these converters may utilize either two MOSFETs—high-side (HS) and low-side (LS) or a combination of a HS MOSFET and a LS diode—while incorporating a single inductor in their design. These converters can be categorized based on their level of integration and the implementation of the LS switch, distinctions that substantially influence their efficiency, physical footprint, and component specifications. Figure 1 provides a graphical overview of the DC-DC controllers and converters discussed, illustrating their key characteristics and variations.

Given the fact that the power MOSFETs can be integrated into the DC-DC ICs or added as external components, it is vital to separate the two types for the purity of the results. Thus, the latter ICs in this paper are classified as either controllers or converters [22] with the details presented below:

Controller-based DC-DC converters. This variant employs a controller IC to operate an external MOSFET switch. This arrangement tends to reduce the IC’s physical footprint since the MOSFET switch is not integrated. However, it demands a larger count of external parts and more PCB area, offering the advantage of selecting MOSFETs with lower ON resistance. This selection potentially reduces conduction losses in the MOSFETs, presenting a trade-off between device size and efficiency.

Converters with an integrated MOSFET switch. Adopting a different approach, this configuration integrates one or two MOSFETs directly within the IC. This design philosophy aims at enhancing the compactness of the system by minimizing the reliance on external components. While this leads to an improvement in system integration and reduces the overall size, it also tends to increase conduction losses due to the generally higher ON resistance of the integrated MOSFETs.

DC-DC converters and controllers can also be classified by the design of their LS switch, which can be implemented by a transistor or a rectifying diode, as follows:

Synchronous buck converters. Characterized by the integration of two MOSFET switches directly within the IC, synchronous buck converters stand out for their high efficiency and reduced reliance on external components. Despite their larger IC footprint and higher cost, they offer a compelling option for applications prioritizing efficiency. The synchronous converter and controller are shown in Figure 1a.

Asynchronous buck converters. These converters incorporate a single MOSFET switch within the IC and utilize an external diode to fulfill the role of the second switch. Although this approach leads to a smaller IC footprint and potentially lower cost, it typically results in lower efficiency and demands more external components compared to their synchronous counterparts. The asynchronous converter and controller are shown in Figure 1b.

3. Efficiency Calculation and Power Losses in DC-DC Converters

The efficiency (η) of a DC-DC converter or controller is expressed as the ratio of the output power (${\mathrm{P}}_{\mathrm{O}\mathrm{U}\mathrm{T}}$) to the input power (${\mathrm{P}}_{\mathrm{I}\mathrm{N}}$):

$$\mathsf{\eta }={\displaystyle \frac{{\mathrm{P}}_{\mathrm{O}\mathrm{U}\mathrm{T}}}{{\mathrm{P}}_{\mathrm{I}\mathrm{N}}}}\times 100\%$$

(1)

In an ideal DC-DC converter, where power transfer is entirely lossless, efficiency reaches 100%. However, real-world DC-DC converters deviate from this ideal due to inherent power losses. The output power (${\mathrm{P}}_{\mathrm{O}\mathrm{U}\mathrm{T}}$) is thus given by the difference between input power (${\mathrm{P}}_{\mathrm{I}\mathrm{N}}$) and power losses (${\mathrm{P}}_{\mathrm{L}\mathrm{O}\mathrm{S}\mathrm{S}}$):

$${\mathrm{P}}_{\mathrm{O}\mathrm{U}\mathrm{T}}={\mathrm{P}}_{\mathrm{I}\mathrm{N}}-{\mathrm{P}}_{\mathrm{L}\mathrm{O}\mathrm{S}\mathrm{S}}$$

(2)

Power losses in DC-DC converters encompass switching losses, conduction losses, and others. The quantification of efficiency necessitates a meticulous analysis of these factors within the circuit. This chapter aimed to systematically analyze and comprehend the major contributors to power losses in step-down DC-DC converters, providing a rigorous foundation for estimating efficiency under specific operational conditions.

The overarching objective is to furnish designers and researchers with an analytical review for evaluating and optimizing efficiency in DC-DC converter-integrated circuits. Through a methodical examination of power loss mechanisms, this study sought to facilitate informed decision-making during the design and testing phases, contributing to the advancement of practical application. A summary of main power losses in synchronous and asynchronous buck converters and controllers [23,24,25,26] is presented in

Table 2. Summary of main power losses in synchronous and asynchronous buck converters and controllers.

Source of Power Loss	Formula
Supply power of IC	${\mathrm{P}}_{\mathrm{I}\mathrm{C}}={\mathrm{V}}_{\mathrm{I}\mathrm{N}}\times {\mathrm{I}}_{\mathrm{I}\mathrm{C}}$
Switching losses during turn-on and turn-off of HS MOSFET	${\mathrm{P}}_{\mathrm{S}\mathrm{W}-\mathrm{H}\mathrm{S}}={\mathrm{V}}_{\mathrm{I}\mathrm{N}}\times {\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}\times {\mathrm{t}}_{\mathrm{S}\mathrm{W}-\mathrm{H}\mathrm{S}}\times {\mathrm{f}}_{\mathrm{S}\mathrm{W}}$
Conduction losses in HS MOSFET	${\mathrm{P}}_{\mathrm{O}\mathrm{N}-\mathrm{H}\mathrm{S}}={{\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}}^2\times {\mathrm{R}}_{\mathrm{O}\mathrm{N}-\mathrm{H}\mathrm{S}}\times \left({\displaystyle \frac{{\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T}}}{{\mathrm{V}}_{\mathrm{I}\mathrm{N}}}}\right)$
Gate charge losses in HS MOSFET	${\mathrm{P}}_{\mathrm{G}-\mathrm{H}\mathrm{S}}={\mathrm{Q}}_{\mathrm{G}\mathrm{S}-\mathrm{H}\mathrm{S}}\times {\mathrm{V}}_{\mathrm{G}\mathrm{S}-\mathrm{H}\mathrm{S}}\times {\mathrm{f}}_{\mathrm{S}\mathrm{W}}$
Dead-time losses in the diode of LS MOSFET *	${\mathrm{P}}_{\mathrm{D}\mathrm{T}}=2\times {\mathrm{t}}_{\mathrm{D}\mathrm{T}}\times {\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}\times {\mathrm{V}}_{\mathrm{D}-\mathrm{L}\mathrm{S}}\times {\mathrm{f}}_{\mathrm{S}\mathrm{W}}$
Switching losses during turn-on and turn-off of LS MOSFET *	${\mathrm{P}}_{\mathrm{S}\mathrm{W}-\mathrm{L}\mathrm{S}}={\mathrm{V}}_{\mathrm{D}-\mathrm{L}\mathrm{S}}\times {\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}\times {\mathrm{t}}_{\mathrm{S}\mathrm{W}-\mathrm{L}\mathrm{S}}\times {\mathrm{f}}_{\mathrm{S}\mathrm{W}}$
Conduction losses in LS MOSFET *	${\mathrm{P}}_{\mathrm{O}\mathrm{N}-\mathrm{L}\mathrm{S}}={{\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}}^2\times {\mathrm{R}}_{\mathrm{O}\mathrm{N}-\mathrm{L}\mathrm{S}}\times \left(1-{\displaystyle \frac{{\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T}}}{{\mathrm{V}}_{\mathrm{I}\mathrm{N}}}}\right)$
Gate charge losses in LS MOSFET *	${\mathrm{P}}_{\mathrm{G}-\mathrm{L}\mathrm{S}}={\mathrm{Q}}_{\mathrm{G}\mathrm{S}-\mathrm{L}\mathrm{S}}\times {\mathrm{V}}_{\mathrm{G}\mathrm{S}-\mathrm{L}\mathrm{S}}\times {\mathrm{f}}_{\mathrm{S}\mathrm{W}}$
Conduction losses in the inductor	${\mathrm{P}}_{\mathrm{L}\_\mathrm{R}\mathrm{D}\mathrm{C}}={{\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}}^2\times {\mathrm{R}}_{\mathrm{D}\mathrm{C}-\mathrm{L}}$
Conduction losses in LS diode **	${\mathrm{P}}_{\mathrm{D}}={\mathrm{V}}_{\mathrm{D}}\times {\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}\times \left(1-{\displaystyle \frac{{\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T}}}{{\mathrm{V}}_{\mathrm{I}\mathrm{N}}}}\right)$

* Only applicable to synchronous converters and controllers. ** Only applicable to asynchronous converters and controllers.

. These formulas are used in the further chapters of this article to mathematically predict the efficiency of DC-DC converters and controllers.

4. Evaluation of LS Switch Power Losses in Synchronous and Asynchronous EUTs

The efficiency of EUT is assessed using the formulas presented in Table 2. Looking at the table, it is clear that the main difference between synchronous and asynchronous EUTs is the power losses in the LS switch. Synchronous EUTs experience dead-time losses and switching losses in the LS MOSFET, and conduction losses in the LS MOSFET. In contrast, asynchronous EUTs mainly encounter conduction losses in the LS diode. These power losses are depicted graphically in Figure 2, with the underlying assumptions provided in

Table 3. Parameters used for comparison of LS switch power losses in synchronous and asynchronous EUTs.

Parameter	Value
$\mathrm{Input} \mathrm{voltage} {\mathrm{V}}_{\mathrm{I}\mathrm{N}}$ (V)	90
$\mathrm{Output} \mathrm{voltage} {\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T}}$ (V)	4
$\mathrm{Switching} \mathrm{frequency} {\mathrm{f}}_{\mathrm{S}\mathrm{W}}$ (kHz)	150
$\mathrm{ON} \mathrm{resistance} \mathrm{of} \mathrm{LS} \mathrm{MOSFET} {\mathrm{R}}_{\mathrm{O}\mathrm{N}-\mathrm{L}\mathrm{S}}$ (mΩ) *	300
$\mathrm{Switching} \mathrm{time} \mathrm{of} \mathrm{LS} \mathrm{MOSFET} {\mathrm{t}}_{\mathrm{S}\mathrm{W}-\mathrm{L}\mathrm{S}}$ (ns) *	50
$\mathrm{Dead} \mathrm{time} {\mathrm{t}}_{\mathrm{D}\mathrm{T}}$ (ns) *	100
$\mathrm{Voltage} \mathrm{drop} \mathrm{in} \mathrm{body} \mathrm{diode} \mathrm{of} \mathrm{LS} \mathrm{MOSFET} {\mathrm{V}}_{\mathrm{D}-\mathrm{L}\mathrm{S}}$ (V) *	1
$\mathrm{Voltage} \mathrm{drop} \mathrm{in} \mathrm{LS} \mathrm{Diode} {\mathrm{V}}_{\mathrm{D}}$ (V) **	0.5

* Only applicable to synchronous converters and controllers. ** Only applicable to asynchronous converters and controllers.

.

In this theoretical example, for output currents exceeding 1.5 A, power losses in synchronous EUTs are higher than those in asynchronous EUTs. This finding challenges the prevailing assumption that one EUT topology inherently outperforms the other. The performance of synchronous EUTs is significantly influenced by the design of the LS switch, including factors such as switching time, dead time, and the ON resistance of the LS MOSFET. Under certain conditions, a simpler asynchronous EUT using a basic diode may achieve higher efficiency than a synchronous EUT. Further analysis will explore the real-world performance of these EUTs, providing a comprehensive evaluation that substantiates these preliminary findings.

It is important to note that the parameters in Table 3 are illustrative examples. The actual performance of each EUT will vary because each device has a unique set of parameters defining its performance. Therefore, the results shown in Figure 2 offer only a mathematical comparison of the EUTs.

5. PCB Design and Testing Methodology for EUTs

This study encompassed a comprehensive examination of DC-DC converters and controllers, all of which were evaluated using custom-designed PCBs. To guarantee uniform testing conditions for all EUTs, the PCB design adhered to defined specifications. The design criteria included the following:

• Utilization of (55 × 30) mm 4-layer FR4 PCBs.
• Establishment of input and output connections via 4 mm long AWG 18 wires.
• Selection of high-voltage trace clearances following the IPC-2221 standard, enhancing safety and reliability.
• Integration of input capacitors, consisting of two 2.2 µF 100 V 1206 capacitors and one 10 nF 100 V 0603 capacitor, to stabilize input voltage fluctuations.
• Configuration of output capacitors with two 47 µF 10 V case-B tantalum capacitors, one 10 nF 50 V 0402 capacitor, and one 1 nF 50 V 0402 capacitor to ensure stable output voltage.
• Uniform selection of all inductors from the same manufacturer, sized (10.7 × 10 × 4) mm, with inductance tailored to the switching frequency, promoting consistency and efficiency.
• Setting the EUT to deliver a stable output of 4 V, meeting specific application requirements.
• Strategic placement of feedback and switching node traces, minimized in length and isolated from other signals with a ground plane, to reduce noise and interference.
• For asynchronous converters, the choice of a Schottky diode (NRVTSA4100ET3G, OnSemi, 100 V, 4 A, 0.68 V@4 A) [27].
• For controllers that require external N-type MOSFETs, NCEP1545G (28 mΩ) was used [28].

These design considerations ensured that the PCBs provided a standardized platform for evaluating the performance of DC-DC converters and controllers across various metrics, thereby contributing valuable insights into application-specific performances.

6. Parameters Defining EUTs

Experimental evaluation determines the efficiency of 14 different EUTs that were chosen to represent a wide cross-section of commercially available solutions, including devices from different manufacturers, various internal architectures, and both synchronous and asynchronous designs. To verify these results, it is essential to calculate the theoretical efficiency based on known and measured parameters of the EUTs and then compare these theoretical results with the experimental findings.

Table 4. Parameters influencing losses in EUTs.

No	Type	${\mathbf{R}}_{\mathbf{O}\mathbf{N}-\mathbf{H}\mathbf{S}}$ (mΩ)	${\mathbf{R}}_{\mathbf{O}\mathbf{N}-\mathbf{L}\mathbf{S}}$ (mΩ)	${\mathbf{V}}_{\mathbf{D}}$ (V)	${\mathbf{R}}_{\mathbf{D}\mathbf{C}-\mathbf{L}}$ (mΩ)	${\mathbf{f}}_{\mathbf{S}\mathbf{W}}$ (kHz) *	${\mathbf{t}}_{\mathbf{S}\mathbf{W}-\mathbf{H}\mathbf{S}-\mathbf{O}\mathbf{N}}$ (ns) *	${\mathbf{t}}_{\mathbf{S}\mathbf{W}-\mathbf{H}\mathbf{S}-\mathbf{O}\mathbf{F}\mathbf{F}}$ (ns) *	${\mathbf{I}}_{\mathbf{I}\mathbf{C}}$ (µA)
1	Asynchronous Converter	500	-	0.52	145	153	21.6	10.6	240
2		250	-		93	341	4.6	5.8	450
3		400	-		145	296	6.7	6.1	500
4		500	-		93	333	10.8	10.1	240
5		100	-		145	135	9.9	6.8	1000
6		260	-		145	107	14.1	26.9	5000
7		150	-		93	315	37.6	13.2	130
8		600	-		145	110	5	8.1	5000
9	Synchronous Converter	600	300	-	93	283	11	7.8	160
10		300	150	-	93	294	5.3	14.7	2000
11	Asynchronous Controller	24	-	0.52	145	68	37.6	23.1	2200
12		24	-		145	142	32.6	22.5	2000
13		58	-		93	295	8.9	31.5	22
14	Synchronous Controller	24	24	-	93	305	33.26	23.46	2100

* Measured parameters (${\mathrm{V}}_{\mathrm{I}\mathrm{N}}=48 \mathrm{V};{\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}=1 \mathrm{A})$.

lists parameters that affect the losses in EUTs, where each EUT is labeled according to its topology. One part of power losses is conducted losses of EUTs. All EUTs are characterized by the ON resistance of the HS MOSFET (${\mathrm{R}}_{\mathrm{O}\mathrm{N}-\mathrm{H}\mathrm{S}}$) and the DC resistance of the inductor (${\mathrm{R}}_{\mathrm{D}\mathrm{C}-\mathrm{L}}$). Additionally, synchronous EUTs experience conducted losses affected by the ON resistance of the LS MOSFET (${\mathrm{R}}_{\mathrm{O}\mathrm{N}-\mathrm{L}\mathrm{S}}$), while asynchronous EUTs incur conducted losses at the LS diode, influenced by the voltage drop across the LS diode (${\mathrm{V}}_{\mathrm{D}}$). It is noteworthy that the ON resistances of the MOSFETs utilized by the controllers are significantly lower because these MOSFETs are not integrated within the IC but are externally connected. This lower ON resistance is anticipated to reduce conduction losses in the MOSFETs, as outlined by the formulas in Table 2.

Another significant source of power losses in EUTs is switching losses. Key factors influencing switching losses include the switching frequency (${\mathrm{f}}_{\mathrm{S}\mathrm{W}}$), as well as the turn-on (${\mathrm{t}}_{\mathrm{S}\mathrm{W}-\mathrm{H}\mathrm{S}-\mathrm{O}\mathrm{N}}$) and turn-off (${\mathrm{t}}_{\mathrm{S}\mathrm{W}-\mathrm{H}\mathrm{S}-\mathrm{O}\mathrm{F}\mathrm{F}}$) times of the HS MOSFET, all of which were measured during experimental testing. Additionally, the supply current of the IC (${\mathrm{I}}_{\mathrm{I}\mathrm{C}}$), a parameter unique to each EUT, also impacts power losses.

Other parameters necessary for calculating power losses, as outlined in Table 2, were not measured directly nor provided by the manufacturers of the tested ICs; these were assumed based on typical values for such devices. For all EUTs, gate charges in MOSFETs (${\mathrm{Q}}_{\mathrm{G}\mathrm{S}-\mathrm{H}\mathrm{S}}$ and ${\mathrm{Q}}_{\mathrm{G}\mathrm{S}-\mathrm{L}\mathrm{S}}$) are estimated at 3.5 nC, and the Gate-Source voltage (${\mathrm{V}}_{\mathrm{G}\mathrm{S}}$) is assumed to be 5 V. In the case of synchronous converters, which experience dead-time losses, the dead time (${\mathrm{t}}_{\mathrm{D}\mathrm{T}}$) is assumed to be 100 ns. For asynchronous converters, the voltage drop across the LS MOSFET diode (${\mathrm{V}}_{\mathrm{D}-\mathrm{L}\mathrm{S}}$) is estimated to be 1 V.

After compiling all these parameters, a mathematical evaluation of EUT performance can be conducted by calculating the individual power losses that occur in each EUT, as detailed in Table 2.

7. Mathematical Estimation of Power Losses

By defining the parameters that influence power losses for all fourteen EUTs and establishing the corresponding loss equations, it is possible to mathematically evaluate the performance of each EUT. These equations facilitate predictions about which types of power losses will be predominant. They also help identify which EUT is likely to exhibit superior theoretical performance. Following this theoretical assessment, the calculated efficiencies can be compared with those obtained from experimental observations to confirm or refine the predictions.

The results of mathematical power loss estimations are categorized into four groups: asynchronous converters (Figure 3), asynchronous controllers (Figure 4), synchronous converters (Figure 5), and synchronous controllers (Figure 6). The figures illustrate average power losses of these estimations across a wide input voltage range at an output current of 1 A. A comprehensive breakdown of the mathematical estimations for power losses can be found in Appendix A.

The data indicate that the majority of power losses in asynchronous EUTs are due to power dissipation in the LS diode, switching losses in the HS MOSFET, and conducted losses in the inductor. For synchronous EUTs, the data suggest that the predominant power losses are associated with switching losses in the HS MOSFET, conducted losses in the LS MOSFET, and conducted losses in the inductor. Both types of EUTs also experience losses related to the supply current of the IC, which can be significant; however, these losses are specifically determined by the characteristics of the individual IC and do not consistently affect all EUTs.

Comparison between converters and controllers reveals noteworthy findings. As demonstrated in Table 4, controllers exhibit slower turn-on and turn-off times compared to converters. These prolonged transitions lead to substantial switching losses in controllers, particularly in the HS MOSFET. These losses become more pronounced with higher step-down ratios, such as at a 90 V input voltage. Consequently, despite the significantly lower ON resistance of the external MOSFETs used with controllers compared to the integrated MOSFETs in converters, the mathematically estimated efficiency of controllers does not appear superior.

8. Experimental Setup

Experimental evaluation can be divided into two parts—frequency measurements and efficiency evaluation. In order to compare experimental results with mathematical models and verify that EUT parameters match expected design parameters, frequency, turn-on time, and turn-off time evaluations are required. During this test, EUT is connected to the power supply and load current generator. Frequency, turn-on time, and turn-off time are measured on a switching node with an oscilloscope over a wide range of input voltages and output currents.

To evaluate efficiency, EUT is connected to the power supply and load current generator. The oscilloscope is not connected to EUT during this test to ensure that parasitic oscilloscope capacitance does not influence the measurement results. Input voltage and output currents are fixed. Input current and output voltage is measured. Calculated input power and output power provide results of EUT efficiency. At the same time, the temperature of the PCB is measured with a thermal camera that has an accuracy of ±2%. Experimental setup is shown in Figure 7. The equipment used for measurements are as follows:

9. Efficiency Measurement Results

A portion of the measurement results is presented in Table 4, which served as the basis for the mathematical evaluation of power losses. The primary measurement results focus on the experimentally determined efficiency of the EUTs. The objective of these measurements is to validate the accuracy of the mathematical estimations. The results are displayed as a series of heatmaps in Appendix B, providing a comprehensive visual representation of the data.

Comparative analyses between the experimental results and mathematical estimations are illustrated in Figure 8, Figure 9 and Figure 10. These figures encompass data from all 14 EUTs tested under controlled conditions. For consistency, the output current for all measurements was maintained at 1 A, while the input voltage varied across different figures: 12 V (Figure 8), 48 V (Figure 9), and 90 V (Figure 10). Where data are missing, EUT malfunctioned under the given conditions.

To illustrate the relationship between the calculated and measured efficiencies for all tested EUTs, Figure 11 presents data across a comprehensive range of input voltages (12 V, 24 V, 48 V, 72 V, 90 V) and output currents (0.1 A, 0.5 A, 1 A, 1.5 A, 2 A). Fourteen EUTs were evaluated in this study. The regression line is plotted on the scatter plot to visually demonstrate the relationship between measured and calculated efficiencies.

It is important to note that some EUTs were unable to operate under high step-down ratio conditions at higher output currents. As a result, not all EUTs provided a complete set of data across all conditions. Despite these limitations, the analysis conducted for this article collected a substantial dataset, comprising 326 experimentally gathered data points.

During each efficiency measurement, the temperature of the EUT was also recorded. Figure 12 provides a visual representation of the relationship between the temperature data points and the measured efficiency. This analysis is crucial as it offers insights into the thermal performance of the EUTs and their impact on overall efficiency.

The temperature data, when correlated with efficiency measurements, allows us to estimate how accurately we can predict the efficiency of EUTs operating across a wide range of input voltages solely based on temperature readings. This approach is particularly valuable in practical applications where direct efficiency measurements might be challenging or impractical.

After collecting all the data, a thorough statistical analysis was conducted to evaluate the predictive accuracy of the calculated efficiency compared to the real-world measured efficiency. These metrics were calculated according to established statistical definitions, as described in [29,30,31]. Additionally, the analysis assessed how accurately the temperature of the EUT could predict the measured efficiency. The evaluation was based on linear regression theory, using standard metrics such as the Pearson correlation coefficient, regression slope and intercept, coefficient of determination (R²), and root mean squared error (RMSE). The results of this analysis are summarized in

Table 5. Summary of statistical analysis of the experimental results.

Metric	Calculated Efficiency		Temperature
Dataset	Full	$\mathrm{Excluding} {\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}=0.1 \mathrm{A}$	Full	$\mathrm{Excluding} {\mathrm{I}}_{\mathrm{O}\mathrm{U}\mathrm{T}}=0.1 \mathrm{A}$
Pearson Correlation Coefficient	0.85	0.89	−0.22	−0.60
Intercept Estimate	−4.90	−1.50	80.36	90.86
Slope Estimate (×1)	1.00	0.98	−0.12	−0.26
${\mathrm{R}}^2$	0.73	0.79	0.05	0.36
Root Mean Squared Error (RMSE)	5.18	3.22	9.67	5.65
Number of Points	326	256	326	256

.

Examining Table 5 reveals valuable insights into the accuracy of predicting real-world efficiency without directly measuring the input current. For instance, the parameter analysis demonstrates how well the calculated efficiency can forecast the measured efficiency across the full dataset:

• Pearson Correlation Coefficient 0.85 indicates a strong positive linear relationship between calculated efficiency and measured efficiency.
• Intercept estimate −4.90 shows that if calculated efficiency was 0%, then measured efficiency would be −4.90%, which does not have a valid meaning under real-world conditions, but it indicates that there is significant offset of the regression line.
• Slope estimate 1 shows a very close alignment between calculated and measured efficiencies.
• R² value of 0.73 indicates that 73% of the variability in measured efficiency can be explained by the calculated efficiency. This suggests a strong linear relationship.
• The root mean square error (RMSE) is 5.18, which measures the average distance between the observed values and the values predicted by the model. A lower RMSE indicates a better fit.
• For these calculations 326 data points were used.

At low output currents, supply current of the IC has higher significance to the efficiency; therefore, it is difficult for a mathematical model to predict efficiency. Using this assumption, statistical analysis was performed for the dataset excluding the 0.1 A output current. The results show improved accuracy of the model (Pearson Correlation Coefficient 0.89, ${\mathrm{R}}^2$ 0.79, RMSE 3.22).

Analysis of the relationship between temperature and measured efficiency shows a weak inverse relationship when the full dataset is used (Pearson Correlation Coefficient −0.22); only 5% of results can be predicted by the temperature measurements (${\mathrm{R}}^2$ 0.05) and model predictions are not close to the actual measurements (RMSE 9.67).

However, if the reduced dataset is used (without 0.1 A output current data), the model is more accurate. The relationship between temperature and measured efficiency is moderate to strong (Pearson Correlation Coefficient −0.60), whereby 36% of the variability in measured efficiency can be explained by temperature (${\mathrm{R}}^2$ 0.36). This suggests a moderate level of explanatory power of the model. A RMSE of 5.65 indicates that the model predictions are closer to the actual measurements.

The experimental evaluation was conducted across a range of output currents, making comparisons based solely on efficiency percentages potentially misleading. For example, the EUT might exhibit low efficiency at low output currents without necessarily experiencing high temperatures. Therefore, analyzing the results in terms of power losses in milliwatts offers a more accurate reflection of performance. The findings from this analysis are detailed in

Table 6. Analysis of the experimental results in terms of power losses.

Correlation	Calculated Power Losses (mW) and Measured Power Losses (mW)	Temperature and Measured Power Losses (mW)
Pearson Correlation Coefficient	0.97	0.93
Intercept Estimate	196.09	−1668.30
Slope Estimate (×1)	1.00	56.19
${\mathrm{R}}^2$	0.94	0.87
Root Mean Squared Error (RMSE)	256.23	383.70
Number of Points	326	326

.

Figure 13 illustrates the relationship between calculated and measured power losses in milliwatts. The results are presented in mW rather than being converted into efficiency percentages, enabling clearer differentiation based on output current levels. Notably, at higher output currents, the EUT tends to experience increased power losses. This model achieves an accuracy of 94% with a RMSE of 256.2 mW.

Figure 14 displays the correlation between measured temperature and measured power losses in milliwatts for the EUTs. Although this model is slightly less accurate, it still demonstrates a strong correlation with an accuracy of 87% and a RMSE of 387.7 mW. The results, as shown in Table 6, suggest that it is feasible to predict power losses with high accuracy based on the EUT’s parameters or by measuring its temperature. Furthermore, if the output current is known, the results of power losses can be effectively converted into an efficiency percentage.

10. Discussion

This article presented a comparison of power losses in the LS switch of synchronous and asynchronous buck converters. The mathematical analysis suggested that simpler asynchronous converters could outperform more complex synchronous converters in some cases. This hypothesis was tested experimentally, revealing that for high step-down ratio applications, asynchronous converters are not inferior to synchronous converters in terms of efficiency. At lower step-down ratios (input voltage 12–24 V), synchronous converters exhibited better efficiency. However, at higher step-down ratios (input voltage 48–90 V), the performance of asynchronous converters became comparable to that of synchronous converters.

Overall, the results showed that all EUTs exhibited poor efficiency at a very low current (0.1 A). Most tested converters achieved peak efficiency at output currents of 0.5–1 A. For tested controllers, efficiency remained quite stable in the range of 1–2 A, suggesting that their peak efficiency might be achieved at higher output currents not required by this application. In terms of input voltage, all EUTs provided the best efficiencies at 12 V, with efficiency dropping as input voltage increased up to 90 V.

Performing all experimental measurements yielded a comprehensive dataset containing 326 data points, enabling the evaluation of the accuracy of mathematical models in predicting real-world efficiency.

By comparing the experimental results to the theoretical efficiencies calculated using the formulas provided in Table 2, the accuracy of the proposed mathematical model was evaluated. For wide input voltage range step-down converters and controllers, the provided mathematical model can explain 79% of the measured efficiencies at input voltages ranging from 12 V to 90 V and output currents from 0.5 A to 2 A. The Pearson correlation coefficient of this model indicates a strong positive correlation, demonstrating that the model reliably predicts efficiency. The RMSE of this model is 3.22, indicating an average difference between the calculated and measured efficiencies. This model, with the described accuracy, only requires the measurement of switching frequency, turn-on and turn-off times, and data presented in the datasheets of the EUT. This approach allows for a reasonably accurate estimation of EUT efficiency whenever measuring input current is not viable.

Additionally, another model from the same dataset was proposed to predict the real-world efficiency of wide input voltage converters or controllers by measuring the temperature of the EUT. Although this model is not as accurate as the previously described one, it is still useful when only the temperature of the EUT can be measured. The temperature-based model can explain 36% of the real-world efficiency, with an RMSE value of 5.65, meaning the average estimation of efficiency deviates by 5.65%. This model is suitable for EUTs operating at input voltages from 12 V to 90 V and output currents from 0.5 A to 2 A.

In experimental evaluation, analyzing power losses in milliwatts rather than efficiency percentages has proven crucial for accurate performance assessment across varying output currents. This approach addresses potential discrepancies where EUTs might show low efficiency at low currents without high temperatures, thus providing a more precise reflection of actual conditions. As shown in Table 6, there is a robust correlation between calculated and measured power losses (Pearson Correlation Coefficient of 0.97) and a slightly lower yet significant correlation with temperature (0.93). These correlations are substantiated by high accuracy rates, with the model showing 94% accuracy (R² 0.94, RMSE 256.23 mW) for power losses and 87% for temperature impacts (R² 0.87, RMSE 383.70 mW). Figure 13 and Figure 14 further validate the reliability of milliwatt-based measurements, illustrating clear relationships and affirming the method’s effectiveness in predicting power losses based on EUT parameters or temperature, which can be translated into efficiency percentages when the output current is known.

During thermal analysis, all measurements were conducted under consistent conditions, and none of the evaluated converters employed dedicated thermal management measures such as heat sinks, thermal pads, or enhanced copper areas. This approach ensured uniformity across all test cases and allowed for direct comparison of intrinsic thermal behavior. It is acknowledged that thermal performance can be significantly improved through the use of heat sinks, thermal conductors, or optimized PCB layout. However, such enhancements are specific to the final system design and would introduce additional variables unrelated to the converter itself. Therefore, no external thermal management was applied in order to preserve the objectivity and comparability of the evaluation.

Future research building upon this article will focus on the design and manufacturing of a wide input voltage range step-down converter-integrated circuit. Based on the findings presented, the initial design is planned to feature an asynchronous converter with integrated MOSFETs. The target design parameters for this converter are as follows:

• Turn-on (${\mathrm{t}}_{\mathrm{S}\mathrm{W}-\mathrm{H}\mathrm{S}-\mathrm{O}\mathrm{N}}$) and turn-off (${\mathrm{t}}_{\mathrm{S}\mathrm{W}-\mathrm{H}\mathrm{S}-\mathrm{O}\mathrm{F}\mathrm{F}}$) times of less than 3 ns at 12 V input voltage, less than 5 ns at 48 V, and less than 8 ns at 90 V.
• ON resistance of HS MOSFET less than 250 mΩ.
• Supply current less than 200 µA.
• Switching frequency (${\mathrm{f}}_{\mathrm{S}\mathrm{W}}$) of 150 kHz with a 47µH inductor (${\mathrm{R}}_{\mathrm{D}\mathrm{C}-\mathrm{L}}$ = 145 mΩ).

With these parameters, the designed converter is estimated to achieve efficiencies of 87% at 12 V, 85% at 48 V, and 82% at 90 V (at a 1 A output current). A converter meeting these specifications would outperform all tested EUTs at 90 V and 48 V and provide competitive performance at 12 V.

It is worth noting that this research presents a focused evaluation and, as such, is limited in scope. Only static load conditions were tested and analyzed. This decision was made intentionally to ensure a standardized and repeatable test environment, enabling a fair comparison across all evaluated converters. Dynamic load behavior can vary significantly depending on the specific end-use application—such as 2G versus 5G modems or GNSS modules—making it difficult to define a representative dynamic profile applicable to all scenarios. By using static loads, the analysis emphasizes core performance characteristics like efficiency, switching behavior, and thermal response under universally comparable conditions.

In addition, this article does not cover the electromagnetic interference (EMI) and electromagnetic compatibility (EMC) performance of the tested converters. These parameters are highly dependent on the final system implementation, including PCB layout, enclosure design, and external filtering. In real-world applications, EMI/EMC performance is often improved through additional components such as input filters, ferrite beads, shielding, and proper grounding—all of which are added at the system level and are not intrinsic to the bare DC-DC converter itself. As such, EMI/EMC was excluded from this study to maintain focus on core converter behavior under nominal electrical conditions. A fair evaluation of EMI/EMC performance would require a different test methodology and setup, which is outside the scope of this article.

Robustness and fault tolerance are also important considerations in practical designs, particularly for automotive and industrial environments. However, evaluating robustness requires defined test scenarios that extend beyond nominal operations—such as overvoltage, short-circuit, or thermal overstress conditions—which introduce additional complexity and variability. These aspects are more aligned with system-level validation. Since the purpose of this work is to analyze DC-DC converter performance under nominal conditions, robustness testing is considered a separate topic and was not included in the current evaluation.

11. Conclusions

This study experimentally examined the performance of 14 different step-down DC-DC converters across a wide input voltage range (12 V to 90 V) and output currents from 0.1 A to 2 A. At lower voltages (12 V to 24 V), synchronous converters consistently provided better efficiency, with up to 5% more efficient at a 1 A output. This is largely due to the two MOSFET designs, which minimize conduction losses and perform more efficiently at these voltages, avoiding the diode-related losses that affect asynchronous designs. However, as the input voltage increases (48 V to 90 V), the simpler asynchronous converters begin to match their synchronous counterparts. With higher voltages, the influence of diode losses decreases, and the lower switching losses in asynchronous converters give them a competitive edge.

The efficiency predictions from the mathematical model closely aligned with experimental results. Initially, the model accounted for 73% of the efficiency variance, but when low-output current data (0.1 A) was excluded, this increased to 79%, showing a strong predictive ability. A moderate inverse correlation between temperature and efficiency was also observed, with temperature explaining 36% of the efficiency variation at output currents above 0.5 A. Examining power losses in milliwatts provided a more detailed view of converter performance. The model achieved 94% accuracy in predicting power losses, with only a small margin of error (RMSE 256.2 mW). Temperature-based predictions, while slightly less accurate, still performed well with an 87% accuracy rate. These results confirmed that analyzing power losses in milliwatts offers a more reliable way to assess performance.

Based on the analysis, future integrated circuits for low-power wide input voltage range DC-DC converters should focus on asynchronous converter topologies with integrated HS MOSFETs, which provide better performance in high-voltage scenarios. With established target design parameters, an estimated efficiency of 87% at 12 V, 85% at 48 V, and 82% at 90 V for converters operating at 1 A is expected, highlighting their potential for efficient operation in automotive systems. Since the mathematical model has been validated with a high degree of accuracy, these estimates can be confidently used to predict efficiency, reducing reliance on experimental data and providing a reliable foundation for optimizing future converter designs. A future step will involve designing and developing a converter IC that incorporates these target parameters, allowing for further validation of the mathematical model in practical applications.