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Article

Optimization of Snubber Circuit Parameters for AC–AC Chopper Converter

College of Modern Science and Technology, China Jiliang University, Hangzhou 310027, China
*
Author to whom correspondence should be addressed.
Electronics 2025, 14(9), 1733; https://doi.org/10.3390/electronics14091733
Submission received: 16 March 2025 / Revised: 13 April 2025 / Accepted: 21 April 2025 / Published: 24 April 2025

Abstract

:
The AC-AC chopper converter, as a direct power conversion device without DC intermediate stages, has garnered significant attention due to its advantages of high efficiency and fast dynamic response. However, the voltage spikes induced by switching device turn-off transients (reaching 143% of the reference voltage) severely threaten system reliability, while traditional RC snubber circuit parameter design methods (e.g., empirical formula-based approaches) exhibit limited suppression effectiveness. To address this issue, this paper proposes an optimized parameter design method for RC snubber circuits in AC-AC chopper converters by establishing a turn-off transient energy transfer model to optimize snubber resistor and capacitor parameters. Experimental results from the prototype based on the TMS320F28335 digital controller demonstrate that the optimized method suppresses voltage spikes to <10% and, even under a 40% step load variation from the nominal value, maintains output voltage fluctuations stably below 5%.

1. Introduction

In the field of power electronics, AC–AC converters play a pivotal role in altering electrical energy conversion. Based on output frequency characteristics, their topologies can be categorized into two major classes: the first is frequency-converting converters, and the second is choppers that maintain input–output frequency consistency [1,2,3]. As a representative topology for same-frequency conversion, AC chopper converters eliminate the mandatory DC link energy storage stage inherent in traditional two-stage AC–DC–AC conversion structures. Instead, they achieve direct AC-domain energy conversion through high-frequency pulse width modulation (PWM) strategies [4]. This architecture offers several technical advantages: the omission of intermediate energy storage improves system efficiency by approximately 3–5% (typical value) [5], and it enables millisecond-level dynamic response characteristics [6]. Consequently, AC–AC chopper converters are widely applied in industrial drives, variable-frequency speed regulation, lighting control, and renewable energy grid integration. Among these, AC–AC chopper converters can further be classified into single-phase and three-phase systems, with the focus of this study being single-phase systems.
In the domain of AC–AC power conversion, typical voltage regulation technologies primarily encompass two major topological configurations: thyristor-based phase-controlled voltage regulation employing semi-controlled devices, and AC chopper voltage regulation utilizing fully-controlled power semiconductor devices. The first category relies on phase-controlled thyristor circuits, which achieve voltage regulation through a phase-shift triggering mechanism inherent to semi-controlled devices. The second category adopts AC chopper topologies incorporating fully-controlled devices such as IGBTs/MOSFETs. Thyristor-based voltage control modulates the fundamental voltage component via gate-triggering angle phase delay, offering advantages in simplicity, cost-effectiveness, and operational reliability [7,8,9]. However, this method exhibits significant drawbacks including pronounced harmonic distortion (with total harmonic distortion typically ranging 25–40%) and degraded power factor (commonly 0.6–0.8), both critically impairing power quality and system efficiency [10,11,12]. Furthermore, its relatively sluggish dynamic response (typically 100–200 ms) substantially limits applicability in modern industrial and power systems demanding high-performance and energy-efficient operation [13].
In contrast, AC–AC chopper converters regulate the effective value of the output voltage by adjusting the duty cycle of high-frequency switching devices (such as IGBTs or MOSFETs) within a switching period. This technology enables low harmonic distortion, high power factor, and fast dynamic response, making it more suitable for applications where stringent requirements for power quality, power factor, and voltage regulation precision are critical [14,15,16].
Conversely, AC–-AC chopper converters have been observed to generate voltage or current spikes during operation. This phenomenon can result in a series of adverse effects, including severe electromagnetic interference (EMI), overvoltage stress on devices, increased circuit power losses, poor contact reliability, and signal disturbances [17].
In order to address this issue, previous studies have proposed various methods to mitigate voltage spikes. These methods include optimizing PCB layout and incorporating snubber circuits. While optimizing PCB layout can reduce parasitic inductance to a certain extent, thereby decreasing the voltage spikes generated during the switching operation, its protective effect remains relatively limited [18].
When considering factors such as usability, simplicity, and cost-effectiveness, the integration of RC snubber circuits has emerged as a more viable solution. In [19], an innovative approach combining dual-port network analysis with exhaustive algorithms was proposed to enhance the accuracy of RC snubber circuit design. However, this method is highly dependent on parasitic parameters, involves significant computational complexity, and focuses primarily on suppressing oscillations rather than reducing voltage spikes.
In recent years, scholars have conducted numerous studies on voltage spikes and oscillation suppression in the switching process of power devices. In the context of RC snubber circuit optimization, reference [20] has been instrumental in suppressing the switching oscillations of SiC power modules through parameter optimization. However, its capacitive design has been found to exhibit limitations in terms of overvoltage suppression and lacks experimental verification. The third-order circuit model proposed in reference [21] introduces a parameter design method; however, it does not consider the impact of package and PCB parasitic inductance. The time-domain model developed in reference [22] improves the switching characteristics of SiC MOSFETs; however, the methodology is only applicable to half-bridge topology, and the parameter optimization is not sufficiently correlated with the physical parameters.
In the domain of control strategy innovation, the bi-directional LLC resonant converter control strategy proposed in reference [23] enhances system stability. However, this strategy suffers from incomplete implementation of soft-switching and the complexity of the strategy. Conversely, reference [24] reduces the current rate of change through gate signal modulation, which mitigates voltage spikes but increases the complexity of drive signal processing significantly. It is noteworthy that the novel topology and modulation strategy proposed in the AC–AC chopper converter in reference [25] does not directly target voltage spikes but rather enhances the system stability by improving the commutation process. In contrast, reference [26] systematically demonstrates the suppression effect of RC snubber circuits in DC–DC buck circuits on the parasitic parameters and voltage spikes and experimentally verifies its effectiveness. While these studies have made technical breakthroughs, there are generally too many model idealization assumptions, insufficient experimental validation, limited topology applicability, and high common problems such as high control complexity, which point the direction of improvement for subsequent studies.
Similar studies on DC snubber circuits are also found in references [27,28,29]. However, such research is primarily focused on DC converter applications, with limited consideration of high-frequency characteristics, signal waveforms, phase variations, and bidirectional current handling in AC circuits. Therefore, their applicability to AC circuits remains constrained.
Given the widespread voltage spike issues in AC–AC chopper converters during operation, while considering the limitations of existing research in addressing the effects of parasitic inductance and capacitance on snubber circuit design and the lack of sufficient experimental validation, this study focuses on the optimized parameter design of the converter’s RC snubber circuit. Through in-depth analysis of the AC–AC chopper converter’s topological structure, operational principles, and voltage spike formation mechanisms, this study proposes an RC snubber circuit parameter optimization method based on theoretical analysis. Experimental verification validated the effectiveness of this method in suppressing voltage spikes.
In light of the pervasive issue of voltage spikes in AC–AC chopper converters during operation and given the limitations of extant research in addressing the impact of parasitic inductance and capacitance in snubber circuit design, as well as the paucity of sufficient experimental validation, the present study focuses on the optimization design of converters. By conducting a thorough analysis of the operating principles, topology, and voltage spike formation mechanisms of AC–AC chopper converters, this study proposes an enhanced calculation formula for snubber circuit parameters. This study further optimizes the parameter selection method by incorporating the parasitic characteristics of power switching devices. Additionally, a small-signal model of the converter is established, allowing for stability and dynamic performance analysis in the frequency domain, and a differentiated control strategy tailored to various load scenarios is developed. Empirical validation substantiates the efficacy of the optimized snubber circuit design in suppressing voltage spikes, enhancing system efficiency, and bolstering stability. This design offers a viable solution for the design and optimization of related power electronic devices.
The main innovations of this study are as follows:
(1)
A novel snubber circuit parameter optimization method is proposed. Unlike conventional empirical formula approaches, it considers the comprehensive effects of stray inductance, switching device parasitic capacitance, and load characteristics. Through theoretical analysis and experimental verification, this method enhances voltage spike suppression capability.
(2)
The experimental section includes tests with various parameter combinations, systematically analyzing the specific impacts of snubber resistors and capacitors on voltage spikes and waveform distortion. This not only validates theoretical formulas but also summarizes the key design mechanisms for snubber circuits.

2. Topology of the AC–AC Chopper Converter

To reduce voltage spikes during switching, minimize system harmonics, and reduce electromagnetic interference, the AC chopper voltage regulation system typically incorporates a freewheeling circuit and a filtering circuit. The freewheeling circuit provides a current path when the switching device is turned off, preventing excessive reverse voltage from being generated due to the instantaneous interruption of current, thus reducing voltage spikes. The filtering circuit smooths the voltage waveform, removes high-frequency harmonics, and suppresses electromagnetic interference generated by switching operations, ensuring a more stable and low-noise output voltage.
Furthermore, the configuration of the freewheeling and filtering circuits contributes to the stabilization of the output voltage under variable load conditions. The enhanced reliability and immunity of these circuits is achieved through the precise design and optimization of the switching devices’ control timing. The snubber circuit employs a RC snubber circuit configuration, which exhibits low power consumption and contributes to enhancing the stability and reliability of the system.
The topology of the designed AC–AC chopper converter is shown in Figure 1.
In the diagram, S 1 and S 2 , along with S F 1 and S F 2 , represent back-to-back IGBTs with anti-parallel diodes. S 1 and S 2 are the chopper switches, while S F 1 and S F 2 serve as the freewheeling switches. The RC snubber circuit is formed by R s and C s . L m represents the equivalent inductance resulting from the combined stray inductance in the circuit and the inductive load. The output of the device is a resistive load R, and the input is an AC voltage source U s . L 1 and C 1 form an LC filter.

3. Generation and Suppression of the Voltage Spike

3.1. Generation of the Voltage Spike in the AC–AC Chopper Converter

The reason for the voltage spike in the operation of AC–AC chopper converters is mainly due to the presence of stray inductors in the circuit. At the moment of switching device turn-on or turn-off, the current flowing through inductive components cannot change instantaneously, resulting in a substantial induced electromotive force from stray inductance, which consequently generates the voltage spike. This phenomenon is particularly pronounced at high chopper frequencies, when the load consists of low-resistance components, such as motors, and during the turn-off of power switching devices. The waveform of the collector current I c and the voltage U c e between the collector and emitter is shown in Figure 2 when the IGBT is turning off.
When the IGBT quickly turns off, the collector current I c quickly drops to 0, ignoring the leakage current. At this time, due to the presence of stray inductance in the main circuit, the current cannot suddenly change, resulting in a large impulse voltage L d I d t . The large impulse voltage is combined with the power supply voltage to form the voltage spike U t o p .
Excessive voltage spikes can cause breakdown and damage to power devices such as MOSFETs, IGBTs, and thyristors, as these components have defined breakdown voltage and current limits. The spikes can also stress inductive loads like motors, leading to winding damage and insulation failure, which affects equipment reliability and operation. Furthermore, voltage spikes introduce harmonic distortion into the power system, reducing the power factor, causing system instability, and decreasing energy efficiency.

3.2. Analysis of the Working Condition of the AC-A–C Chopper Converter with Snubber Circuits

Given the relative complexity of the IGBT structure, it can be simplified in operational analysis: when turned on, the IGBT is approximated by a low-resistance equivalent ( R o n = 10 3   Ω ), and when turned off, it is represented by a high-resistance equivalent ( R o f f = 10 5   Ω ), with the freewheeling diode effect neglected ( t f is defined as the turn-off time of the IGBT).
Since the voltage spike occurs over an extremely short duration, the circuit can be analyzed as a transient process. In this case, the input power supply is assumed to have a peak voltage of E d , with IGBT S 1 operating as a chopper and IGBT S 2 remaining continuously on. For simplification, the effect of the freewheeling circuit is neglected. Additionally, the parasitic capacitance C E C between the emitter and collector terminals of the IGBT is introduced into the model to more accurately reflect the dynamic characteristics of the IGBT.
The topology of the AC–AC chopper converter in Figure 1 is simplified, as shown in Figure 3.
For convenience in calculations, the parallel impedance of C e c , the IGBT, and the snubber circuit is represented by R t .
R t = 1 s * C EC + 1 R IGBT + 1 R S + 1 s * C S
Here, C E C is the capacitance of the parasitic capacitor between the emitter and collector of the IGBT, C S is the capacitance of the snubber capacitor, and R I G B T and R S represent the impedances of the IGBT and the snubber resistor.
The following Formulas (2)–(4) can be obtained by combining the topology of Figure 3:
U IGBT = ( E d s + L m * I L 0 ) * R t s * L m + R + R t
I S = s * C S * U CS C S * U CS 0
I L = E d s + L m * I L 0 s * L m + R + R t U CS = U IGBT + R S * C S * U CS 0 s * R S * C S + 1
Here, I L represents the current through inductor L m , and U c s denotes the voltage across the snubber capacitor. I L 0 and U c s 0 are the initial current of inductor L m and the initial voltage of snubber capacitor C s at the moment when the circuit switches states (on/off). I s  is the snubber circuit current.
When the IGBT is turned off, the current and voltage waveforms for each part are shown in Figure 4 and Figure 5, respectively.
At the moment when IGBT S 1 turns off, the current through the inductor L m cannot change abruptly. Therefore, the inductor L m initially maintains the current flowing through the main circuit. At this point, the inductor L m generates an induced electromotive force U L as shown in Formula (5).
U L = L m d I L d t
The current in the circuit flows out from the positive terminal of the power supply E d , passes through the stray inductance L m , and then splits into three parts. The resulting expression can be obtained as follows (6):
I L = I IGBT + I EC + I S
1.
Current I S flows through the snubber circuit.
A portion of the current enters the snubber circuit, flowing through the snubber resistor R s and the snubber capacitor C s . At this moment, the snubber current I S rapidly rises until it equals the inductor current I L of L m , while the voltage that drops across the snubber resistor R s increases sharply. The snubber capacitor C s begins to absorb the energy released by the induced electromotive force U L generated by the inductor L m and the supply voltage E d . As a result, the voltage across the snubber capacitor U C s continuously rises until it stabilizes at E d .
2.
Current I C E C flows through IGBT S 1 parasitic capacitor C E C .
The second part of the current flows into the parasitic capacitance C e c of IGBT S 1 . At the instant when S 1 turns off, due to the rapid change in U I G B T , the current I C E C through the parasitic capacitance C e c rises sharply, with its magnitude determined by the capacitor current Formulas (7). Subsequently, I C E C rapidly decays to zero.
I C EC = C EC d V d t
3.
The current flows through IGBT S 1   I I G B T .
The third part of the current flows directly through IGBT S 1 . When S 1 turns off, its equivalent resistance R o f f becomes extremely large, causing the current I I G B T through S 1 to drop to nearly zero almost instantaneously. However, due to the continuity of the inductor current in L m , the induced electromotive force U L causes the voltage U I G B T to rise rapidly.
Initially, the voltage across S 1 rises to the input supply voltage E d , but due to the presence of the induced electromotive force, the voltage further increases, forming a spike voltage U t o p .
U top = E d + L m d I L 0 d t
Subsequently, the three current components merge again in the circuit and flow through the load resistance R. Ultimately, as the inductor current I L gradually decreases, the induced electromotive force U L attenuates, the voltage across the snubber capacitor U C s stabilizes at E d , and the IGBT voltage U I G B T also drops back to E d . The circuit transitions into a steady state, with the inductor energy fully released, marking the end of the transient process.

3.3. Calculation of Snubber Circuit Parameters

After the IGBT turns off, the snubber circuit current I s rises rapidly and gradually match the waveform of the main circuit current I L . At this moment, since the initial voltage of the snubber capacitor C s is zero, the charging current of the capacitor at the beginning of the snubbing process primarily depends on the circuit’s dynamic characteristics.
When the IGBT transitions from the on state to the off state, because the snubber circuit needs to gradually take over the main circuit current I L , the current I s of the snubber circuit will rise rapidly in a short time but is still smaller than the main circuit steady state current I o n at the time of conduction, obtaining (9) and (10). This is mainly due to the parasitic parameters in the snubber circuit (e.g., snubber resistance and inductance) that limit the instantaneous rate of change of current.
I on E d R
I S = U IGBT U CS R S < I on
Substituting Formula (9) into Formula (10) yields Formula (11).
I S = U IGBT R S < E d R
From this, the first constraint condition for R s can be derived:
R S R
It is imperative to note that the snubber resistor R s resistance must not exceed the load resistance R. This is primarily to ensure optimal impedance matching between the snubber circuit and the load. Conversely, when the snubber resistor R s resistance value exceeds the load resistance value R, the impedance of the snubber circuit is excessively high, which will result in delayed energy return. Consequently, the transfer of energy between the snubber circuit and the load is impeded, impeding the circuit’s capacity to distribute and regulate energy in a timely and efficient manner.
When designing the snubber circuit, the selection of the snubber capacitor C s is crucial. The primary function of the snubber capacitor is to absorb the transient energy caused by the back electromotive force generated by the inductor L m when the IGBT turns off. This reduces the peak voltage magnitude and protects the switching device.
The energy stored in the inductor at the moment of turn-off is given by
E L = 1 2 L m I on 2
The energy that the snubber capacitor needs to absorb can be expressed as
E C S = 1 2 C S U top 2
Since the main role of the snubber capacitor is to absorb the induced electromotive force caused by the stray inductance, its absorption capacity must exceed the energy of the induced electromotive force:
1 2 C S U top 2 1 2 L m I on 2
To ensure the snubber capacitor fully absorbs and releases the energy during each turn-off of the IGBT and to minimize the peak voltage, we assume
U top = E d
Substituting into Formula (15), we obtain
1 2 C S E d 2 1 2 L m ( E d R ) 2
So
C S L m R 2
The design of the snubber capacitor C s must achieve a balance between absorbing voltage spikes, protecting switching devices, and maintaining the circuit’s dynamic performance. Its actual value should be slightly greater than the theoretical minimum to ensure sufficient absorption of the energy released by the inductor L m and to smooth the voltage waveform.
If C s is too large, it will result in increased energy losses, reduced system efficiency, and slower response of the snubber circuit to transient voltage spikes, making it unable to suppress high-frequency oscillations or overvoltage effectively. Therefore, selecting C s appropriately can effectively balance spike voltage suppression, dynamic performance, and energy loss, improving the circuit’s stability and efficiency.
In the AC–AC chopper converter, where the chopper frequency is relatively high, the minimum adjustable voltage is typically set to 10% of the input voltage. Under these conditions, the high-level duty cycle of the IGBT is only 10% of the entire chopping period. Therefore, the snubber circuit must respond quickly to absorb the energy released by the inductor L m .
The response speed of the RC snubber circuit is determined by its time constant τ. It is generally necessary to design the time constant of the snubber circuit to be sufficiently small to ensure a rapid response to changes in high-frequency chopper signals. According to the characteristics of RC circuits, a signal reaches approximately 95% of its final value after about three times constants.
To ensure that the snubber circuit can quickly reach a steady state during the high-level duration of the duty cycle signal, the time constant τ must satisfy the following condition:
τ = R S C S < 1 3 f * 10 %
Here, f is the frequency of the chopper signal.
The second constraint condition for R s can be obtained as follows:
R S < 1 30 f * C S
This can be seen in conjunction with (12) and (20):
R S < min 1 30 f * C S , R
If the snubber resistor R S is too small, it will cause the transient current I S to increase significantly, particularly at the moment when the IGBT turns off. This leads to higher power losses in the snubber circuit, reducing system efficiency. Additionally, the snubber resistor will experience a high thermal load, potentially resulting in overheating, damage, and reduced system reliability. Moreover, the large transient current can cause electromagnetic interference (EMI), increasing high-frequency noise, which may disrupt the operation of other circuits and degrade signal quality. Therefore, the design of R S must strike a balance between limiting voltage spikes and controlling power losses. Its actual value should be slightly less than the theoretical value derived from Formula (21).
In theoretical analysis and simulations, the turn-off time of the IGBT is often neglected, leading to the assumption that the voltage spike occurs instantaneously. However, in practical applications, a specific condition may arise where the RC snubber circuit can completely release its energy within the IGBT turn-off time t f .
3 τ = 3 R S C S t f
In the case of satisfying the Formula (12), the value of the snubber capacitor C S can be smaller than the theoretical calculated value while still effectively suppressing the voltage spike. The core of this strategy lies in using a small capacitance and a fast response design, allowing the snubber circuit to absorb and release energy during the brief turn-off time of the IGBT, achieving a smoothing effect on the voltage spike. This method is suitable for applications with high-frequency chopping or demanding dynamic performance, offering certain advantages.
However, it should be noted that the small capacitance design may have limitations under certain complex conditions (such as load fluctuations or strong parasitic effects). Therefore, in practical applications, simulation and experimental verification are still necessary to ensure that the snubber circuit meets dynamic performance requirements while maintaining good reliability and efficiency.
In summary, when the time constant τ t f 3 and the snubber resistance R s R , the value of the snubber capacitor C s can be slightly larger than the theoretical calculated value C s L m R 2 , or it can be appropriately reduced to a value much lower than this, as long as the snubber circuit meets the dynamic response speed requirements and effectively suppresses the voltage spike.
When τ t f 3 , then
C S L m R 2 R S < min 1 30 f C S , R

4. Design of Control Scheme for the AC–AC Chopper Converter

In the AC–AC chopper converter, different load types (such as purely resistive, inductive-resistive, and capacitive-resistive loads) impose varying requirements on control strategies and timing design. Its control timing diagram is shown in Figure 6.
In complementary control mode, switches in different branches must alternate conduction while maintaining an interlock state. However, due to the inherent delay in the turn-on and turn-off times of switching devices, there is a risk of simultaneous conduction (common-state conduction), which can compromise system safety. Proper dead-time configuration is critical in complementary control. However, an overly long dead time reduces voltage regulation efficiency, while an overly short dead time cannot effectively prevent short-circuit risks.
When S g 1 = 0, S 1 turns off, causing the load current to drop to zero, which also reduces the output voltage to zero. A similar principle can be applied to derive the output voltage waveform during the negative half-cycle. In the negative half-cycle, S F 1 remains off, while S 1 and S F 2 remain continuously on. Switch S 2 acts as the chopping switch and operates according to the duty cycle signal, with its operation logic being symmetric to that of the positive half-cycle.

5. Experimental Results and Analysis

To test the optimized solution for the snubber circuit parameters, we constructed the circuit according to the topology in Figure 3. The experimental prototype, shown in Figure 7, includes the following components: an IGBT drive circuit, an IGBT power supply, an RC snubber circuit, a load resistor, a rectifier diode, and an inductance.
Experiments were conducted using the following parameters: L = 400 μH, R = 20 Ω, input AC power with an effective value of 50 V, a fixed chopper duty cycle of 50%, and a switching frequency of 20 kHz. The IGBT model used is GT60M303, with a drop time of t f = 0.25   μ s .
In reference [30], the empirical formula for the RC snubber circuit in AC–AC chopper converters is given as follows:
C S = I C t f + t r V CE R S = t on 3 C S
Substituting the circuit component parameters into Equation (24) for calculation gives the following parameter values for the RC snubber circuit:
C S = 40   nF R S = 166   Ω
The circuit component parameters are substituted into Equation (19) to derive the parameters of the AC–AC chopper converter RC snubber circuit according to the parameter optimization method of the AC–AC chopper converter proposed in this paper:
C S = 1   nF R S = 20   Ω
The experimental waveform diagram is shown in Figure 8, Figure 9, Figure 10, Figure 11, Figure 12, Figure 13, Figure 14, Figure 15 and Figure 16.
In the initial experiment without a snubber circuit, significant voltage spikes were observed, with their waveform characteristics depicted in Figure 8. At this point the amplitude of the voltage spike U t o p reaches 243% of the reference voltage. Subsequently, experiments were conducted using parameters derived from the empirical formula for RC snubber circuits (Equation (25)), and the corresponding results are shown in Figure 9. The experimental waveforms indicate that, compared to the case without a snubber circuit, the spike amplitude decreased to 168% of the reference voltage. However, U t o p remained at a relatively high level, demonstrating that the conventional empirical formula-based parameter selection method for RC snubber circuits fails to effectively suppress voltage spikes.
When applying the RC parameter optimization method proposed in this paper to design the snubber circuit for the AC–AC chopper converter, the experimental results shown in Figure 10 reveal that, compared to Figure 8 and Figure 9, the waveform stabilized and the peak voltage U t o p was reduced to approximately the reference voltage level. This validates the effectiveness of Equation (23) in suppressing turn-off transient voltage spikes and demonstrates that the design achieves energy dissipation through proper matching of snubber resistor and capacitor parameters.
In order to study the influence of the snubber resistor value on the snubber circuit spike suppression, the snubber capacitance C s = 1 nF is kept unchanged in the experiment, and the snubber resistor R s is gradually increased to 200 Ω for the comparative test, and the corresponding results are shown in Figure 11.
The data show that when the value of R s is larger, the spike amplitude increases to 178% of the reference voltage, and the suppression effect of the snubber circuit is obviously weakened. This phenomenon is fully consistent with the theoretical prediction of Equation (12): when the snubber resistor R s exceeds the load resistor R, the impedance of the snubber circuit is too high, resulting in a delayed energy return. During circuit operation, the energy transfer between the snubber circuit and the load will be hindered, thus preventing the circuit from distributing and regulating the energy in a timely and efficient manner.
When maintaining C s = 1 nF constant and reducing R s to 5 Ω, the experimental waveform is shown in Figure 12. It can be observed from the figure that under this parameter selection, the peak voltage U t o p exhibits minimal variation, slightly exceeding the reference voltage. This is because reducing the resistance simultaneously decreases the time constant τ and shortens the discharge time. However, since the original τ was already sufficiently small and the discharge speed was adequately fast, further lowering the snubber resistor value does not enhance its performance. Conversely, this leads to severe issues, including power surges and overheating, capacitor breakdown due to excessive current, and high-frequency oscillations.
Subsequent investigations examined the impact of snubber capacitor selection on voltage spike suppression. When maintaining R s = 20 Ω constant and increasing C s   to 22 nF, the experimental waveform shown in Figure 13 reveals that the peak voltage U t o p is reduced to 128% of the baseline voltage. Simultaneously, the waveform exhibits an overdamped response: following the switching action, the voltage experiences a brief undershoot, then gradually returns to the steady-state value through slow energy release from the capacitor, exhibiting a monotonic recovery characteristic without oscillations. This waveform behavior aligns with the theoretical mechanism described by Equation (18); increasing C s enhances the circuit’s energy storage capacity and prolongs the discharge process.
To further explore parameter synergy effects, the experiment tests the combined condition of C s = 22 nF and R s = 5 Ω, with waveforms shown in Figure 14. The results indicate that, due to the smaller τ value in this configuration, the system discharge rate accelerates, nearly eliminating the voltage spike U t o p . However, the larger snubber capacitance still induces overdamped behavior in the waveform.
Next, the discussion focuses on the case where the time constant τ t f 3 :
When the snubber capacitance C S is extremely small, the experimental results shown in Figure 15 demonstrate that C S is significantly smaller than the value calculated using Equation (26). However, the experimental waveforms reveal no prominent voltage spikes or waveform distortion at U t o p , with the spike voltage controlled within 120% of the baseline voltage, which aligns with theoretical predictions.
However, when the snubber resistor is excessively large and fails to satisfy the condition in Equation (12), a distinct voltage spike at U t o p reaches 239% of the baseline voltage, as shown in Figure 16.
In order to quantify the impact of RC buffer circuit parameter matching on the system performance, the efficiency characteristics and overvoltage suppression effects under different C S   R s combinations are systematically compared, and the results are shown in Table 1. In this case, the device efficiency is obtained by Simulink numerical simulation (simulation step size 100 ns), while the overvoltage amplitude U t o p and percentage are derived from experimental waveform data.
According to the experimental data in Table 1, the voltage spike amplitude exhibits a negative correlation with system efficiency. When the peak voltage U t o p is suppressed within 10% of the reference voltage, the system conversion efficiency can exceed 92%. Conversely, if the RC snubber circuit parameters are mismatched, it not only induces transient overvoltage across the power switching devices but also results in efficiency losses up to 55%. This is attributed to exacerbated Ohmic losses in the snubber resistor and insufficient energy feedback during the switching process.
The experimental prototype is illustrated in Figure 17. It employs the digital signal processing (DSP) chip of TMS320F28335 as the control core to generate an experimental prototype of the alternating current-alternating current converter. Input is AC voltage with a valid value of 50V.
The experimental prototype utilizes a sampling module to determine the polarity of the input voltage and load current. The conduction and turn-off states of the IGBTs are managed based on the control timing diagram shown in Figure 6 and the duty cycle signals provided by the control chip. The input AC voltage is chopped, filtered, and then delivered to the load, with closed-loop control implemented through voltage sampling for load voltage monitoring.
When the reference voltage RMS value is set to 50 V, the prototype achieves voltage control within the 0 to 48 V RMS range. The waveform at a target output voltage amplitude of 36 V is shown in Figure 18. Simultaneously, when the load resistance decreases from 20 Ω to 12 Ω, the load current transient waveform is illustrated in Figure 19.

6. Conclusions

The application significance and current research status of AC–AC chopper converters are first introduced in this paper, and their detailed working principles are analyzed. It then explains the causes of voltage spikes in the circuit and their suppression methods, presenting parameter calculation formulas for the RC snubber circuit in AC–AC chopper converters. Subsequently, the system control timing is analyzed under different load conditions, and a small-signal model of the AC–AC chopper converter with a snubber circuit is proposed. A control diagram for the system is presented, along with a stability analysis. Based on the derived theory, experiments demonstrate the feasibility of the new calculation formula for the improved RC snubber circuit. The experimental prototype achieves voltage regulation functionality for the AC–AC chopper converter.

Author Contributions

Conceptualization, L.W.; Methodology, J.H.; Software, G.L.; Theoretical guidance, C.S.; Writing—original draft, Z.S.; Writing—review & editing, Z.S. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by the Natural Science Foundation of Zhejiang Province under Grant LY22E070008, Zhejiang colleges and universities leading talent training plan, and Yiwu City Natural Science Research Project.

Data Availability Statement

The original contributions presented in this study are included in the article. Further inquiries can be directed to the corresponding author.

Conflicts of Interest

Author declares no conflict of interest.

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Figure 1. Topology of the AC–AC chopper converter.
Figure 1. Topology of the AC–AC chopper converter.
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Figure 2. Voltage spike when IGBT is turned off.
Figure 2. Voltage spike when IGBT is turned off.
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Figure 3. Simplified topology of the AC–AC chopper converter.
Figure 3. Simplified topology of the AC–AC chopper converter.
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Figure 4. Current transition during IGBT turn-off.
Figure 4. Current transition during IGBT turn-off.
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Figure 5. Voltage transition during IGBT turn-off.
Figure 5. Voltage transition during IGBT turn-off.
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Figure 6. Control timing diagram of the AC–AC chopper converter.
Figure 6. Control timing diagram of the AC–AC chopper converter.
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Figure 7. Experimental prototype for verifying the optimization scheme of snubber circuit parameters.
Figure 7. Experimental prototype for verifying the optimization scheme of snubber circuit parameters.
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Figure 8. U I G B T with no snubber circuit.
Figure 8. U I G B T with no snubber circuit.
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Figure 9. U I G B T with C s = 40   n F , R s = 160   Ω .
Figure 9. U I G B T with C s = 40   n F , R s = 160   Ω .
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Figure 10. U I G B T with C s = 1   n F , R s = 20   Ω .
Figure 10. U I G B T with C s = 1   n F , R s = 20   Ω .
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Figure 11. U I G B T with C s = 1   n F ,     R s = 200   Ω .
Figure 11. U I G B T with C s = 1   n F ,     R s = 200   Ω .
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Figure 12. U I G B T with C s = 1   n F , R s = 5   Ω .
Figure 12. U I G B T with C s = 1   n F , R s = 5   Ω .
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Figure 13. U I G B T with C s = 22   n F , R s = 20   Ω .
Figure 13. U I G B T with C s = 22   n F , R s = 20   Ω .
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Figure 14. U I G B T with C s = 22   n F , R s = 5   Ω .
Figure 14. U I G B T with C s = 22   n F , R s = 5   Ω .
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Figure 15. U I G B T with C s = 470   p F , R s = 20   Ω .
Figure 15. U I G B T with C s = 470   p F , R s = 20   Ω .
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Figure 16. U I G B T with C s = 470   p F , R s = 200   Ω .
Figure 16. U I G B T with C s = 470   p F , R s = 200   Ω .
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Figure 17. Experimental prototype of the AC–AC chopper converter.
Figure 17. Experimental prototype of the AC–AC chopper converter.
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Figure 18. The reference voltage is 36 V.
Figure 18. The reference voltage is 36 V.
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Figure 19. The current when the reference voltage is 36 V and the load jumps from 20 Ω to 12 Ω.
Figure 19. The current when the reference voltage is 36 V and the load jumps from 20 Ω to 12 Ω.
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Table 1. Comparison table of the effect of RC buffer circuit parameter combinations on system efficiency and overvoltage rejection characteristics.
Table 1. Comparison table of the effect of RC buffer circuit parameter combinations on system efficiency and overvoltage rejection characteristics.
Parameter ValueEfficiency Voltage   Spike   U t o p Overvoltage Amplitude as a Percentage of Reference Voltage
C s = 40   n F
R s = 160   Ω
45%60.5 V68%
C s = 1   n F
R s = 20   Ω
93.2%37.2 V3%
C s = 1   n F
R s = 200   Ω
45.7%55.1 V78%
C s = 1   n F
R s = 5   Ω
92.4%37.9 V5%
C s = 22   n F
R s = 20   Ω
85.1%45.4 V28%
C s = 22   n F
R s = 5   Ω
89.3%38.5 V7%
C s = 470   p F
R s = 20   Ω
92.6%40.2 V11%
C s = 470   p F
R s = 200   Ω
47.4%86.1 V139%
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Shi, Z.; Wei, L.; He, J.; Li, G.; Song, C. Optimization of Snubber Circuit Parameters for AC–AC Chopper Converter. Electronics 2025, 14, 1733. https://doi.org/10.3390/electronics14091733

AMA Style

Shi Z, Wei L, He J, Li G, Song C. Optimization of Snubber Circuit Parameters for AC–AC Chopper Converter. Electronics. 2025; 14(9):1733. https://doi.org/10.3390/electronics14091733

Chicago/Turabian Style

Shi, Zhenyu, Liyang Wei, Jinlong He, Gang Li, and Chunwei Song. 2025. "Optimization of Snubber Circuit Parameters for AC–AC Chopper Converter" Electronics 14, no. 9: 1733. https://doi.org/10.3390/electronics14091733

APA Style

Shi, Z., Wei, L., He, J., Li, G., & Song, C. (2025). Optimization of Snubber Circuit Parameters for AC–AC Chopper Converter. Electronics, 14(9), 1733. https://doi.org/10.3390/electronics14091733

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