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Article

A Fixed-Frequency Sliding-Mode Controller for Fourth-Order Class-D Amplifier

School of Automation, Northwestern Polytechnical University, Xi’an 710000, China
*
Author to whom correspondence should be addressed.
Electronics 2018, 7(10), 261; https://doi.org/10.3390/electronics7100261
Submission received: 20 September 2018 / Revised: 16 October 2018 / Accepted: 17 October 2018 / Published: 19 October 2018
(This article belongs to the Special Issue Applications of Power Electronics)

Abstract

:
Since the parasitic voltage ringing and switching power losses limit the operation of active devices at elevated frequencies; therefore, a higher-order inductor-capacitor (LC) filter is commonly used, which offers extended attenuation above the cutoff frequency and thus, improves the total harmonic distortion (THD) of the amplifier. This paper applies the concept of integral sliding-mode control to a fourth-order class-D amplifier. Two fixed-frequency double integral sliding-mode (FFDISM) controllers are proposed, where one uses the inductor current while the other involves the capacitor current feedback. Their equivalent control equations are derived, but from the realization viewpoint, the controller using the capacitor current feedback is advantageous and, therefore, is selected for final implementation. The performance of the proposed FFDISM controller for fourth-order GaN class-D amplifier is confirmed using simulation and experimental results.

1. Introduction

For decades, silicon transistors have dominated the power amplifiers industry due to the low-cost and well-established fabrication technology. Since the transistors in a linear power amplifier operate in the active region where power dissipation is significant, thereby they experience poor efficiency. In addition to advanced fabrication techniques like laterally diffused metal oxide semiconductor (LDMOS) [1,2], different control strategies such as Doherty’s architecture and load-modulation were adopted to improve the efficiency of a linear amplifier [3]. Due to a narrow margin for improvement left in Si, the demand for high operating voltage, temperature and efficiency has enabled the trend towards wide band-gap (WBG) materials. The attractive features such as a high electric breakdown field, low thermal impedance, and saturated electron drift velocity, motivated their rapid substitution for Si counterparts [4]. Particularly, GaN high electron mobility transistor (HEMT) has become a potential candidate for large bandwidth and low-noise power amplifiers [5].
The earlier release of high-power GaN HEMT was a depletion-mode device also referred to as normally-on FET [6]. Since it requires additional control and protection circuitry for a safe power-up of power converters built with normally-on FETs, therefore, enhancement-mode FETs are preferred over depletion-type devices. There were several attempts made to fabricate a normally-off GaN HEMT, including a recessed gate structure [7], Si substrate with p-type GaN [8], and fluorine plasma treatment [9]. However, due to a low threshold and gate breakdown voltages, the proposed HEMTs are vulnerable to spurious turn-on and gate failure. Alternatively, to achieve a normally-off GaN HEMT, a cascode configuration has been proposed by combining the GaN HEMT with a low-voltage Si metal oxide semiconductor field effect transistor (MOSFET) [10]. Due to the low-cost leaded packages and superior characteristics, GaN cascode is a dominating power device and is preferred over the enhancement-mode HEMTs [11]. They are commonly available in TO-220 package, which enables easy assembling of the heat-sink and does not need special equipment for soldering to printed circuit board (PCB).
The class-D amplifier motivated by its high-efficiency (ideally 100%) encodes the reference signal into a pulse-width modulation output using a switching power circuit, with pulse-width proportional to the amplitude of the reference signal [12]. Since the operation of active devices in either the cutoff or saturation region significantly reduces the power dissipation, therefore, the heat sink requirement relaxes. In the case of battery-powered devices, high efficiency means longer battery life. Thus, class-D amplifier is the ideal choice for miniaturized high-power amplification as compared to the class-A, class-B and class-AB. Today, in addition to the stereo system, class-D amplifiers are also used in a high-precision control application, including the wafer positioning system, magnetic resonance imaging (MRI), and power hardware-in-loop simulation (PHIL) [13,14].
An LC filter demodulates the output pulse-train by attenuating high-frequency content and produces the amplified output with minimum distortion. More LC stages are commonly added at the output of a class-D amplifier to meet the desired level of THD at a given switching frequency [15]. Low THD amplifier with high-power capability has applications in AC power sources and is used for the emulation of certain characteristics of an electrical system. However, the higher-order class-D amplifier causes an irregular-shaped frequency response due to multiple resonant frequencies in the uncompensated architecture [16]. Furthermore, the peaking at resonant frequency increases with an increase in load resistance and approaches zero-damping under the no-load condition. Therefore, it is required to have well-damped characteristics of a higher-order class-D amplifier, almost independent of load variations.
The feedback compensation of a class-D amplifier with a single LC stage is extensively investigated in the literature [17,18]. However, for the fourth-order system, the reported passive damping uses a low-valued resistor in series with filter capacitors to flatten the frequency response, at the cost of reduced efficiency [19]. Feedback controller supplemented with passive damping was adopted in Reference [20], which results in relatively lower power losses. In addition to an RL-branch between the capacitive filter of the first and inductive filter of the second LC stage, authors in Reference [21] proposed a multi-loop controller. Employment of such networks degrades the efficiency, which is the sole advantage of the class-D amplifier. Since passive damping negatively affects the efficiency of the amplifier, the application of high-cost GaN cascode becomes vestigial.
A purely feedback-controlled fourth-order class-D amplifier presented in Reference [22], achieved a peak efficiency of 87%. However, the controller was extremely complex as it requires feedback from all four state-variables. Feedback compensation using an integral sliding-mode (ISM) controller of the fourth-order class-D amplifier has been recently reported in Reference [23]. Nevertheless, it is inhibited for use due to the variable switching frequency nature of hysteretic modulation (HM) [24,25]. Therefore, a promising feedback controller with pulse-width modulation (PWM) is required, which ensures fixed switching frequency, flatter frequency response, reduced tracking error and a high-efficiency.
Since the equivalent control of a fixed-frequency sliding-mode controller is extracted from the sliding-surface by a differentiation operation [26]. Therefore, it is obvious to add a double integral term in the sliding-surface essential for ensuring reduced steady-state error [27,28]. However, the design of the sliding-surface becomes more challenging and would require tedious manipulations while deriving the equivalent control [29,30]. Moreover, due to a number of feedback signals, the resulting controller may not be practical. Thus, the FFDISM is proposed here, with two different control structures based on sliding-surfaces: One uses the inductor current while the other utilizes the capacitor current feedback to flatten the frequency response. The controller that offers high efficiency and realization using reduced opamp count is implemented for experimental verification.
The rest of this paper is organized as follows: Section 2 presents the mathematical model of the fourth-order class-D amplifier, which is an essential step for filter and controller design. Section 3 focuses on the derivation of the equivalent control for the two controllers where one uses the inductor current while the other involves the capacitor current feedback. In Section 4, the circuit realization of the proposed controllers is discussed. Simulation and experimental results are given in Section 5, followed by conclusion in Section 6.

2. Modeling of Fourth-Order Class-D Amplifier

The role of the second LC stage is to improve the THD by reducing the residuals of switching harmonics [31]. It is important to investigate the effect of the additional LC stage on frequency response using average modeling, in order to ease the controller design process. Modeling of the power stage presented here neglects the non-idealities such as the forward voltage drop in the diode, conduction resistance of MOSFET and dead-time delay. Figure 1a,b shows the equivalent circuits during the two class-D operation modes determined by the control signals, i.e., uH and uL. These switching signals can attain the binary values; 1 and 0 for the on and off state of MOSFET respectively. For uH = 1, the low-side GaN cascode SL is in the off-state while the high-side SH is in the conduction state, and the voltage vs clamps to VIN/2 as shown in Figure 1a. Similarly, for uH = 0, voltage vs clamps to −VIN/2 as shown in Figure 1b. The dynamic equations of the converter for each switching state are expressed as
{ L A d i LA d t = V IN 2 v A when u H = 1 L A d i LA d t = V IN 2 v A when u H = 0
The subscript “A” and “B” depict parameters of the first and second LC stage. Thus, LA, iLA, and vA are the inductance of the first LC stage, the current through LA, and the voltage across CA respectively. VIN is the source, and vo is the output voltage. The average-model of the class-D amplifier, by combining (1) using duty cycle dH = avg(uH) is expressed as
L A d i LA d t = V IN 2 ( 2 d H 1 ) v A C A d v A d t = i LA i LB L B d i LB d t = v A v B C B d v B d t = i LB v B R
where LB, iLB, and vB are the inductance of the second LC stage, the current through LB, and the voltage across CB, respectively, and the load resistance is denoted by R. The dynamics of the class-D amplifier may also be written in state-space form as
x ˙ = f ( x , t ) + g ( x , u , t )
where x is the state vector, and f and g are functions of the state vector explicitly given in (4).
{ x = [ i LA v A i LB v B ] T f ( . ) = [ 0 1 L A 0 0 1 C A 0 1 C A 0 0 1 L B 0 1 L B 0 0 1 C B 1 R C B ] , g ( . ) = [ V IN 2 L ( 2 d H 1 ) 0 0 0 ] T
The open-loop transfer function from vS to output voltage vo can be deduced from (4) as:
v o ( s ) v S ( s ) = R s 4 L A L B C A C B R + s 3 L A L B C A + s 2 ( L A C A + L B C B + L A C B ) R + s ( L A + L B ) + R
Figure 2 shows the frequency response of the fourth-order class-D amplifier in an open-loop configuration. Using the filter values set (i) in Table 1 results in resonant frequencies at 14 kHz and 51 kHz, as shown in Figure 2a. The two frequencies are somewhat close to each other as the relations between the inductances and capacitances of the two stages are LA = 2LB and CB = 2CA respectively. The frequency response is repeated in Figure 2b using the filter values from the set (ii) in Table 1, resulting in resonant frequencies at 14 kHz and 114 kHz. It indicates that the first resonant frequency is independent of LB and merely depends on LA, CA, and CB. Moreover, the separation between the two frequencies determines the damping of the second resonance. The second frequency can be displaced adequately by using an appropriate integer multiplier n ≥ 2 such that LA = nLB [9]. It is also noted that the resonant peaking increases with the load resistance and approaches zero-damping under a no-load condition.
To improve the frequency response of fourth-order GaN class-D amplifier, the FFDISM controller is proposed. Two different sliding-surfaces are proposed; each includes an extra current term (either inductor or capacitor current of the first LC stage) in addition to voltage error in the state variables. The coefficients of the sliding-surfaces are determined using the stability condition. The controller using capacitor current is compared to the controller with an inductor current in terms of high-efficiency and ease of implementation. The simulation and experimental results are presented to verify the performance of the FFDISM controller using capacitor current feedback.

3. FFDISM Controller of Fourth-Order GaN Amplifier

The design starts by proposing a sliding-surface as a function of state-variables followed by the derivation of the equivalent control, and finally choosing the coefficients of the sliding-surfaces using stability condition [32,33]. Two different sliding-surfaces are proposed here; the first includes the inductor current feedback while the later employs capacitor current feedback.

3.1. Inductor Current Feedback

The state-variables for FFDISM controller are denoted by δ1 and δ2 and expressed as
{ δ 1 = e   d t ρ L A i LA δ 2 = { ( e   d t ) ρ L A i LA } d t
where e is the voltage error between reference signal vref and scaled down output voltage βvo, iLA is inductor current feedback, ρ and β are scaling factors. Differentiating the set of equations in (6), substituting from (4) gives:
{ δ ˙ 1 = ( v ref β v o ) ρ ( V IN 2 m v A ) δ ˙ 2 = ( v ref β v o ) d t ρ L A i LA
where m = 2dH − 1 is the modulation signal.
The sliding-surface is proposed as the weighted sum of δ1 and δ2 and expressed as
S 1 = γ 1 δ 1 + γ 2 δ 2
where the weights γ1 and γ2 are sliding coefficients. By differentiating the sliding-surface in (8), using (4), and finally solving 1 = 0 for mequ gives the equivalent control [34] as
m equ ( β V IN 2 ) = ( L A γ 2 β γ 1 ) i LA + β v A + ( β ρ ) ( v ref β v o ) + ( γ 2 β γ 1 ρ ) ( v ref β v o ) d t
where the equivalent control is bounded as |mequ| ≤ 1. By further manipulation, the equivalent control signal as a function of controller gains can be expressed as
m equ ( β V IN 2 ) = v m = α 1 i LA + β v A + α 2 ( v ref β v o ) + α 3 ( v ref β v o ) d t
where
α 1 = ( L A γ 2 β γ 1 ) , α 2 = ( β ρ ) , α 3 = ( γ 2 β γ 1 ρ )
The gains α1, α2, and α3 derived using the necessary existence and stability condition determines the controller performance. The selected range of gains using existence condition determines the region where state trajectory will always be directed to the sliding-surface. By satisfying the Lyapunov condition 1 × S1 < 0, gives the existence condition:
{ β ( V IN 2 v A 2 ) > α 1 i LA + α 2 ( v ref β v o ) + α 3 ( v ref β v o ) d t β ( V IN + 2 v A 2 ) > α 1 i LA α 2 ( v ref β v o ) α 3 ( v ref β v o ) d t
The stability condition can be derived by substituting 1 = 0, which results in the following characteristic equation
γ 1 e ˙ 1 + γ 2 e ˙ 2 = 0 γ 1 δ ˙ 1 + γ 2 δ 1 = 0
where the straightforward criterion γ2/γ1 > 0 ensures the asymptotic stability. Therefore, the ratio of sliding coefficients is chosen as γ2/γ1 = 1.5πfb where fb is the natural frequency of the closed-loop system. Using LA = 33 μH, fb = 10 kHz and β = ρ in (11) gives the controller gains as:
α 1 = ( L A γ 2 β γ 1 ) = 0.067 , α 2 = ( β ρ ) = 1 , α 3 = ( γ 2 β γ 1 ρ ) = 47124

3.2. Capacitor Current Feedback

The controller design procedure is repeated using a different sliding-surface which involves capacitor current iCA. The state-variables for FFDISM controller are redefined as Δ1 and Δ2
{ Δ 1 = e   d t σ L A i CA Δ 2 = { ( e   d t ) σ L A i CA } d t
where e is the voltage error between reference signal vref and scaled down output voltage βvo, β and σ are scaling factors. Differentiating Equation (15) and substituting (4) gives
{ d Δ 1 d t = ( v ref β v o ) σ L A d d t ( i LA i LB ) d Δ 2 d t = ( v ref β v o ) d t σ L A i CA
The sliding-surface for the FFDISM controller is defined as
S 2 = ς 1 Δ 1 + ς 2 Δ 2
where ς1 and ς2 are sliding coefficients. The equivalent control [34] is obtained by differentiating the sliding-surface S2, using (4) and finally solving 2 = 0 for equivalent control mequ
m equ ( β V IN 2 ) = ( L A ς 2 β ς 1 ) i CA + β v o + β L A L B ( β v A β v o ) + ( β σ ) ( v ref β v o ) + ( ς 2 β ς 1 σ ) ( v ref β v o ) d t
By further manipulation, the equivalent control signal as a function of controller gains can be expressed as
m equ ( β V IN 2 ) = v m = λ 1 i CA + β v o + λ 2 ( v ref β v o ) + λ 4 ( β v A β v o ) + λ 3 ( v ref β v o ) d t
where
λ 1 = ( L A ς 2 β ς 1 ) , λ 2 = ( β σ ) , λ 3 = ( ς 2 β ς 1 σ ) , λ 4 = ( β L A L B )
The controller gains λ1, λ2, λ3, and λ4 are derived using existence and stability conditions. Satisfying the Lyapunov condition 2 × S2 < 0, ensures the existence condition:
{ β ( V IN 2 v o 2 ) > λ 1 i CA + λ 2 ( v ref β v o ) + λ 4 ( β v A β v o ) + λ 3 ( v ref β v o ) d t β ( V IN + 2 v o 2 ) > λ 1 i LA λ 2 ( v ref β v o ) λ 4 ( β v A β v o ) λ 3 ( v ref β v o ) d t
The stability condition can be derived using = 0, which gives the characteristic equation as
ς 1 d Δ 1 d t + ς 2 d Δ 2 d t = 0 ς 1 d Δ 1 d t + ς 2 Δ 1 = 0
The criterion ς2/ς1 > 0 ensures stability. Therefore, the ratio of sliding coefficients is chosen as ς2/ς1 = πfb where fb is the natural frequency of the closed-loop system. The controller parameters, using fb = 10 kHz and β = σ in (20), are given as:
λ 1 = ( L A ς 2 β ς 1 ) = 0.045 , λ 2 = ( β σ ) = 1 , λ 3 = ( ς 2 β ς 1 σ ) = 31416 , λ 4 = ( β L A L B ) = 0.08
The two FFDISM configurations corresponding to sliding-surfaces S1 and S2 are implemented by translating their respective equivalent control equations to analog systems. The FFDISM controller implemented using (10) is shown in Figure 3a, where the difference between the scaled output voltage βvo and reference signal vref, is applied to the proportional integral (PI-type) controller. In addition to vo, it also requires feedback voltage vA and current iLA from the first LC stage. The closed-loop response is determined by the gains α2α3 and plays the important role of the error signal e processing. Similarly, Figure 3b shows the FFDISM controller involving the capacitor current iCA feedback implemented using (19) where the gains λ1λ4 determine the response of the closed-loop system. It is observed that the FFDISM controller for fourth-order class-D amplifier requires more feedback variables, i.e., beside iLA and iCA the controller in Figure 3a,b respectively requires βvA and β(vAvB). These additional variables make the circuit implementation more challenging. Therefore, it is important to select the controller that in addition to shaping the frequency response also offers ease of circuit implementation.

4. Realization of FFDISM Controller

High switching frequency necessitates the analog implementation of the controller using low-cost, single-supply opamps. Figure 4 and Figure 5 show the circuit realization of FFDISM controllers for fourth-order GaN class-D amplifier, with additional iLA and iCA feedback respectively. For ease of reference, the controller involving inductor current and capacitor current is pointed as CNRL1 and CNRL2 respectively. Single-supply opamps are used due to its rail-to-rail input and low power consumption as compared to the dual-supply counterparts. The Vcc and Vb are opamps dc supply and mid-point bias voltage respectively. Here, both FFDISM designs are evaluated to find the one that offers ease of implementation, determined by the required number of opamps. The additional voltage feedback signals, i.e., vA in CNRL1 and β(vAvB) in CNRL2 unanimously increases the opamp count. However, dc-biasing of iLA is required, which increases the opamp count in CNRL1 as compared to CNRL2.
Furthermore, the capacitor current iCA in CNRL2 is bidirectional and therefore, can be sensed using a low-cost current transformer as there is no saturation problem. A sense resistor RSC across the secondary of the current transformer converts the current signal into the voltage signal and adequately scales, i.e., λ1 = 0.01RSC. This RSC carries low-current and thus, does not affect the efficiency. On the other hand, the sense resistor for the inductor current iLA feedback in CNRL1 can cause a significant reduction in overall efficiency. It is concluded that CNRL2 offers improvement in efficiency and requires fewer numbers of opamps as compared to CNRL1. Therefore, FFDISM controller using the capacitor current iCA is finally implemented for experimental testing.
In Figure 5, the voltage at node A is the scaled and biased output voltage, with the scaling factor determined by the ratio β = R2/R1 = R4/R3 = 4 kΩ/100 kΩ. Meanwhile, Cmp2 inverts and adds bias Vb to vref as the waveform shows at node B, with the resistors R5 = R6 = R7 = 200 kΩ. The opamp Cmp3 serves as a proportional integral (PI-type) controller, where capacitor CF and resistors RF, RG, and RH together determine the proportional and integral gains as λ2 = RF RG and λ3 = 1/CFRG. Since modulating signal is referenced to Vb = +2.5 V, the carrier signal is also biased to the same dc-level, where its peak, denoted as hat{Vc} is given by βVIN/2 = 2 V.
A prototype of the fourth-order GaN class-D amplifier has been built using the GaN cascode transistor, with the top and bottom sides shown in Figure 6a,b respectively. GaN cascode is realized by combining a low-voltage Si MOSFET with a high-voltage GaN HEMT to exhibit low-conduction and switching power losses. The TPH3006PD (Transphorm Inc., San Jose, CA, USA) available in TO-220 package is used to realize the power circuit. A conventional totem-pole gate driver with a low-valued gate resistance of 3 Ω is used to enable fast switching. The parasitic inductances of the package are high, which is responsible for drain voltage overshoot followed during turn-off transient. Therefore, an resistor-capacitor (RC) snubber across the low-side GaN cascode is used to suppress undesired oscillations. Three 150 µF electrolytic capacitors are connected in parallel to achieve high bus capacitance and reduce the effect of interconnection inductances.

5. Results and Discussion

In this section, the performance of the proposed FFDISM controller is evaluated using simulation and experimental results. First, the frequency response and step response of the closed-loop system based on control diagram reduction are presented. This fundamental technique is useful to investigate the effect of the inner-loop on the compensation of resonance. Furthermore, computer–based circuit simulator i.e., Plexim Plecs is used to analyze the transient behavior of class-D amplifier using different resistive loads. Finally, experimental results are presented for validation of FFDISM controller.

5.1. Simulation Results

Figure 7a shows the multi-loop control diagram of the class-D amplifier, while the equivalent reduced form is shown in Figure 7b with the open-loop transfer functions Ho and Go given in (24) and (25) respectively:
H o = v o ( s ) v A ( s ) = R s 2 L B C B R + s L B + R
v A ( s ) v S ( s ) = v A ( s ) v o ( s ) × v o ( s ) v S ( s ) = s 2 L B C B R + s L B + R s 4 L A L B C A C B R + s 3 L A L B C A + s 2 ( L A C A + L B C B + L A C B ) + s ( L A + L B ) + R
where the parameters of the amplifier are given in Table 1 (value set i), selected using second-order Butterworth approximation. The feedback gains employed are λ4 = 0.08 and β = 0.04. Figure 8a shows the frequency response of the closed-loop class-D amplifier using frequency sweep ranging from 10 Hz to 300 kHz. The frequency response of the FFDISM-controlled amplifier is presented to investigate the significance of the inner-loop for different values of the capacitor current gain λ1. It is observed that the controller effectively mitigates the resonant peaks and promises a flatter frequency response, almost independent of the load. Further, the proposed control strategy is verified by analyzing the step response in Figure 8b. The voltage overshoot and oscillations decrease with an increase in the capacitor current gain λ1.
The transient response of fourth-order GaN class-D amplifier is analyzed using a circuit simulator, which offers a chance to evaluate the correctness of the proposed design. A close match to the experimental results can be obtained by adding the nonidealities to the simulation. Therefore, parasitic resistances of 500 mΩ and 200 mΩ are added to the filter inductors and capacitors, respectively. A sampling time of 1ns is used to capture the simulation results with adequate accuracy at a switching frequency of 100 kHz. Furthermore, a dead-time of 50 ns is introduced before every switching transition. Other factors such as delay in gate driver stage, jitters in PWM, finite rise and fall time of the gate signal are ignored; otherwise, the model takes a long time for solving.
The reference signal is a square wave of 1 kHz frequency, 50% duty cycle and 2 V peak-to-peak amplitude. Such a reference acts as a series of periodic step changes where the slew rate of the rising edge indicates the amplifier’s bandwidth. Simulations are performed using the resistive load of 7 Ω and 14 Ω to observe the change in the voltage overshoot and the settling time with the load. Figure 9a indicates that the response of the open-loop GaN class-D amplifier is strongly dependent on the load, and the observed voltage overshoot and settling time are 9.34 V and 0.15 ms, respectively, for R = 7 Ω. By increasing the load resistance to 14 Ω, voltage overshoot and settling time rises to 13.25 V and 0.21 ms respectively. The FFDISM controller using inductor current is also simulated, and results are shown in Figure 9b. The improvement in response is observed using the controller gains derived in (11). Finally, the simulation results for GaN class-D amplifier with FFDISM using the capacitor current obtained under different loads are presented in Figure 9c. The proposed FFDISM controller reduces the voltage overshoot and steady-state error to 0.41 V and 0.3 V, respectively, thereby proving its superiority.

5.2. Experimental Results

For experimental validation, a prototype of fourth-order class-D amplifier was implemented on PCB using GaN, available in TO-220 package. Single-supply opamps were used to translate the equivalent control equation in (19) into the analog controller.
For measurement of the frequency response, sinusoidal reference signals (vref) of different frequencies ranging from 10 Hz to 50 kHz were applied using a signal generator, and the corresponding outputs were listed. The voltage gain (Av) was computed for open and closed-loop configurations, as the ratio of the reference vref to output voltage vo. Figure 10a shows the voltage gain plotted against the frequency of the reference signal when there is a 10 Ω resistive load. It is noted in open-loop (shown in blue), that the voltage gain at the 33 kHz resonant frequency is 29.3 which is successfully compensated by FFDISM controller as depicted in red.
Figure 10b shows the THD+N of GaN amplifier against the modulation index, defined as the ratio of the carrier to reference voltage and can range from 0 to 1. The output voltage vo was recorded using the data-acquisition card at 5 MSa/s sampling frequency, and the fast Fourier transform (FFT) was used to extract THD+N. It was observed that FFDISM controlled fourth-order class-D amplifier achieved improved THD+N as compared to open-loop architecture.
Figure 11a shows the experimental transient response of open-loop GaN class-D amplifier to a reference square wave of 1 kHz frequency. It is found that with a load resistance of 10 Ω, the resonant frequencies result in voltage overshoot of 5.2 V. Similarly, the transient response with FFDISM controller to 1 kHz reference square wave is shown in Figure 11b, with a recorded overshoot of 1.3 V. Thus it is validated, that the proposed controller improves the transient response of the fourth-order class-D amplifier.
Furthermore, the scalogram analysis was performed, which illustrated a combined time and frequency-domain response of the amplifier. The wavelet transform was applied to represent the output voltage vo as a weighted sum of the limited duration wavelet functions. Figure 12a shows the scalogram of the transient response in Figure 11a. A horizontal line in the figure represents a particular harmonic in the output waveform with its frequency on the y-axis and magnitude given on the color-bar. Since the square wave is a weighted sum of odd harmonics, the parallel lines below 16 kHz can synthesize it with adequate accuracy. Similarly, the line at 100 kHz is due to residual switching noise. There is a noticeable activity in the time interval 2–4 ms and 7–9 ms due to voltage ringing, corresponding to the resonant frequencies at 12.7 kHz and 33 kHz. Figure 12b shows the scalogram of the transient response in Figure 11b. The shrunken oval-shaped region and the reduction in magnitude noted on the color-bar verify the effectiveness of the FFDISM controller.
Finally, sinusoidal and triangular signals were generated using the FFDISM controlled GaN class-D amplifier. Figure 13a shows the 1 kHz sinusoidal output voltage vo and the corresponding current io of the fourth-order amplifier. Similarly, for a 1 kHz triangular reference, output voltage vo and current io are shown in Figure 13b. Thus, the effectiveness of the FFDISM controller, proposed for fourth-order class-D amplifier has been validated. Figure 14 illustrates the efficiency of GaN class-D amplifier at different operating powers. It is observed that at 150 W power, the amplifier achieves 93% efficiency. Moreover, the efficiency and bandwidth of the proposed class-D amplifier are compared in Table 2, against the hysteretic modulation-based implementation. It indicates that the class-D amplifier with PWM not only gets rid of the variable switching frequency but also improves the efficiency by reducing switching losses.

6. Conclusions

The FFDISM controller has been successfully applied to the GaN-based fourth-order class-D amplifier. The fourth-order filter has been used to improve the THD of class-D amplifiers, operating at a relatively lower switching frequency. Two different FFDISM structures were proposed using the inductor and capacitor current. The advantages offered by the FFDISM controller using the capacitor current over the counterpart using inductor current feedback are listed as: The bidirectional nature of the capacitor current demands a low-cost current-transformer for feedback; the current sense circuit does not affect the overall efficiency; and reduced opamp are required for circuit realization. A prototype of the amplifier was implemented on a PCB. The experimental results revealed that the proposed FFDISM controller effectively flattens the frequency response of the fourth-order amplifier, and results in THD and voltage overshoot of 0.6% and 1 V respectively.

Author Contributions

H.Z. and X.Z. contributed equally to the research presented here. H.Z. and X.Z. conceived and designed the experiments. H.Z. performed the experiments, analyzed the data and wrote the paper. X.W. and H.A. provided significant comments and technical feedback throughout the research. S.K. reviewed and improved the paper.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Equivalent circuits of fourth-order GaN class-D amplifier when (a) uH = 1 (b) uH = 0.
Figure 1. Equivalent circuits of fourth-order GaN class-D amplifier when (a) uH = 1 (b) uH = 0.
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Figure 2. Open-loop frequency response of GaN class-D amplifier with fourth-order filter using (a) value set-i in Table 1 and (b) value set-ii in Table 1.
Figure 2. Open-loop frequency response of GaN class-D amplifier with fourth-order filter using (a) value set-i in Table 1 and (b) value set-ii in Table 1.
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Figure 3. FFDISM controller of fourth-order class-D amplifier using (a) iLA feedback (CNRL1) (b) iCA feedback (CNRL2).
Figure 3. FFDISM controller of fourth-order class-D amplifier using (a) iLA feedback (CNRL1) (b) iCA feedback (CNRL2).
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Figure 4. Circuit realization of FFDISM controller with iLA feedback (CNRL1).
Figure 4. Circuit realization of FFDISM controller with iLA feedback (CNRL1).
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Figure 5. Circuit realization of FFDISM controller with iCA feedback (CNRL2).
Figure 5. Circuit realization of FFDISM controller with iCA feedback (CNRL2).
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Figure 6. Prototype of GaN class-D amplifier (a) top-side (b) bottom side.
Figure 6. Prototype of GaN class-D amplifier (a) top-side (b) bottom side.
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Figure 7. Closed-loop schematic of the class-D amplifier: (a) multi-loop form (b) reduced form.
Figure 7. Closed-loop schematic of the class-D amplifier: (a) multi-loop form (b) reduced form.
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Figure 8. Effect of capacitor current iC feedback on damping of fourth-order class-D amplifier (a) closed-loop frequency response for different λ1 and (b) step response for different λ1.
Figure 8. Effect of capacitor current iC feedback on damping of fourth-order class-D amplifier (a) closed-loop frequency response for different λ1 and (b) step response for different λ1.
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Figure 9. Simulation-based transient response of (a) open-loop GaN class-D amplifier; (b) FFDISM controller using inductor current; (c) FFDISM controller using capacitor current.
Figure 9. Simulation-based transient response of (a) open-loop GaN class-D amplifier; (b) FFDISM controller using inductor current; (c) FFDISM controller using capacitor current.
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Figure 10. (a) Frequency response of the open-loop GaN class-D amplifier and with FFDISMC (b) THD+N the of open-loop GaN class-D amplifier and with FFDISMC.
Figure 10. (a) Frequency response of the open-loop GaN class-D amplifier and with FFDISMC (b) THD+N the of open-loop GaN class-D amplifier and with FFDISMC.
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Figure 11. Experimental results transient response of: (a) open-loop GaN class-D amplifier; (b) GaN class-D amplifier with FFDISMC.
Figure 11. Experimental results transient response of: (a) open-loop GaN class-D amplifier; (b) GaN class-D amplifier with FFDISMC.
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Figure 12. Experimental magnitude scalogram of GaN class-D amplifier: (a) open-loop; (b) with FFDISM controller.
Figure 12. Experimental magnitude scalogram of GaN class-D amplifier: (a) open-loop; (b) with FFDISM controller.
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Figure 13. (a) Experimental result of GaN class-D amplifier with FFDISM controller output voltage vo and load current io and (b) output voltage vo for reference sine wave vref.
Figure 13. (a) Experimental result of GaN class-D amplifier with FFDISM controller output voltage vo and load current io and (b) output voltage vo for reference sine wave vref.
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Figure 14. The efficiency of GaN class-D amplifier at different power.
Figure 14. The efficiency of GaN class-D amplifier at different power.
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Table 1. Parameters of GaN class-D amplifier with fourth-order filter.
Table 1. Parameters of GaN class-D amplifier with fourth-order filter.
ParameterSymbolValue Set
iii
source voltageVIN100 V100 V
first stage filterLA, CA36 µH, 1 µF36 µH, 1µF
second stage filterLB, CB18 µH, 2 µF3 µH, 2 µF
Table 2. Comparative analysis of PWM and Hysteretic modulation based class-D amplifier.
Table 2. Comparative analysis of PWM and Hysteretic modulation based class-D amplifier.
DesignModulationEfficiency (%)Bandwidth (kHz)
[20]Hysteretic814.6
[22]Hysteretic873.5
[35]Hysteretic845
This workPWM93.210

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Zaman, H.; Zheng, X.; Wu, X.; Khan, S.; Ali, H. A Fixed-Frequency Sliding-Mode Controller for Fourth-Order Class-D Amplifier. Electronics 2018, 7, 261. https://doi.org/10.3390/electronics7100261

AMA Style

Zaman H, Zheng X, Wu X, Khan S, Ali H. A Fixed-Frequency Sliding-Mode Controller for Fourth-Order Class-D Amplifier. Electronics. 2018; 7(10):261. https://doi.org/10.3390/electronics7100261

Chicago/Turabian Style

Zaman, Haider, Xiancheng Zheng, Xiaohua Wu, Shahbaz Khan, and Husan Ali. 2018. "A Fixed-Frequency Sliding-Mode Controller for Fourth-Order Class-D Amplifier" Electronics 7, no. 10: 261. https://doi.org/10.3390/electronics7100261

APA Style

Zaman, H., Zheng, X., Wu, X., Khan, S., & Ali, H. (2018). A Fixed-Frequency Sliding-Mode Controller for Fourth-Order Class-D Amplifier. Electronics, 7(10), 261. https://doi.org/10.3390/electronics7100261

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