Aranda, L.A.; Wessman, N.-J.; Santos, L.; Sánchez-Macián, A.; Andersson, J.; Weigand, R.; Maestro, J.A.
Analysis of the Critical Bits of a RISC-V Processor Implemented in an SRAM-Based FPGA for Space Applications. Electronics 2020, 9, 175.
https://doi.org/10.3390/electronics9010175
AMA Style
Aranda LA, Wessman N-J, Santos L, Sánchez-Macián A, Andersson J, Weigand R, Maestro JA.
Analysis of the Critical Bits of a RISC-V Processor Implemented in an SRAM-Based FPGA for Space Applications. Electronics. 2020; 9(1):175.
https://doi.org/10.3390/electronics9010175
Chicago/Turabian Style
Aranda, Luis Alberto, Nils-Johan Wessman, Lucana Santos, Alfonso Sánchez-Macián, Jan Andersson, Roland Weigand, and Juan Antonio Maestro.
2020. "Analysis of the Critical Bits of a RISC-V Processor Implemented in an SRAM-Based FPGA for Space Applications" Electronics 9, no. 1: 175.
https://doi.org/10.3390/electronics9010175
APA Style
Aranda, L. A., Wessman, N.-J., Santos, L., Sánchez-Macián, A., Andersson, J., Weigand, R., & Maestro, J. A.
(2020). Analysis of the Critical Bits of a RISC-V Processor Implemented in an SRAM-Based FPGA for Space Applications. Electronics, 9(1), 175.
https://doi.org/10.3390/electronics9010175