PA-LIRS: An Adaptive Page Replacement Algorithm for NAND Flash Memory

Round 1

Reviewer 1 Report

In this paper, they suggest replacement algorithm for flash memory storage device called PA-LIRS, which is flash memory version of LIRS replacement algorithms. Since LIRS gets high buffer hit ratio for storage device but did not consider characteristics of flash memory device, this paper considered evicting clean pages more than dirty pages to LRIS, as other flash-based cache replacement schemes do. This paper is not an original idea, but there is some progress in applying the evicting policy with clean-dirty concept to existing LIRS algorithm for the flash memory device. In order for the paper to be published, it seems that some modifications and additional experiments are required.

What means non-resident HIR page in line 166? You did not explain the meaning of resident/non-resident HIR so it could confuse the understanding the algorithms. 

The operation method of Fig3 used as an example was not properly explained. You should add a description so that it is easy to understand the movement of pages in each step.

They used flash-dbsim simulator for the evaluation of the proposed replacement algorithm. However, appropriate description of the simulation environment has not been added. The page size and block size, and the ratio of the buffer to the size of the entire NAND flash memory device are not shown. Without this information, it is impossible to determine whether it is a proper simulation evaluation.

Also, there is insufficient information on traces used in the experiment. One of the important factors is the sequential/randomness of the request and the size of the request, and it seems to have to be considered. It is also necessary to perform experiments using a real traces or other benchmark traces to perform an evaluation for a more verified trace.

Author Response

 

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Reviewer 2 Report

This paper presents a new page replacement algorithm called Probability-based adjustable LIRS to overcome the existing issues. I think this MS can be acceptable in MDPI Electronics.  

• Should mention about VNAND in introduction. Your algorithm can be extended to VNAND?
• Should add the benchmarking table (performance comparison) including previous reported algorithm with references.
• How authors can extract data. Where from the raw data of NAND Flash? Need to explain the method.

Minor comment: IO à I/O or I/O à IO (use one) in abstract

Author Response

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Reviewer 3 Report

The manuscript represents a new page replacement algorithm, called Probability-based Adjustable LIRS (PA-LIRS) for NAND flash memory. PA-LIRS completely exploits the “recency” and” frequency” information simultaneously for making a replacement decision. The algorithm dynamically adjusts the parameter based on the workload pattern to further improve the I/O performance of NAND Flash. The experiments are well designed, but some figures need to be moved to supporting information. The experimental results are drawn in messy graphs, there should be clarifies in scientific drawing. Also number of graphs are so much for a manuscript.

Considering the reviewer’s comments and a thorough proof reading the manuscript will be acceptable.

Author Response

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Round 2

Reviewer 1 Report

Many of my concerns are addressed in the revised manuscript except that the experiments for the real traces with the reason of lack of time for deadline.

But, I'm afraid their idea haven't been properly validated because experiments for real data traces have not been added.

Author Response

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Author Response File: Author Response.pdf

Round 3

Reviewer 1 Report

The contribution of the paper will be more clearly revealed by describing  percentage of the performance improvement for the results of real trace.