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Article

Memristive and Memory Impedance Behavior in a Photo-Annealed ZnO–rGO Thin-Film Device

by
Gian Carlo Cardarilli
1,
Gaurav Mani Khanal
1,*,
Luca Di Nunzio
1,
Marco Re
1,
Rocco Fazzolari
1 and
Raj Kumar
2
1
Laboratory of Microelectronics and VLSI Architectures For DSP, Department of Electronics Engineering, University of Rome “Tor Vergata”, Via Del Politechnico 1, 00133 Rome, Italy
2
Department of Physics, Centre for Materials Science and Nanotechnology, Faculty of Mathematical and Natural Sciences, University of Oslo, 0316 Oslo, Norway
*
Author to whom correspondence should be addressed.
Electronics 2020, 9(2), 287; https://doi.org/10.3390/electronics9020287
Submission received: 6 December 2019 / Revised: 28 January 2020 / Accepted: 5 February 2020 / Published: 7 February 2020
(This article belongs to the Section Semiconductor Devices)
Browse Figures
Versions Notes

Abstract

:
An oxygen-rich ZnO-reduced graphene oxide (rGO) thin film was synthesized using a photo-annealing technique from zinc precursor (ZnO)–graphene oxide (GO) sol–gel solution. X-ray diffraction (XRD) results show a clear characteristic peak corresponding to rGO. The scanning electron microscope (SEM) image of the prepared thin film shows an evenly distributed wrinkled surface structure. Transition Metal Oxide (TMO)-based memristive devices are nominees for beyond CMOS Non-Volatile Memory (NVRAM) devices. The two-terminal Metal–TMO (Insulator)–Metal (MIM) memristive device is fabricated using a synthesized ZnO–rGO as an active layer on fluorine-doped tin oxide (FTO)-coated glass substrate. Aluminum (Al) is deposited as a top metal contact on the ZnO–rGO active layer to complete the device. Photo annealing was used to reduce the GO to rGO to make the proposed method suitable for fabricating ZnO–rGO thin-film devices on flexible substrates. The electrical characterization of the Al–ZnO–rGO–FTO device confirms the coexistence of memristive and memimpedance characteristics. The coexistence of memory resistance and memory impedance in the same device could be valuable for developing novel programmable analog filters and self-resonating circuits and systems.

1. Introduction

Metal–oxide-based memristive devices have attracted much attention due to their ability to process and store information with minimum power requirements, and for this reason, soon, they could replace transistor-based flash memory [1,2,3,4,5,6,7]. Memristors can be integrated into a highly dense crossbar network array to implement the interconnection of a high number of CMOS neurons emulating spike-based learning [8,9,10,11,12,13,14,15].
A Memory Resistor, or Memristor, is a two-terminal device theoretically postulated by L. Chua in 1971 [16]. Memristors are variable resistors with the ability to store/memorize their previous resistive value. The resistance of a memristor, known as Memristance, can be controlled by varying the polarity and/or magnitude of the input (voltage or current). Correspondingly, we obtain a voltage or current-controlled memristor. The most important characteristic of the memristor is the pinched hysteresis loop in its current–voltage (I−V) curve, when the device is connected to a varying input voltage or current, pinched hysteresis makes a memristor a passive and fourth fundamental circuit element besides the resistor, capacitor, and inductor [9,10,17].
The voltage-controlled memristor is described by Equations (1) and (2) [18]:
I M R = M G ( w , V M R , t ) V M R
w = f ( w , V M R , t )
where IMR and VMR are the input current and voltage to the memristor, respectively. MG and MR represent the memconductance and the memristance, respectively. Finally, w is a parameter that takes into account the internal structure of the memristor. Similarly, the current-controlled Memristor is described by Equations (3) and (4) [18].
V M R = M R ( w , I M R , t ) I M R
w = f ( w , I M R , t )
Recently, many reports [19,20,21,22,23,24] have experimentally demonstrated that memristive, memcapacitive, and meminductive behavior coexist in the same single nano-sized memristive device. Published reports have shown and argued that it is possible to achieve memristive and memimpedance behavior on a single nano-device by varying the frequency of the input signal or by varying the input sweep rate (V/s).
The memristor is a Metal–Insulator–Metal (MIM) structure device, as shown in Figure 1. A thin layer of insulator or semiconductor material (also called active layer or storage layer) is sandwiched between the two metal electrodes. Memristive devices with a layer thickness of few nanometers and low operating voltages with switching energy of few femtojoule (fJ) have been successfully implemented [25,26].
Among the available materials for memristor and memristive devices, zinc oxide (ZnO) and its composite has some unique advantages: nontoxic and easy synthesis, high ion mobility, excellent resistance switching property, and relatively low set and reset voltages. In recent years, ZnO and its composites have been extensively used to fabricate memristive devices [19,22,27,28]. In previous works, the high-temperature thermal annealing process was used for creating vacancies within the ZnO thin film [29,30,31]. This approach limits the applications of ZnO and ZnO composite thin film for the development of ReRAM (Resistive RAM) and flexible memristive devices.
In this work, we propose a low-temperature, low-cost, facile- and electro-forming-free memristive device based on zinc precursor (ZnO)–reduced graphene oxide (rGO) composite thin film sandwiched between aluminum (Al) as a top electrode (TE) and fluorine-doped tin oxide (FTO) as a bottom electrode (BE).
The experimental results show the presence of memimpedance behavior in the ZnO–rGO thin film memristive device. Memreristive and memimpedance behavior can be simultaneously controlled by varying the input stimulus sweep rate. These results could open a way for the fabrication of new low-cost nano-devices that can be used as memristor, as well as memimpedance, devices for developing adaptive analogue circuits applications.

2. Materials and Methods

The thin film used for this work is the same as described in [32,33]. The required chemical zinc acetate dehydrate, ethanol, and ethanolamine were obtained from Sigma Aldrich. Graphene oxide powder (1 gm) was received from Abalonyx (Norway). All of the reagents were of analytical grade and used as such. Zinc acetate dehydrate and ethanolamine in equal fraction were added to ethanol and stirred at 60 °C for 30 min. Graphene oxide (GO) (0.1 mg/ml) was added to the as-prepared solution and kept under constant stirring for 24 h. ZnO sol–gel solution was prepared in a similar way, without the addition of graphene oxide.
The dip-coating technique was used for the deposition of the as prepared ZnO–rGO composite onto the FTO-coated glass substrate. The thickness and uniformity of the thin film were supervised by controlling the dipping speed and repetition of the coating process. In our work, we repeated the coating process twice to obtain a uniform thin film of about 80 nm. After the deposition process, the devices were exposed to deep UV irradiation with the main line at 254 nm (90%) and secondary line at 185 nm (10%) for about 5 h.
A Scanning Electron Microscopic image of the prepared ZnO-rGO thin film is shown in Figure 2. The photo-annealed ZnO–rGO composite thin film shows a wrinkled surface structure evenly distributed in the entire film surface area. The formation of wrinkles in the composite film is suggested due to the removal of epoxy and hydroxyl groups during the annealing process [34,35,36].
The crystallinity of pure ZnO and ZnO–rGO composite thin film was studied via an X-ray diffraction (XRD) pattern. XRD was performed on both the thin films by using a RIGAKU−Geigerflex diffractometer with a copper (Cu) anode to generate Cu Kα radiation (α = 1.5406 A˚). The diffraction pattern was studied in the 2θ range of 10–80°. Figure 3a,b shows the diffraction patterns for the two prepared thin films, (a) ZnO and (b) for ZnO–rGO film. The observed characteristic peaks for the ZnO sample, as shown in Figure 3a, correspond to (002), (101), and (103) crystal planes at 34.4°, 36.3°, and 62.9° (2θ), respectively, while the diffraction peaks for the crystal plane (002) at 34.4° of a sample ZnO–rGO is shown in Figure 3b. This suggests that the crystalline ZnO in both of the samples has a hexagonal wurtzite crystal structure with a c-axis orientation [24]. The widespread peak at 34.4° (2θ) in Figure 3 is most probably due to the small grain size of the nanoparticles. Moreover, in Figure 3b, another peak is visible at 24.4° (2θ); this characteristic peak corresponds to the (002) crystal plane of rGO. Since, in Figure 3b, there are no other diffraction peaks. Therefore, it is used to convey that the GO has been fully reduced to rGO [36].
A 1 × 1 mm and 150-nm-thick Al top electrode was deposited by RF magnetron sputtering. The substrate was not heated during the top contact deposition process. The Al/ZnO–rGO/FTO device structure and device’s memristive switching phenomenon is discussed and explained in Section 4. FTO forms an ohmic contact with the ZnO–rGO film. Hence, FTO-coated glass is used as the BE.

3. Electrical Characterization

The electrical characterization was done using a Keithley 2612 source meter. The Al TE electrode was connected to the HI connector and the FTO BE electrode was connected to the LO connector of the source meter. The experiment measurement setup is shown in Figure 4.
Firstly, to measure the parasitic effects of the measurement setup (due to the probe or source meter non-ideal input stage), I–V measurement was done for the purely FTO-coated conductive sample. The obtained result is shown in Figure 5; the I–V curve confirms that the parasitic effects due to the experimental measurement set up and FTO substrate are negligible and will not considerably affect the memristor I–V measurements results.
Voltage sweeps in the range ±5 V were applied to the device with a voltage step size of 0.1 V (current limit 100 mA) at a sweep rate of 0.5 V/s. The I–V characteristic curve of the device is summarized in Figure 6. The change in the device resistance regions are the following:
  • The source meter starts to increase the voltage from −5 V toward 0 V, and the output current is very small.
  • After passing 0 V, the output current starts to increase linearly.
  • At Vset = +4.5 V, the device switches to the low resistive state (LRS), and after 4.5 V, the output current increases sharply (up to 5 V).
  • Voltage starts reducing from +5 V toward 0 V, and the output current decreases linearly.
  • Then, the polarity of the input voltage (below 0 V toward −5 V) is changed, and the output current decreases sharply.
  • At Vreset = −2.5 Vm, the device switches to a high resistive state (HRS).
To test the stability of the device, I–V measurements were recorded for 100 consecutive ±5 V voltage cycles. The multiple voltage sweeps’ I–V measurement result is shown in Figure 7; the device shows good stability and very little variation in switching characteristics.
The I–V curve is not a perfect pinched hysteresis curve, which suggests that the device has some energy stored at 0 V. Replotting of the I–V curve in semilog scale shows more clearly a picture for non-zero crossing of the I–V curve (Figure 8). Due to the non-zero crossing hysteresis loop, this device falls into the non-ideal or extended memristor class, as detailed in [20,21,37,38,39].
The I–V curve for the ZnO–rGO device at different input voltage sweep rates (1.5, 2.5, 3.5, and 5 V/s) are summarized in Figure 9a–d, respectively. The following observations were made based on the results obtained during our experiment.
  • With the increment in voltage sweep rate from 0.5 to 1.5 V/s (Figure 9a), the crossover point of the I–V curve shifts from the origin and moves slightly into the first quadrant of the I–V plane.
  • With further increment in the sweep rate to 2.5 V/s, the I–V crossover point moves higher into the first quadrant (Figure 9b).
This shift of the crossover point from the origin toward the first quadrant is related to the simultaneous occurrence of a memristive and memcapacitive effect in the nano-device, as reported in [20,21,40].
3.
Continuing the increase in the voltage sweep rate from 2.5 to 3.5 V/s, the I–V crossover point now drifts down toward the third quadrant of the I–V plane (Figure 9c).
4.
Finally, increasing the scan rate to 5 V/s, the crossover points move completely into the third quadrant, and the curve also shows a second crossover point at around −2.5 V (Figure 9d) near to Vreset of Figure 6.
This behavior is related to the simultaneous existence of a memristive and meminductive effect occurring within the nano-device, as also reported in [20,21,40].

4. Resistive Switching Mechanism

The switching mechanism of a memristive device depends heavily on the selected material for the sandwiched active layer and for the metal electrode.
The operating mechanism of the ZnO–rGO thin film memristive device is filamentary (i.e., the formation and breaking of conductive filaments (CFs) between TE and BE). The filamentary-based switching in ZnO devices has been reported previously in different works in the literature [40,41,42,43,44,45,46].
The bipolar switching response of the Al–ZnO–rGO–FTO device can be attributed to the formation and rupture of CFs consisting of oxygen vacancies created during the photo-annealing process.
The vacancies move along the thin film under the influence of the applied electric field, thereby creating or dissolving the current conduction paths between TE and BE, as shown in Figure 10. With TE positive and BE connected to the ground, oxygen vacancies move toward BE and create a conduction path between BE and TE, turning the device ON (low resistive state (LRS)). Whereas, reversing the polarity of the applied voltage (i.e., making BE positive with respect to TE), the vacancies drift away from BE toward the TE, thereby disturbing the conduction path and turning the device OFF (high resistive state (HRS)).
In many of the oxide-based memristive devices, an added process known as electro-forming is used to activate the device. This is because pristine state oxide materials generally have a low density of defects such as vacancies or interstitials. In the electro-forming process, a high voltage with suitable compliance current is first given to the device to create the free vacancies in the active layer. This forming process is an undesirable process, especially for neuromorphic and non-volatile memory applications [28,46,47]. In our device, this electro-forming step is not needed because enough vacancies for initiating the switching operation are created in the thin film via photo annealing.
As discussed, the formation or dissolution of the CFs is due to the input voltage-controlled movement of the oxygen vacancies. Therefore, the resistive state of the device can easily be controlled by applying a different voltage within the range of Vset and Vreset; for an input voltage value, the device will capture a unique resistive state between LRS and HRS. These multiple resistive values are attributed to the strength of the CF formation. A strong conductive path between TE and BE will switch the device into its LRS. Similarly, a weak conductive path will make the device switch to its HRS.
Therefore, for our device, it is safe to say that the distance between the filament and the bottom electrode edge determines the resistive state of the device.
The formation and dissolution of CFs between TE and BE is a reconfigurable process. Hence, simply by changing the polarity or magnitude of the input voltage, it is possible to control the instantaneous state of the memristive device.

5. Results and Discussion

The stable bipolar switching characteristic can be explained by the movement of the oxygen ions within the oxide bulk under the influence of the applied electrical field. During positive bias (i.e., TE connected to a positive voltage), oxygen ions from the bulk are attracted toward TE, creating free oxygen vacancies in the bulk film that form the CFs. As the positive voltage at TE increases, more ions are pulled up from the oxide bulk, leaving behind enough vacancies to complete the conduction path and forcing the device to its LRS.
During the negative biasing phase (i.e., when the TE electrode is connected to a negative voltage), oxygen ions from the TE interface are pushed back into the oxide bulk. The further increment in negative potential pushes the oxygen ions to recombine with the oxygen vacancies. Assisted by joule heating, more ion–vacancy recombination takes place disturbing the CF bridge, forcing the device to nonconductive HRS.
In our device, the best Roff/Ron ratio is approximately 40, which is measured at 4.7 V (Figure 7). The output current is relatively high (i.e., 0.04 A for 4 V) for the discrete device. This high current could be due to the large TE area; indeed, the dependency of memristive device operation on the top electrode material and area is well studied and documented [34,45,46,47,48,49]. The I–V characteristics of the device depend on the input voltage sweep rate [22]. The non-zero crossing I–V implies that there is some charge stored in the device, suggesting that the device has memory impedance at the nano scale, which naturally coexists with memristive behavior. The frequency-dependent behavior of memristive devices and systems has been well studied. It is a well-known phenomenon that could be explained based on the charge equilibration process [17,19,20,21]. At the microscopic level, when a current flow in a resistor, charge accumulation occurs on one side of the resistor, with the corresponding depletion layer at the other end due to the scattering of the carriers at the interfaces, thereby creating resistive dipoles. The dipole formation process is dynamic and appears as a resistance change [50]. The dipole formation process takes some time and is associated with some energy storage with respect to the capacitance of the system.
Therefore, at high frequency (for frequencies greater than or equal to the inverse of time of charge equilibrium process), the system does not get enough time to create the stable local resistive dipoles, and hence, does not show an apparent resistive change or a pinched hysteresis loop [10]. This behavior is attributed to the coexistence of memristive, memcapacitive, and meminductive effects occurring simultaneously in the device, as also reported [20,21].
Note also that at a low scan rate, the hysteresis loop area is large, and a clear switching is observed in Figure 6. The hysteresis area reduces significantly with an increase of the scan rate, while at higher sweeping rates, the resistive switching (memristive) behavior is affected by the appearance of memory impedance (capacitive or inductive) effects, as shown in Figure 8.
As discussed before, the time-dependent state of a memristor device changes in response to the alternating input signal, and is accompanied by time-dependent resistive, as well as a reactance change. Therefore, in reference [51], the authors have suggested a more general equation 5, 6, 7, and 8 for the change in the state of nanoparticle memristive systems.
The positive and negative regions of the I−V curve are re-plotted in the double log coordinates to understand the memristive behavior of our device. Figure 11 displays the positive voltages, while Figure 12 shows the negative voltages. Different carrier transport models were used to fit the double log curve. Primary models that were used were Fowier–Nordheim (F–N) tunneling, thermionic emission, Poole–Frenkel emission, Schottky emission, and space-charge-limited conduction (SCLC).
The above-mentioned conduction mechanism (SCLC) (I α aV2, where a is the slope of the curve) is a better fit for our device I–V. Ohmic conduction (I α V ) is dominant for the low voltage region between 0 and ±3 V of the device I–V curve for both positive and negative sweep voltages. The conduction mechanism for voltages beyond ±3 V is different. The high voltage conduction region can be divided into three different regions of SCLC conduction theory.
Initially, the conduction is linear (I α V) (a = 1) until all of the open traps in the active layer are filled up by the injected carries (linear region in Figure 11 and Figure 12).
The current starts to increase slowly (I α V1.3), until the deep traps are also filled. This corresponds to a SCLC region in Figure 11 and Figure 12.
Lastly, all the trap centers are filled with the injected carriers and space charge accumulates, which sharply increase the current, and the response follows a strong SCLC, which is known as trapped charge-limit current (TCLC) slope a = 2.5 (TCLC region in Figure 10 and Figure 11).
The increase and decrease of the current with respect to the change in the input voltage, as shown in Figure 10 and Figure 11, indicate the process of charge carriers trapping and releasing. Therefore, the bipolar switching behavior of the device can be attributed to the charge trapping–detrapping process, which is commonly known as the trap-controlled SCLC conduction mechanism. The SCLC conduction mechanism has been observed in many ZnO-based memristive devices [44,52,53,54].

6. Conclusions

In this work, we fabricated a low-cost, facile, and photo (UV)-activated ZnO–rGO thin film memistive device. The device exhibits symmetric bipolar re-configurable resistive change behavior with an OFF–ON ratio of 40. The SCLC was established to be the current conduction mechanism for the ZnO–rGO device. It is argued based on the experimental results (via the electrical characterization) that memristive, memcapacitive, and meminductive effects coexist naturally in the ZnO–rGO thin film memristive device.
Since the device shows a re-configurable coexistence of memresistive and memimpedance effects, it could be useful for making adaptive analogue circuits. Moreover, we believe that the device performance at high frequency could be further enhanced by choosing high-electron-mobility materials such as pure graphene as the active layer between the two electrodes and/or by reducing the thickness of the ZnO–rGO thin film to <40 nm [20,55].

Author Contributions

G.M.K. conceptualized, investigated, resourced, and wrote the original draft; G.C.C. supervised the work; L.D.N., R.F., and M.R. supported in performing the electrical measurements, and reviewing and editing of the written work; finally, R.K. analyzed and validated the material properties. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Acknowledgments

We are thankful to Abalonyx AS, Norway, for providing the high-quality graphene oxide used in this work.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Memristor device structure. TE, top electrode; BE, bottom electrode; FTO, fluorine-doped tin oxide; ITO, Indium-doped tin oxide.
Figure 1. Memristor device structure. TE, top electrode; BE, bottom electrode; FTO, fluorine-doped tin oxide; ITO, Indium-doped tin oxide.
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Figure 2. SEM image deep UV prepared zinc precursor (ZnO)–rGO thin film. rGO: reduced graphene oxide.
Figure 2. SEM image deep UV prepared zinc precursor (ZnO)–rGO thin film. rGO: reduced graphene oxide.
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Figure 3. XRD pattern of (a) ZnO thin film and (b) ZnO–rGO thin film.
Figure 3. XRD pattern of (a) ZnO thin film and (b) ZnO–rGO thin film.
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Figure 4. Setup block diagram for current–voltage (I–V) measurements.
Figure 4. Setup block diagram for current–voltage (I–V) measurements.
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Figure 5. Benchmark test result for parasitic effects due to the -V measurement set-up: I–V curve for the FTO sample.
Figure 5. Benchmark test result for parasitic effects due to the -V measurement set-up: I–V curve for the FTO sample.
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Figure 6. Device I−V plot, for a DC sweep cycle in the range ±5 V at a sweep rate of 0.5 V /s. The arrow shows the direction of the current.
Figure 6. Device I−V plot, for a DC sweep cycle in the range ±5 V at a sweep rate of 0.5 V /s. The arrow shows the direction of the current.
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Figure 7. Device I−V plot, for a 100 continuous DC sweep cycle in the range of ±5 V at a sweep rate of 0.5 V/s.
Figure 7. Device I−V plot, for a 100 continuous DC sweep cycle in the range of ±5 V at a sweep rate of 0.5 V/s.
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Figure 8. I–V curve in semilog scale.
Figure 8. I–V curve in semilog scale.
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Figure 9. I–V plot at different sweep rates. (a) I–V at a sweep rate of 1.5 V/s. (b) I–V at a sweep rate of 2.5 V/s. (c) I–V at a sweep rate of 3.5 V/s. (d) I–V at a sweep rate of 5 V/s.
Figure 9. I–V plot at different sweep rates. (a) I–V at a sweep rate of 1.5 V/s. (b) I–V at a sweep rate of 2.5 V/s. (c) I–V at a sweep rate of 3.5 V/s. (d) I–V at a sweep rate of 5 V/s.
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Figure 10. Switching mechanism for the Al–ZnO–rGO–FTO device.
Figure 10. Switching mechanism for the Al–ZnO–rGO–FTO device.
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Figure 11. I–V curve double log scale for positive voltage 0 V → 5 V → 0 V.
Figure 11. I–V curve double log scale for positive voltage 0 V → 5 V → 0 V.
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Figure 12. I–V curve double log scale for negative voltage −5 V → 0 V → −5 V.
Figure 12. I–V curve double log scale for negative voltage −5 V → 0 V → −5 V.
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MDPI and ACS Style

Cardarilli, G.C.; Khanal, G.M.; Di Nunzio, L.; Re, M.; Fazzolari, R.; Kumar, R. Memristive and Memory Impedance Behavior in a Photo-Annealed ZnO–rGO Thin-Film Device. Electronics 2020, 9, 287. https://doi.org/10.3390/electronics9020287

AMA Style

Cardarilli GC, Khanal GM, Di Nunzio L, Re M, Fazzolari R, Kumar R. Memristive and Memory Impedance Behavior in a Photo-Annealed ZnO–rGO Thin-Film Device. Electronics. 2020; 9(2):287. https://doi.org/10.3390/electronics9020287

Chicago/Turabian Style

Cardarilli, Gian Carlo, Gaurav Mani Khanal, Luca Di Nunzio, Marco Re, Rocco Fazzolari, and Raj Kumar. 2020. "Memristive and Memory Impedance Behavior in a Photo-Annealed ZnO–rGO Thin-Film Device" Electronics 9, no. 2: 287. https://doi.org/10.3390/electronics9020287

APA Style

Cardarilli, G. C., Khanal, G. M., Di Nunzio, L., Re, M., Fazzolari, R., & Kumar, R. (2020). Memristive and Memory Impedance Behavior in a Photo-Annealed ZnO–rGO Thin-Film Device. Electronics, 9(2), 287. https://doi.org/10.3390/electronics9020287

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