Efficient Power Conditioning: Enhancing Electric Supply for Small Satellite Missions

Abstract

Electric power supply (EPS) is the heart of any aerospace mission and plays an important role in improving the performance and service lifetime of spacecraft. It generates, converts, stores, and distributes power to different voltage levels. The EPS is composed of solar panels, a power conditioning unit (PCU), batteries, and a power distribution unit (PDU). This paper describes the design and analysis of an efficient power conditioning system for a CubeSat standard small satellite. For this purpose, the aim of this paper is to propose a two-input maximum power point tracker (MPPT)-based interleaved boost converter. The design copes with the fact that when a satellite revolves around the Earth, a single panel or at most two panels face solar radiation at different angles. In order to extract maximum power from the panels, the designed converter drives the solar panels at the maximum power point (MPP). A small signal model is drawn for the converter, and the closed-loop gain of the converter is analyzed using a Bode diagram. To improve the phase margin and gain, a PID compensator is designed and added to the closed loop of the converter. Finally, the performance of the proposed converter is validated by the simulation results.

1. Introduction

Satellites have always been considered to be an extremely expensive and risky business that not only requires extensive knowledge and expertise in the field but also a huge budget [1]. Consequently, space exploration has only been accessible to countries that have had the required financial and sophisticated technological resources [2]. The responsibility of carrying out space missions was mainly under the jurisdiction of powerful space agencies such as NASA, ESA, CNSA, JAXA, ROSCOSMOS, and ISRO. These space research organizations, being governmental institutions, carried out societal functions such as being carriers of knowledge and education and promoting advanced technology [3]. With the passage of time, many universities and SMEs (Small/Medium Enterprises) emerged and entered this market with the objective of organizing space missions at a fraction of the cost, accepting the failure risk in space exploration due to cheaper production and shorter development periods [4]. At present, several private companies, such as SpaceX, Rocketplane Kistler, Blue origin orbital, and Sierra Nevada space systems Sciences Corp., are providing Commercial Orbital Transportation Services, which further decrease the cumulative cost. The latest result of their efforts is the CubeSat concept: a small satellite with cube units with dimensions of 10 cm³, built using COTS components [5,6,7]. Low-cost design techniques played an important role in the aerospace market’s growth in the previous decade, and they can still play a major part in future developments [8,9,10].

The primary functions of a spacecraft’s EPS are the proper conditioning and transmission of the generated power from the energy source to the batteries and subsystems [11,12]. The EPS is one of the integral parts of a satellite and performs power harvesting, power conversion, power storage, and power distribution functions for the other subsystems of the satellite [13,14]. The mechanical and electrical design of the EPS requires an in-depth understanding of the mission requirements and consideration of issues such as electromagnetic interference, energy balance over life, electrostatic discharge immunity, corona, single-component failures, redundancy, autonomous operation, thermal design margins, and fault recovery [15]. Different from other applications involving storage systems (such as microgrids [16,17,18,19], charging stations [20,21,22], and residential systems [23,24]), solar panels are not at maximum because of the spacecraft’s relative position (eclipse phase) over time with the sun and Earth. Therefore, one of the key elements involved in increasing the lifespans of the batteries is controlling and monitoring the battery charge cycling curve, as detailed in [25]. In a low Earth orbit (LEO) application, battery charging must be completed in one hour, and during its life, it will usually experience 30,000 to 50,000 cycles. The overcharging of batteries must not take place, and the depth of their overcharge must be under the threshold for the extension of the battery’s life. The solar array output characteristics must be matched to the satellite bus and the batteries [26]. The spacecraft turns on its transmission and payload at specific locations above the Earth depending on the satellite constellation. In other words, the spacecraft’s subsystems do not require constant power at all stages during its mission life, so a direct energy transmission system is not suitable in this case. Therefore, an efficient PCU is needed to control and monitor the power management of the EPS. The main focus of this paper is to design a converter that can extract power from two solar panels at a time. In the literature on two-input converter designs, one input is taken as a solar panel while another input is taken from the batteries [27]. Refs. [28,29] discussed PCUs for space applications; however, the redundancy features with the associated size were neglected. So, the second focus of this paper is to extract maximum power from the solar panels with added redundancy features. For this purpose, an MPPT-based interleaved boost converter is designed. Many MPPT techniques are available in the literature, i.e., constant voltage (CV), perturbation and observation (PO), the incremental conductance (IC) method, etc. [30]. In this paper, a CV MPPT technique is used, which is very simple and reasonably efficient compared to other techniques [31]. As single-phase topology used to be the norm for small satellite power management systems, inspired by multistage interleaved topology, this paper endeavors to explore this approach in small satellite applications to achieve efficient design along with reduced ripples.

2. Converter Design

The PCU is mounted with the Attitude Determination and Control Subsystem (ADCS) onto a single PCB of the satellite. The new modular approach makes use of a standardized module, as can be seen in Figure 1. Photographs of 1U CubeSat submodules and the ISIS-1 Unit CubeSat structure are shown in Figure 1. The cross-sectional view of the CubeSat module shows that the solar panels are mounted at the top of the PCB, the reconfigurable magnetorquer traces are embedded inside the PCB internal layers and the power management subsystem and its coil driver are mounted at the bottom of the PCB [32,33]. This design optimization significantly reduces the satellite’s footprint, consequently decreasing both its weight and overall cost. The previous power management architecture based on single-phase topology is detailed in reference [34], while the integrated ADCS is comprehensively described in reference [35].

When one panel is at a right angle to solar radiation, it receives maximum sunlight, and the output voltage of the panel is 6.6 V. When two panels are positioned at 45° to the sunlight, some of the cells are unable to receive adequate solar radiation, resulting in a reduction in output voltage. In the case of three panels, the output voltage decreases further. It is assumed that the panel output voltage varies from 2 V to 6.6 V. This variable output from the solar panels is fed into a converter to transform it to the PDB level. Normally, the input dynamic range of the converter is very low, making it impossible for a single converter to cover this wide input range to the PDB level.

The block diagram of the MPPT-based interleaved converter system is shown in Figure 2. The converter consists of two parallel blocks, labeled converter-1 and converter-2. Converter-1 has an input range from 2.2 V to 4.4 V, while converter-2 has an input range of 4.4 V to 6.6 V. A block diagram of the designed EPS is presented in Figure 3a. The conventional schematic design from [34], with added redundancy for the PCM module, is illustrated in Figure 3b. The schematic of the proposed MPPT-based interleaved boost converter, featuring similar redundancy and the same output characteristics but with fewer electronic components, is designed to convert the variable output of the solar panels (2.2 V to 6.6 V) to the PDB voltage level (14 ± 2 V), as shown in Figure 3c.

2.1. Schematic Design Description

The PCM supervises battery charging, voltage regulation, and overall health monitoring of various subsystems. It regulates the unstable voltage (2 V to 6 V) to a stable voltage level suitable for the power distribution bus (PDB) (14 ± 2 V). To drive the solar panels at their maximum power point (MPP), an efficient interleaved boost converter is designed and simulated. The MPPT boost converter can be implemented using various techniques, as described in [30]. Based on considerations of efficiency and computational simplicity, the constant voltage method is selected for the design of the PCM [31]. The solar power density at low Earth orbit (LEO) is approximately 1366 W/m², and the average day for a satellite is about 60% of the total revolution time (with a 40% eclipse period). During its rotation around the Earth, one, two, or at most three panels (when one corner of the satellite faces the sunlight) are exposed to solar radiation.

The conventional redundant design of the PCM consists of four redundant and modular MPPT submodules. Each boost converter is connected to a local microprocessor (MSP430) that has various housekeeping sensors. While this design is effective for single-component failures, it increases the cost, size, and mass of the power management tiles. To address the solar panel input variations while reducing costs, mass, and size, a single MPPT-based interleaved converter is designed.

The battery charging system is controlled through redundant power bus lines interfaced with the PDB via a DB-9 connector [36,37]. The central PCM ‘PIC24’ controller communicates with the onboard computer (OBC) subsystem for power management and operations of the entire module. ‘PIC24’ communicates with the OBC using a dual-redundant Controller Area Network (CAN). The casing dimensions of the PCM include standardized connector interfaces (input/output power/signal), making the system completely modular and adaptable to Plug-and-Play (PnP) features, requiring minimal user intervention.

Low-cost passive voltage and temperature sensors are utilized to manage power consumption and maintain the thermal envelope within design requirements. A high-side bidirectional current sensor is installed at the battery input to monitor the battery charge cycling curve. Additionally, current and voltage sensors are employed at the output of the solar power unit (input to the proposed interleaved converter).

The MPPT controller (PIC24) communicates with the OBC via SPI protocol through its own transceiver and redundant CAN buses. The PCM monitors the health of the batteries, solar panels, and power distribution module, providing sufficient telemetry to the OBC through the CAN interface.

For power interfacing, the PCM receives two redundant power inputs from four independent solar panels through two D-type connectors. The PCM power distribution bus supplies an unregulated voltage level of 14 ± 2 V, which the PDM converts into various regulated voltage levels. To monitor power flow, each redundant input line from the PCM is equipped with a current sensor, while a single voltage sensor tracks the PDB’s voltage level. These sensors ensure proper monitoring of the current drawn by the PDM and the voltage supplied by the PDB. To ensure modularity, all input connectors are male and all output connectors are female.

Solar radiation makes CMOS-based COTS components prone to latch-ups. A latch-up is a transient effect that allows high current to flow through the device from the power supply to ground, short-circuiting the circuitry and potentially damaging the system. This issue can be mitigated by incorporating bipolar devices into the circuitry, as they offer immunity to latch-ups because a significant amount of energy is required to trigger such events. However, the microprocessors remain CMOS-based and still require latch-up protection circuits. To address this issue, a latch-up protection system is designed and simulated according to [34], reducing the likelihood of radiation-induced latch-ups in the PCM module. The same latch-up protection circuits used for the PIC MCU in the PDU/PCU are also implemented across other subsystems within the satellite. These circuits provide consistent protection against momentary latch-ups caused by solar radiation, ensuring safeguarding for the entire system, not just the MCU [34].

The EPS features four solar panels that cover multiple faces of the satellite. Each panel measures 16 × 16 cm², utilizing triple-junction GaAs CESI solar cells. The solar cells have an efficiency of 29%, generating 2.2 V with a current of 0.46 A, resulting in an output power of 1.012 W per cell. Each solar cell measures 70 × 40 mm² and occupies an area of 2800 mm². Given these dimensions, six solar cells are mounted on each panel, arranged in two strings of three cells in series, each with bypass diodes. A protection diode is connected at the end of the panel. The bypass diodes ensure the solar panel continues to operate effectively in the event of a single cell failure, while the protection diode safeguards the cells from reverse current flow from other satellite subsystems.

The solar panel outputs a voltage of 6.6 V with an output current of 0.96 A. Current and voltage sensors are mounted on the output power bus (voltage level of 6.6 V and current of 0.96 A) of the solar panel. Additionally, single current and voltage sensors are installed on the power distribution bus (PDB), which operates at a voltage level of 14 ± 2 V. An overvoltage protection circuit safeguards the PDB from excessive voltage conditions.

Energy is stored in a single pack of NiCd rechargeable batteries [38]. This pack consists of ten NiCd cells, each providing 1.2 V for a total of 12 V. The capacity of each NiCd cell is 0.9 Ah, resulting in a maximum available energy of 10.8 Wh, equivalent to 38.9 kJ. All these batteries are charged from the PDB, which, in turn, is powered by the four solar panels through a hysteretic switching boost converter. With an efficiency of 93%, the expected average power available at the PDB for recharging the batteries is 5.65 W. Consequently, the expected recharge time for a single cell is 1.91 h, while the recharge time for the entire system is 19.1 h. The worst-case efficiency (discharge energy/charge energy) of the battery, across the temperature range and radiation environment, is 80%, resulting in an average power of 8.64 W available for all electronic systems.

2.2. MPPT Based on Constant Voltage Technique

The MPPT is implemented in the interleaved boost converter using the hysteresis loop of the comparator. Typically, comparators have an internal hysteresis of 5 mV to 10 mV, which protects them from unwanted oscillations due to noise signals. To mitigate oscillations from noise signals above 10 mV, an external hysteresis of about 600 mV is added to the comparator.

The input switching voltage from the solar panel is variable. This incoming voltage is scaled by a resistive divider network and sent to the non-inverting input of the comparator. When this input voltage reaches 6.6 V, which is greater than the reference voltage ($V_{ref}$ = 6 V), the output of the comparator goes high and turns on the transistor. As a result, the voltage across the input filter capacitor $C_1$ decreases, leading to a reduction in the input voltage to the comparator. However, the output remains high until the input voltage drops below 6 V. Once the input falls below 6 V, the output of the comparator goes low, turning off the switching transistor. The difference between the two voltage limits—low (6 V) and high (6.6 V)—is referred to as the hysteresis window.

To calculate the values of the resistive network $R_1$, $R_2$, and $R_3$, the hysteresis window band $V_{HB}$ (with V_L = 6 V and $V_H$ = 6.6 V) is chosen, resulting in a range of 600 mV, and $V_{CC}$ = 10 V. For this calculation, we select a value for $R_3$ (in this case, $R_3$ = 1 MΩ).

$$R_1=R_3\left({\displaystyle \frac{V_{HB}}{V_{CC}}}\right)$$

(1)

From (1), the $R_1$ resistor value is $R_1$ = 20 kΩ.

The $V_{ref}$ value is found using (4)

$$V_H>V_{ref}\left(1+{\displaystyle \frac{V_{HB}}{V_{CC}}}\right)$$

(2)

which results in V_ref < 6.65 V, and the V_ref value of 6.6 V is chosen.

To find $R_2$, we rewrite the equation as

$$R_2={\displaystyle \frac{1}{\left[\left(\frac{V_H}{V_{ref}\times R_1}\right)-\left(\frac{1}{R_1}\right)-\left(\frac{1}{R_3}\right)\right]}}$$

(3)

This results in $R_2$ = 1123 kΩ. Using the same methodology, values for the converter-1 hysteresis comparator block are found.

2.3. Mathematical Model

The analysis of a two-level interleaved boost converter using the state space averaging technique involves examining the converter’s performance with a duty cycle ranging from 0.5 to 1. This assessment considers the impact of parasitic elements and explores the circuit’s behavior across four distinct operational modes.

In Mode-1, when switch S1 is closed and S2 is open, the inductor currents $I_{L1}$ and $I_{L2}$ exhibit specific behaviors as $I_{L1}$ rises and $I_{L2}$ falls.

By analyzing Figure 2 and applying Kirchhoff’s Voltage Law (KVL) and Kirchhoff’s Current Law (KCL), equations are derived and represented in matrix form for comprehensive analysis. Figure 4 depicts the modes of operation.

The state variables are $\left[\begin{array}{l}{i}_{L1}\\ i_{L2}\\ V_C\end{array}\right]$

$$\mathrm{A}1=\left[\begin{array}{ccc}-\left(r_{L1}+r_{s1}\right)/L1& 0& 0\\ 0& -\left[\left(r_{L2}+r_{d2}\right)+{\displaystyle \frac{R{r}_c}{R+r_c}}\right]/L2& -R/\left(R+r_c\right)L2\\ 0& R/C\left(R+r_c\right)& -1/C\left(R+r_c\right)\end{array}\right]$$

$$B1=\left[\begin{array}{ccc}{\displaystyle \frac{1}{L_1}}& 0& 0\\ {\displaystyle \frac{1}{L_2}}& 0& -{\displaystyle \frac{1}{L_2}}\\ 0& 0& 0\end{array}\right]$$

$$\mathrm{C}1=\left[\begin{array}{lll}0& {\displaystyle \frac{R{r}_c}{\left(R+r_c\right)}}& {\displaystyle \frac{R}{\left(R+r_c\right)}}\end{array}\right]$$

In Mode-2, both switches S1 and S2 are closed, resulting in a scenario where the inductor currents $I_{L1}$ and $I_{L2}$ are simultaneously increasing.

$$\mathrm{A}2=\left[\begin{array}{ccc}-{\displaystyle \frac{1}{L1}}\left(r_{L1}+r_{s1}\right)& 0& 0\\ 0& -{\displaystyle \frac{\left(r_{L2}+r_{S2}\right)}{L2}}& 0\\ 0& 0& -{\displaystyle \frac{1}{c\left(R+r_c\right)}}\end{array}\right]$$

$$B2=\left[\begin{array}{ccc}{\displaystyle \frac{1}{L_1}}& 0& 0\\ {\displaystyle \frac{1}{L_2}}& 0& 0\\ 0& 0& 0\end{array}\right]$$

$$\mathrm{C}2=\left[\begin{array}{lll}0& 0& {\displaystyle \frac{R}{\left(R+r_c\right)}}\end{array}\right]$$

In Mode-3, switch S1 is open while S2 is closed, leading to a situation where the inductor current $I_{L1}$ is decreasing, and $I_{L2}$ is increasing.

$$A3=\left[\begin{array}{ccc}-{\displaystyle \frac{1}{L1}}\left({\displaystyle \frac{\left(R{r}_C+\left(R+r_C\right)\left(r_{L1}+r_{d1}\right)\right)}{\left(R+r_C\right)}}\right)& 0& -{\displaystyle \frac{R}{L1\left(R+r_C\right)}}\\ 0& -{\displaystyle \frac{\left(r_{L2}+r_{S2}\right)}{L2}}& 0\\ {\displaystyle \frac{R}{C\left(R+r_C\right)}}& 0& -{\displaystyle \frac{1}{C\left(R+r_C\right)}}\end{array}\right]$$

$$B3=\left[\begin{array}{ccc}{\displaystyle \frac{1}{L_1}}& -{\displaystyle \frac{1}{L_1}}& 0\\ {\displaystyle \frac{1}{L_2}}& 0& 0\\ 0& 0& 0\end{array}\right]$$

$$C3=\left[\begin{array}{lll}{\displaystyle \frac{R{r}_c}{\left(R+r_c\right)}}& 0& {\displaystyle \frac{R}{\left(R+r_c\right)}}\end{array}\right]$$

In Mode-4, both switches S1 and S2 are closed, causing the inductor currents $I_{L1}$ and $I_{L2}$ to increase

$$\mathrm{A}4=\left[\begin{array}{ccc}-{\displaystyle \frac{1}{L_1}}\left(r_{L1}+r_{S1}\right)& 0& 0\\ 0& -{\displaystyle \frac{\left(r_{L2}+r_{S2}\right)}{L_2}}& 0\\ 0& 0& -{\displaystyle \frac{1}{C\left(R+r_C\right)}}\end{array}\right]$$

$$B4=\left[\begin{array}{ccc}{\displaystyle \frac{1}{L_1}}& 0& 0\\ {\displaystyle \frac{1}{L_2}}& 0& 0\\ 0& 0& 0\end{array}\right]$$

$$C4=\left[\begin{array}{lll}0& 0& {\displaystyle \frac{R}{\left(R+r_C\right)}}\end{array}\right]$$

Based on the premise that all switching cells carry an equal average current and are operated at the same duty ratio within a specific switching cycle, we can derive the following information:

$$d_{2i}={\displaystyle \frac{1}{N}}-d$$

(4)

$i=\mathrm{1,2}\dots \dots N$

$d$—Duty ratio

When the duty cycle d remains constant from one cycle to the next, it is referred to as the steady-state duty ratio D. The averaged state space model over a specific cycle can be expressed as

$$\dot{x}=Ax+B{V}_S$$

(5)

Applying (3) to the waveforms illustrated in Figure 2, we derive the following results:

$$A={\sum }_{j=1}^{2N}{d}_j{A}_j$$

(6)

$$B={\sum }_{j=1}^{2N}{d}_j{B}_j$$

(7)

$$C={\sum }_{j=1}^{2N}{d}_j{C}_j$$

(8)

where Aj and bj represent the state matrix and control vector for the duration of interval $djTs$, respectively.

And $j=\mathrm{1,2},\dots ,2N$.

Now, assuming that d = D, we can utilize (4) and (6) to express

$$A=D{\sum }_{i=1}^N{A}_{2i-1}+\left({\displaystyle \frac{1}{N}}-D\right){\sum }_{i=1}^N{A}_{2i}$$

(9)

Likewise, we can express (7) in a similar manner.

$$B=D{\sum }_{i=1}^N{B}_{2i-1}+\left({\displaystyle \frac{1}{N}}-D\right){\sum }_{i=1}^N{B}_{2i}$$

(10)

Similarly, we can write (8) similar manner.

$$C=D{\sum }_{i=1}^N{C}_{2i-1}+\left({\displaystyle \frac{1}{N}}-D\right){\sum }_{i=1}^N{C}_{2i}$$

(11)

Substitute $N=2$ in the above equations

$$A=\left(A_1+A_3\right)(1-D)+(2D-1)A_2$$

$$B=\left(B_1+B_3\right)(1-D)+(2D-1)B_2$$

$$C=\left(C_1+C_3\right)(1-D)+(2D-1)C_2$$

In the analysis of small-signal behavior, we assume that the duty cycle ddd varies from cycle to cycle. Equations (9)–(11), along with the perturbations in the input voltage, duty ratio, and states, are incorporated into Equation (5). By neglecting the non-linear second-order term, we derive the perturbed state-space equation for an N-phase interleaved converter.

$$\tilde{x}=AX+B{V}_S+A\tilde{x}+B\widetilde{V_S}+\left[{\sum }_{i=1}^N\left(\begin{array}{c}{A}_{2i-1}-\\ A_{2i}\end{array}\right)X+\right.\left.{\sum }_{i=1}^N\left(B_{2i-1}-B_{2i}\right)V_S\right]\tilde{d}$$

When all perturbations are assumed to be zero, we derive the steady-state model as follows:

$$X=-A^{-1}B{V}_S$$

Therefore, the small-signal model can be expressed as follows:

$$\tilde{x}=A\tilde{x}+B\widetilde{V_S}+\left[{\sum }_{i=1}^N\left(A_{2i-1}-A_{2i}\right)X+{\sum }_{i=1}^N\left(B_{2i-1}-\right.\right.\left.\left.B_{2i}\right)V_S\right]\tilde{d}$$

$$\tilde{x}=A\tilde{x}+B{\tilde{V}}_S+\left[\left(A_1+A_3-2A_2\right)X+\left(B_1+B_3-\right.\right.\left.\left.2B_2\right)V_S\right]\tilde{d}$$

Apply the Laplace Transform

$$s\tilde{x}(s)=A\tilde{x}(s)+B\widetilde{V_S}(s)+\left[\left(A_1+A_3-2A_2\right)X+\left(B_1+B_3-\right.\right.\left.\left.2B_2\right)V_S\right]\tilde{d}(s)$$

$$\tilde{x}(s)=[sI-A{]}^{-1}\left[B\widetilde{V_S}(s)+\left[\left(A_1+A_3-2A_2\right)X+\left(B_1+\right.\right.\right.\left.\left.\left.B_3-2B_2\right)V_S\right]\right]\tilde{d}(s)$$

$$K=\left[\left(A_1+A_3-2A_2\right)\right]$$

$$T=\left[\left(B_1+B_3-2B_2\right)\right]$$

$$\tilde{x}(s)=[sI-A{]}^{-1}\left[B{\tilde{V}}_S(s)+\left[(K)X+(T)V_S\right]\right]\tilde{d}(s)$$

$$\widetilde{v_O}(s)=C^T\tilde{x}(s)$$

$$\widetilde{v_O}(s)=C^T[sI-A{]}^{-1}\left[B\widetilde{V_S}(s)+\left[(K)X+(T)V_S\right]\right]\tilde{d}(s)$$

$$\widetilde{v_O}(s)=C^T\tilde{x}(s)$$

$$V_O=\left[\left(C_1+C_3\right)(1-d)+(2d-1)C_2\right]X$$

$$v_O=V_O+\widetilde{v_O},x=X+\tilde{x},d=D+\tilde{d}$$

$$v_{O=}\left(V_O+\widetilde{v_O}\right)=\left[\left(C_1+C_3\right)(1-(D+\tilde{d})+(2(D+\tilde{d})-\right.1C_2](X+\tilde{x})$$

$$v_{O=}\left(V_O+\widetilde{v_O}\right)=\left[\left(C_1+C_3\right)(1-D-\tilde{d})+\left(2D+2\tilde{d}-1\right)\mathrm{D}\right.\left.C_2\right](X+\tilde{x})$$

After the simplification of the above equation, we obtain the following:

$$\widetilde{v_0}=\left[\left(C_1+C_3\right)\left(1-D\right)+\left(2D-1\right)C_2\right]\tilde{x}+\left[\left(2C_2-C_1-\right.\right.\left.\left.C_3\right)X\right]\tilde{d}$$

$$P=\left[\left(C_1+C_3\right)\left(1-D\right)+\left(2D-1\right)C_2\right]$$

$$Q=\left(2C_2-C_1-C_3\right)$$

$$\widetilde{v_{O(s)}}=[P]\widetilde{x(s)}+[QX]\tilde{d}(s)$$

$$\tilde{x}(s)=[sI-A{]}^{-1}\left[B{\tilde{V}}_S(s)+\left[(K)X+(T)V_S\right]\right]\tilde{d}(s)$$

Substitute $\tilde{x}(s)$ in the voltage equation

$$\widetilde{v_O(s)}=P[sI-A{]}^{-1}\left[B{\bar{V}}_S(s)+\left[(K)X+(T)V_S\right]\right]\tilde{d}(s)+[QX]\tilde{d}(s)$$

Substitute $B\widetilde{V_S}(s)=0$

$$\widetilde{v_O(s)}=P[sI-A{]}^{-1}\left[(K)X+(T)V_S\right]\tilde{d}(s)+[QX]\tilde{d}(s)$$

In conclusion, the transfer function from the output to variations in the duty ratio can be represented as

$${\displaystyle \frac{\overline{v_O(s)}}{\bar{d}(s)}}=P[sI-A{]}^{-1}\left[\left(K\right)X+\left(T\right)V_S\right]+\left[QX\right]$$

(12)

2.4. Stability Analysis of the Converter Without a Compensator

The transfer function of converter-2 is given in (13), utilizing the feedback loop of converter-1 and -2

$$G_T(s)=G_c(s)G_{vd}(s)H(s)$$

(13)

where G_T(s) is the loop transfer function, G_vd(s) is the control-to-output transfer function, G_c(s) is the MPPT block transfer function, and H(s) is the attenuation network transfer function. In the case of converter-2, H(s) is a voltage divider network with an attenuation factor of 0.8, while G_c(s) has a value of 0.25. In order to find G_vd(s) for converter-2, a small signal model is drawn, as shown in Figure 5. This model is converted to a transformer model and all the elements are shifted to the load side. The resultant transfer function of the G_vd(s) is given in (14)

$$G_{vd}(s)={\displaystyle \frac{V}{D^{\mathrm{\prime }}}}{\displaystyle \frac{1+\frac{sLI}{V}}{1+\frac{L}{R{D^{\mathrm{\prime }}}^2}s+\frac{s^{2}LC}{{D^{\mathrm{\prime }}}^2}}}$$

(14)

Putting parameters values in (14) and inserting (14) into (13) results in G_T(s), as given in (15)

$$G_{vd}(s)=27{\displaystyle \frac{1+23\times 10^{-6}s}{1+25\times 10^{-9}s+123\times 10^{-9}{s}^2}}$$

(15)

Inserting the values of G_c(s), H(s) and G_vd(s) into (13) results in (16)

$$G_T(s)={\displaystyle \frac{9}{20}}{\displaystyle \frac{1+23\times 10^{-6}s}{1+25\times 10^{-9}s+123\times 10^{-9}{s}^2}}$$

(16)

The Bode diagram and step response of the loop transfer function in Equation (16), without a compensator, are shown in Figure 6 and Figure 7, respectively. Figure 6 indicates that the DC gain is very low (−6.9 dB), leading to a significant static error. Similarly, the phase margin at the crossover frequency is also low (180° − 165° = 15°), which results in instability for the system. Figure 7 illustrates that while the settling time is quite good (57 ms), the maximum overshoot is 84%, which is undesirable. Additionally, the gain crossover frequency is too low (3.47 kHz) compared to the switching frequency (27 kHz). These undesirable parameters will be taken into account during the compensator design.

2.5. Compensator Design

The compensator must meet the desired requirements of the feedback loop and effectively remove or at least mitigate the effects of all undesired parameters, such as ringing, overshoot, low phase margin, and high settling time. To achieve the desired results in the compensation loop for the proposed design, a PID controller is designed. The switching frequency of the converter is 55 kHz; therefore, the corner frequency (f_c) is set to one-tenth of the switching frequency (5.5 kHz). To attain a phase margin (θ) of 50°, the frequencies for the zeros (f_z) and poles (f_p1 and f_p2) should be determined as follows:

$$f_z\left(s\right)=f_c\sqrt{{\displaystyle \frac{1-\mathit{sin}\theta }{1+\mathit{sin}\theta }}}=1.73 \mathrm{k}\mathrm{H}\mathrm{z}$$

$$f_{p1}=f_c\sqrt{{\displaystyle \frac{1+\mathit{sin}\theta }{1-\mathit{sin}\theta }}}=17.44 \mathrm{k}\mathrm{H}\mathrm{z}$$

A higher pole frequency (f_p2) is selected 10f_c, while the low frequency (f_L) of the integrator is selected less than fc/10. The designed PID compensator is shown in Figure 8, and the compensator gain (G_c) is given by (17), where Gc is the compensator DC gain

$$G_c(s)=G_{c0}{\displaystyle \frac{\left(1+\frac{2\pi f_L}{s}\right)\left(1+\frac{s}{2\pi f_z}\right)}{\left(1+\frac{s}{2\pi f_{p1}}\right)\left(1+\frac{s}{2\pi f_{p2}}\right)}}$$

(17)

The component values of the compensator circuit shown in Figure 8 can be found from (10), where the frequencies values are already selected in (18).

$$G_{co}={\displaystyle \frac{R_2}{R_1}},f_L={\displaystyle \frac{1}{2\pi R_2{C}_{f2}}},f_{p1}={\displaystyle \frac{1}{2\pi R_1{C}_{in}}}$$

$$f_{p1}={\displaystyle \frac{1}{2\pi R_2{C}_{f1}}},f_{p1}={\displaystyle \frac{1}{2\pi (R_1+R_4)C_{in}}}$$

(18)

The Bode plots shown in Figure 9 give the complete response of the system after adding the compensator.

3. Simulation Results

The proposed converter’s performance is demonstrated through both steady-state and dynamic analyses, as depicted in Figure 10, Figure 11, Figure 12 and Figure 13. Each figure provides critical insights into the converter’s operation under different conditions.

Figure 10 presents the steady-state output voltage and current profiles. The results show that the converter maintains stable voltage and current levels under nominal operating conditions, confirming the system’s reliability. This stable performance is crucial for satellite missions, where a consistent power supply is essential.

Figure 11 provides a comparison of voltage and current ripples before and after implementing the proposed converter design. The converter achieves a 20% reduction in ripple, which is a significant improvement. Reduced ripples directly enhance the lifespan of connected components, such as batteries, by minimizing stress during charging and discharging cycles. Additionally, lower ripples allow for the use of smaller passive components, contributing to a more compact and efficient overall design.

Figure 12 illustrates the converter’s dynamic response to an input voltage drop, introduced at 0.2 s. The converter’s ability to maintain a stable output despite a sudden input fluctuation showcases its robustness. The swift recovery time with minimal deviation highlights the converter’s stability, which is critical for spacecraft operations where power disturbances can arise due to orbital shadowing or other environmental factors.

Figure 13 presents the system’s response to load variations introduced at 0.2 s and 0.5 s. The results demonstrate that the converter effectively restores the output voltage to the desired setpoint with minimal overshoot and fast settling time. This quick response is essential for maintaining power quality in the face of variable loads, further proving the converter’s capability to handle dynamic operational conditions reliably.

The results in Figure 10, Figure 11, Figure 12 and Figure 13, along with the performance metrics summarized in

Table 1. Typical requirement vs. achieved results.

Parameter	Requirement	Achieved Result
Voltage ripple	up to 5% of output voltage	2%
Current ripple	10% to 20% of load current	7.5%
Voltage overshoot under load change	10% to 20% of output voltage	2.5%

, validate the effectiveness of the proposed converter design. With 2% voltage ripple, <7.5% current ripple, and 2.5% voltage overshoot, the converter’s performance surpasses typical industry requirements, making it suitable for reliable nanosatellite missions.

4. Conclusions

This paper presents the development and analysis of a high-performance interleaved converter with a constant voltage MPPT technique tailored for small satellites. The converter is engineered to deliver a consistent output voltage while effectively managing solar panels at the MPPT to accommodate a broad input range. To enhance reliability and mitigate the risks associated with single-component failures in miniaturized satellites, the design is executed using aerospace-grade components.

Detailed analyses of the converter’s loop transfer function using a Bode diagram revealed that the initially designed converter, lacking a compensation network, exhibited suboptimal performance in terms of gain, phase margin, and settling time. To address these shortcomings, a PID compensator was devised and integrated into the system’s loop. This integration yielded significant improvements, showcasing notably higher gain and substantially enhanced phase margin. The Bode diagram analysis highlighted a marked increase in the gain margin, while the phase margin exhibited significant enhancements at the crossover frequency.

Ultimately, the proposed interleaved converter not only minimizes output ripples but also enhances the reliability of passive components, thereby extending the lifespan of the onboard battery. The streamlined design and reduced component count contribute to a more compact satellite configuration, aligning with the objective of reducing the satellite’s overall size and weight.