1. Introduction
The escalating demands for energy production, distribution, and storage have triggered unprecedented advancements and research in power electronic systems. Increasingly, developments such as cheaper and more powerful microcontrollers, battery energy storage technologies, and wide-bandgap devices have made this technologically and economically feasible. Nevertheless, recent concerns about energy conservation, environmental protection, and achieving net zero emissions have further propelled this momentum. The emergence of renewable energy systems and enormous gains in demands of transportation electrification have also added to it [
1]. This facilitates the need for more efficient, feasible, and reliable power electronic converters, of which voltage source inverters (VSI) serve a key role. The applications encompass motor drives, power supplies, static compensators (STATCOMs), fast-charging, high-voltage direct current (HVDC) transmissions, and flexible AC transmission systems (FACTS) ranging from medium to high power (1 kW to several gigawatts) and medium-voltage to high-voltage levels (several hundred volts to several kVs) with continued advancements for even higher levels [
2,
3,
4].
The applications of multilevel inverters (MLI) are depicted in
Figure 1. MLIs are used in diverse domains such as electric vehicle (EV) and aircraft systems, railway transportation, renewable energy systems, and HVDC systems [
5]. In these contexts, multilevel configurations have emerged as the favored architectures, supplanting conventional two-level structures. The first development of MLI was the Cascaded H-bridge (CHB) topology which was configured using multiple H-bridges to produce a multilevel output. Subsequently, Neutral-Point Clamped (NPC) and Flying Capacitor (FC) MLI followed in their wake [
6,
7,
8]. Since then, a multitude of topologies that are either derived from these three structures or novel ones have been ventured. A wide range of MLI topologies have been proposed with varying quantities of semiconductor device count, levels, DC sources, and passive components. A comprehensive analysis of these topologies is necessary to evaluate the feasibility of these topologies for multiple applications. These topologies can be divided into multiple categories conforming to their structure. Topologies employing multiple independent DC sources are inherently complex to implement due to the necessity of isolation transformers and balancing complexities. Consequently, topologies with a single DC-link shared for all levels and across all three or five phases can more easily be realized for commercial applications. These topologies can be described as common DC-link topologies. The higher-frequency operation, switching losses, power density, ratings, and robustness of IGBTs and MOSFETs are immensely improved with wide bandgap semiconductor devices. The cost of wide-bandgap devices is significantly higher than conventional devices [
9]. Therefore, topologies with a limited number of levels to find an optimal balance between level count and complexity are ideal.
The count of semiconductor components such as switches and diodes with their ratings, as well as capacitor requirements and boosting factors, are evaluated as quantitative factors. The performance of topology is optimized between application voltage and power levels, size and cost, control complexity, loss distribution, reliability, and modularity. Topologies with large peak switch blocking voltages are limited in high-voltage applications whereas a significantly high total standing voltage (TSV) exacerbates its cost. The number of drivers and snubbers requirements are increased with the increase in switch count, as well as increased modulation algorithm complexity, higher failure rates, and increased computational times. Additionally, it also has the effect of elevated switching losses, particularly in high-frequency applications and it complicates thermal management design. However, imposing constraints on the switch count may lead to a decrease in redundant states that would otherwise help to achieve balanced FC voltages, distribute losses, and enable post-failure reconfiguration. Converters that can be easily built using pre-existing modules are more suitable for industrial applications. Likewise, the increased number of FCs leads to an increase in the number of voltage sensors and the complexity of the voltage balancing algorithms [
10,
11,
12]. Nevertheless, the rapid growth in the availability of increasingly capable, fast, and low-cost microcontrollers might offset these limitations as well as facilitate the implementation of complex and non-linear control algorithms such as model predictive control. Inverters possessing inherent voltage balancing capabilities greatly reduce the complication of voltage balancing algorithms and computational load. The physical volume and weight of the inverter are considerably affected by the presence of FCs. This leads to reduced power density and increased failure rates which is undesirable in renewable energy systems (RES) and electric transportation. Similar problems can be caused by using more than two DC-link capacitors. On the contrary, a greater value of the DC-link utilization factor offers benefits including enhanced efficiency and easier cable management, and is especially beneficial in traction applications. Higher voltages can also hasten the charging of on-board battery storage systems.
Among the plethora of power electronic solutions, MLIs have emerged as an attractive and versatile option for RES. These inverters offer several advantages, including improved voltage quality, lower harmonic distortion, and enhanced power handling capabilities. Consequently, these can be suitably used in various applications such as grid integration, motor drives, and energy storage. However, the optimal utilization of MLIs in RES and EV requires sophisticated control strategies to address the challenges of power quality, efficiency, and system stability [
13]. Model Predictive Control (MPC) is a dynamic and predictive control methodology that has gained considerable attention in recent years for its ability to optimize complex systems and address non-linearities and uncertainties [
14,
15,
16,
17]. Among its variants, Finite Control Set Model Predictive Control (FCS-MPC) has garnered significant attention for controlling MLIs with superior performance, robustness, and accuracy. This approach enables the inverter to predict future behavior based on a discrete set of control signals and enables a precise modulation and high-speed response to system dynamics [
18,
19,
20,
21,
22,
23,
24]. In the renewable energy sector, integrating FCS-MPC with MLIs holds significant potential to boost energy conversion efficiency, grid integration, and overall system reliability.
Table 1 presents a comprehensive comparison of five similar works of literature with the proposed work. The control strategy used in the proposed work is easy, and the addition of switching frequency control is possible. The presented topology can also generate more output voltage levels with fewer switches. Consequently, the size of the filter requirement is reduced. Hence, the proposed work can effectively be employed in practical applications.
This research article aims to develop and implement the advanced FCS-MPC control strategy on a single-phase five-level T-type topology for RES. The objective is to capitalize on the benefits of MLIs while leveraging the predictive and control capabilities of FCS-MPC to achieve optimal energy harvesting, seamless grid interaction, and superior power quality. This article has been drafted into different sections. The first section introduces the article. The subsequent sections of this article are described as given.
Section 2 illustrates the modulation techniques to control the switching of semiconductor devices in the MLIs. Conventional control techniques as well as the MPC technique have been explained. A single-phase five-level T-type topology which has been used in this paper is elaborated in
Section 3. This also includes the different switching states of this topology. The Implementation of FCS-MPC on single phase five-level T-type topology has been discussed in
Section 4.
Section 5 demonstrates the prototype of the topology developed in the laboratory and FCS-MPC implementation on this inverter. This section elaborates the essential components used in hardware designing and system test bench. The hardware results are also included in this section. The conclusion of the paper is presented in
Section 6 followed with the future work in the last section.
3. Single Phase Five-Level T-Type Topology
The single-phase five-level T-type topology is a derivation of the three-phase T-type topology. The topology encompasses a split DC-link supplied by one DC source V
dc, six switches S
1–S
6, and two bidirectional switches. An LC filter consisting of
Lf and
Cf is connected at the output terminal of the inverter to improve the output quality. The current flowing through the load R is
ig. The structure of the T-type topology is given in the below
Figure 4. The topology can produce five levels with a peak equal to the DC source magnitude. The switches S
1, S
2, S
3, and S
4 block the voltage V
dc, and the bidirectional switches S
5 and S
6 block 2 × 0.5V
dc = V
dc each. The upper and lower DC-link capacitors are designated as
Cdc1 and
Cdc2. The topology can be extended to three or five phases with a common DC-link and similar operating principle. The switching states of the topology are given in
Table 2 and visualized in
Figure 5. The capacitors are charged and discharged and the states given in the table are represented by ↑ (charging) or ↓ (discharging). This affects the balance of the DC-link neutral point and must be considered in modulation, otherwise output and switch stresses will be drastically affected.
All these switching states can also be represented as waveform which is depicted in
Figure 6. It is obvious from the waveform that the only two switches are in ON condition for every available state. Moreover, each switch is turned ON thrice to generate a commutative of nine states. The T-type topology is considered for this work as it is suitable for medium voltage, high-power applications with an acceptable compromise on level count, complexity, redundancy, and issues elaborated on. With the advent of ultra-wide bandgap devices, MLI topologies with a greater number of levels can be less cost-effective than MLI topologies with lower levels. However, the traditional two-level and three-level inverters offer little redundancy, thus making MLI topologies with low level counts attractive. Moreover, the T-type topology lacks any switched capacitors and consequently their associated disadvantages.