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Article

Non-Inverting Quadratic Buck–Boost Converter with Common Ground Configuration for Supercapacitor Applications

1
Department of Electrical Engineering, National Taiwan University of Science and Technology, No. 43, Keelung Rd., Sec. 4, Da’an Dist., Taipei City 10607, Taiwan
2
Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh 202002, Uttar Pradesh, India
3
Department of Electrical Engineering, College of Engineering, Princess Nourah bint Abdulrahman University, P.O. Box 84428, Riyadh 11671, Saudi Arabia
*
Authors to whom correspondence should be addressed.
Processes 2022, 10(12), 2547; https://doi.org/10.3390/pr10122547
Submission received: 18 October 2022 / Revised: 8 November 2022 / Accepted: 14 November 2022 / Published: 30 November 2022
(This article belongs to the Section Energy Systems)

Abstract

:
This article presents a novel buck–boost converter-based topology suitable for supercapacitors and grid-connected solar PV system applications. The proposed converter can handle a wide range of voltage variations at the input side, making it ideal for extracting most of the energy from supercapacitors or a solar PV system connected to the input side of the converter. The output voltage of the converter is non-inverting which makes the control easier. The design of passive components, continuous mode operation, and discontinuous mode operation are all thoroughly discussed. A low-power hardware prototype of three hundred watts is developed and tested in the laboratory to validate the theoretical aspects of the converter.

1. Introduction

The advancement in the field of renewable energy sources and the development of power electronic converters have been constantly increasing over the past decade. DC–DC converters have numerous applications, including solar photovoltaic applications, battery chargers, medical instruments, high-voltage DC systems, electrical vehicles, and many others [1,2,3,4,5]. As we all know that the output of solar PV converters varies widely, for maintaining the constant output voltage under varying insolation and load conditions high-performance DC–DC converters play a very important role. High-gain power converters are also used in HVDC transmission lines [6,7]. Some of the applications of the DC–DC converter are presented in Figure 1. There are several significant technical advantages and areas of application of these converters. They have a simple structure, a wide range of input/output voltage, high efficiency, and acceptable power density. They also have some disadvantages such as a higher number of switches, and high switching frequency due to which electromagnetic interference occurs. They are costly, a complex control system is required, and they are difficult to manufacture. Buck converters are only capable of decreasing the output voltage and have a narrow duty ratio window which limits the high step-down applications. Similarly, boost converters are only capable of step-up applications and are not advisable to use at a very high duty ratio. The effect of non-idealities is dominant at high duty ratios, and the output voltage of the converter begins to decrease after a certain value of high duty ratio [8].
When the buck and boost modes are not able to support the output voltage, the buck–boost mode is activated and functions as a combination of both. Nowadays, there are several schematics of DC–DC converters that are available for electric vehicles and renewable energy applications. These are based on various advanced switch-mode power supplies, one of which is the DC–DC buck–boost converter [9,10]. To improve the overall efficiency of some systems, supercapacitors are used with batteries as a combination in many instances such as in hybrid electric vehicles, energy storage power stations, and many more. As compared with other energy storage devices, supercapacitors have several advantages such as fast charge and discharge capabilities, high power density, longer life, ease of work in any environment [11,12,13], very low leakage current, and being maintenance-free. Supercapacitor-based systems are highly efficient for fluctuating loads and regenerative braking. The energy stored in a supercapacitor is directly proportional to the square of the voltage across the capacitor. To utilize as much of this energy as possible, a wide input voltage range converter is required. In this research article, a novel, non-inverting, wide input voltage range buck–boost converter is proposed as presented in Figure 2.

2. Proposed Converter

The proposed converter is unidirectional, therefore it can be used for applications where regenerative braking is not required. This converter is suitable for drones having supercapacitors in combination with batteries. This converter could be used to provide extra energy to the motors during heavy load conditions, such as starting the motor, or a strong wind blowing in the opposite direction of the drone. The proposed converter comprises two MOSFETs (S1 and S2), two inductors (L1 and L2), four capacitors (C1, C2, C3, and C4), and four diodes (D1, D2, D3, and D4) and the converter is set to switch at a high switching frequency fs. This circuit has the advantage of having only two switches (S1 and S2) operated together, that is, the same control signal is used to control the converter output with lower complexity, continuous input current, and engaging energy with a single input DC source. The proposed buck–boost converter is able to provide a non-inverting output voltage.

2.1. Continuous Conduction Mode of Operation CCM

For the continuous conduction mode of operation, the current in both inductors must be continuous. Figure 3 displays the current waveforms for the inductors and the voltage waveforms for the capacitors for the continuous mode of conduction. Based on switching signals, there are two modes of operation. The first is the switch ON mode of operation, and the second is the switch OFF mode of operation. Since both switches (S1 and S2) are operated simultaneously, they both are turned ON and OFF at the same time. Therefore, both switches require the same switching signal to operate.

2.1.1. Switch ON Mode of Operation

When the switches are turned on, diode D3 conducts while the other three diodes are reverse biased, i.e., diodes D1, D2, and D4 do not conduct. When both the switches are conducting, the energy from the source is transferred to both the inductors and the current of the inductors increases. Figure 4 represents the equivalent circuit diagram for the first mode of operation. Below are the KVL equations for the first mode of operation:
V L 1 = V i n ,
V L 2 = V C 3 V C 2 ,
V i n = V C 1 + V C 2 V C 3 .

2.1.2. Switch OFF Mode of Operation

The energy stored in the passive components is transferred to the load during the second mode of operation when both switches are turned off. Except for diode D3, which is reverse biased as shown in Figure 5, all of the diodes are conducting. The KVL equations for the switch OFF mode of operation are as follows.
V L 1 = V i n V C 1 ,
V L 2 = V C 2 ,
V O = V C 2 + V C 3 .
Put the principle of voltage-second balance in the inductor L1.
0 T V L 1 ( t ) . d t = 0
V i n D T + ( V i n V C 1 ) ( 1 D ) T = 0
V C 1 = V i n ( 1 D )
Now put in the principle of voltage-second balance in the inductor L2.
0 T V L 2 ( t ) . d t = 0
( V C 1 V i n ) D T V C 2 ( 1 D ) T = 0
V C 2 = V i n D 2 ( 1 D ) 2
The voltage across capacitor C2 is given by Equation (12), by solving Equations (3), (9), and (12). The voltage across capacitor C3 and the output voltage gain can be calculated as follows.
V C 3 = V i n D ( 1 D ) 2
V O V i n = D ( 1 + D ) ( 1 D ) 2
The output voltage is non-inverting and quadratic, as shown by Equation (14), and the input and output ports share a common ground, making control of the converter easier. Theoretically, when the duty ratio is less than 1/3, the proposed converter operates in buck mode; otherwise, it operates in boost mode.

2.1.3. Selection of Passive Components

The size of the passive components depends on the switching frequency, output load, and duty ratio. As the switching frequency increases, the size of these components decreases. During the second mode of operation, the average current flowing through inductor L1 is the same as the average current flowing through capacitor C1. The minimum required inductance for inductor L1 for the continuous mode of conduction is shown by Equation (16).
I L 1 = I C 1 ( O F F ) = V O ( 1 + D ) R ( 1 D ) 2
L 1 R ( 1 D ) 4 2 ( 1 + D ) 2 f s
During the first mode of operation, the capacitors C2 and C3 are in series, therefore the same current is passing through them in the first mode of operation. To satisfy the current-second balance for both capacitors, the same value of average current should pass through each of them during the second mode of operation as well. The average current through inductor L2 is given by Equation (17) and the minimum inductance required for inductor L2 for the continuous mode of conduction is given by Equation (18).
I L 2 = 2 I C 2 ( O F F ) = 2 I C 3 ( O F F ) = 2 V O R ( 1 D )  
L 2 R D ( 1 D ) 2 4 ( 1 + D ) f s
The selection of the capacitors could be carried out based on the permissible ripple in the voltage across them as well as the magnitude of the voltage across the capacitor. Therefore, the selection of a capacitor should be carried out by considering a range of the duty ratio so that the selected capacitor does not burst, that is, the voltage rating of the capacitor should be high enough to support the maximum voltage across it. The value of the capacitance of each capacitor could be calculated as follows:
C 1 = V O ( 1 + D ) R f s Δ V C 1 ( 1 D ) = V i n D ( 1 + D ) 2 R f s Δ V C 1 ( 1 D ) 3   ,
C 2 = V O R f s Δ V C 2 = V i n D ( 1 + D ) R f s Δ V C 2 ( 1 D ) 2 ,
C 3 = V O R f s Δ V C 3 = V i n D ( 1 + D ) R f s Δ V C 3 ( 1 D ) 2   ,
C 4 = V O D R f s Δ V C 4 = V i n D 2 ( 1 + D ) R f s Δ V C 4 ( 1 D ) 2   .

2.2. Discontinuous Conduction Mode of Operation (DCM)

Before completing the second mode of operation as described in the previous section, the converter switches to discontinuous conduction mode when either all or any of the inductor currents reach zero. There are two inductors in the proposed converter, therefore there are three possible conditions of discontinuity. For each condition, there are equivalent circuits which are presented in Figure 6.
Figure 7 shows the voltage and current waveforms of DCM inductors, and the voltage gain can be calculated as follows.
0 T V L 1 ( t ) . d t = 0
V i n D 1 T + ( V i n V C 1 ) D 2 T = 0
V C 1 = V i n ( D 1 + D 2 ) D 2
0 T V L 2 ( t ) . d t = 0
( V C 1 V i n ) D 1 T V C 2 D 3 T = 0
V C 2 = ( V C 1 V i n ) D 1 D 3
V C 3 = V i n D 1 D 2 + V i n D 1 2 D 2 D 3
( V O V i n ) D C M = D 1 ( D 3 + 2 D 1 ) D 2 D 3

3. Comparison with Other Buck–Boost Topologies

Table 1 compares some existing buck–boost topologies with the proposed converter. The comparison takes into account the number of components, output voltage gain, and voltage stress across the power switches. The primary factor that distinguishes the proposed converter from other topologies presented in [14,15,16,17,18] is the input current which is continuous in the case of the proposed converter. Applications using renewable energy, particularly solar PV energy-producing systems, are well suited to the continuous input current. Contrary to the converters presented in [16,17,18,19], the output voltage of the proposed converter is non-inverting in nature and has a common ground with the input which is more desirable for the implementation of the controls. The voltage gain of the proposed converter is compared with the other topologies and presented in Figure 8a. The voltage-boosting capabilities of the proposed converter are slightly lower than the topology presented in [19]. However, compared to the design described, the proposed topology is better because it provides non-inverting output voltage and lower voltage stress across the second switch as shown in Figure 8b.

4. Hardware Verification

A 300 W hardware prototype is developed and put to the test to evaluate the efficiency of the proposed converter (see Figure 9). Table 2 contains the design specifications and components. The calculated value of capacitances is the minimum value required for maintaining the ripple below the desired value. The higher values of the capacitances are taken in our prototype just to ensure that the ripple is reduced further. We need to consider the voltage rating of the capacitor as well to prevent the breakdown of the capacitor, so a higher voltage rating is selected for C2 and C3 as compared to C1. To test the developed hardware prototype, a pwm pulse of the required duty ratio is generated by using microcontroller STM32, Nucleo H743ZI2 and targeted to the gate driver circuit. An extra power DC power source with two isolated voltage regulator ICs (MCWI03-48S15) is used to run both switches. The duty ratio is set at 0.2 with a frequency of 50 kHz and a load resistance of 150 ohms to examine the buck mode of operation. The measured waveforms are shown in Figure 10, and the output voltage is 18.8 V as shown in Figure 10a, which is slightly higher than the theoretical voltage of 18 V. Figure 10b shows the measured test results for the voltage stress across the power switches, and the measured and the calculated voltage stress across the switches are almost equal. Due to the low output power and large ripple in the inductor current IL1, the inductor is working in boundary conditions as presented in Figure 10d, and if the duty ratio is reduced further the converter would possibly come to DCM. The duty ratio is set to 0.4 and 0.6 for the boost mode of operation, with a fixed load resistance of 300 ohms.
The various measured waveforms for the duty ratio of 0.4 are shown in Figure 11. The measured output voltage is 75.7 V and the voltage stress is 74 V and 53 V, respectively, for the switches S1 and S2. The test results at a duty ratio of 0.6 are shown in Figure 12. The measured output voltage is 284 V which is 4 V less than the calculated value. The results are summarized in Table 3.
The measured efficiency of the proposed converter is presented in Figure 13. The boost mode of operation has a maximum efficiency of 93.2%, while the buck mode of operation provides a minimum efficiency of 89.8%.

5. Conclusions

In this article, a non-isolated buck–boost converter with non-inverting output voltage is proposed. A detailed steady-state analysis is performed, and a hardware prototype is developed which verifies the theoretical aspects of the converter. The proposed converter is suitable for supercapacitors and renewable energy applications because it can operate with a wide range of voltage and continuous input currents. The developed prototype presented in this article looks bulky and large because it is developed for testing purposes only. For actual application, the weight and size of the converter can be reduced to a very small size by using high-frequency components such as SiC switches. For aerospace applications, it is recommended to use high-frequency components as the weight of the converter is also added to the overall system.

Author Contributions

Conceptualization, M.S.K. and J.A.; Formal analysis, M.S.K., J.A., A.S. and M.T.; Funding acquisition, C.-H.L. and S.U.; Investigation, M.S.K. and J.A.; Methodology, M.S.K., J.A., A.S. and M.T.; Supervision, C.-H.L., A.S. and M.T.; Validation, M.S.K., J.A., A.S. and M.T.; Writing—original draft, M.S.K. and J.A.; Writing—review and editing, C.-H.L., A.S., M.T. and S.U. All authors have read and agreed to the published version of the manuscript.

Funding

This research is funded by Princess Nourah bint Abdulrahman University Researchers Supporting Project (number PNURSP2022R79), Princess Nourah bint Abdulrahman University, Riyadh, Saudi Arabia.

Data Availability Statement

Not applicable.

Acknowledgments

Princess Nourah bint Abdulrahman University Researchers Supporting Project (number PNURSP2022R79), Princess Nourah bint Abdulrahman University, Riyadh, Saudi Arabia.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Applications of the DC–DC converters.
Figure 1. Applications of the DC–DC converters.
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Figure 2. Proposed converter.
Figure 2. Proposed converter.
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Figure 3. Related waveforms for the passive components in CCM.
Figure 3. Related waveforms for the passive components in CCM.
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Figure 4. Switch ON mode of operation.
Figure 4. Switch ON mode of operation.
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Figure 5. Switch OFF mode of operation.
Figure 5. Switch OFF mode of operation.
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Figure 6. Equivalent circuit for DCM: (a) L1 enters DCM, (b) L2 enters DCM, (c) L1 and L2 both enter DCM.
Figure 6. Equivalent circuit for DCM: (a) L1 enters DCM, (b) L2 enters DCM, (c) L1 and L2 both enter DCM.
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Figure 7. Related waveforms for the passive components in CCM.
Figure 7. Related waveforms for the passive components in CCM.
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Figure 8. Comparison with other converters: (a) voltage gain, (b) switch voltage stress.
Figure 8. Comparison with other converters: (a) voltage gain, (b) switch voltage stress.
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Figure 9. (a) Hardware prototype, (b) testing setup.
Figure 9. (a) Hardware prototype, (b) testing setup.
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Figure 10. Hardware results for buck mode at a duty ratio of 0.2.
Figure 10. Hardware results for buck mode at a duty ratio of 0.2.
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Figure 11. Hardware results for boost mode at a duty ratio of 0.4.
Figure 11. Hardware results for boost mode at a duty ratio of 0.4.
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Figure 12. Hardware results for boost mode at a duty ratio of 0.6.
Figure 12. Hardware results for boost mode at a duty ratio of 0.6.
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Figure 13. Efficiency versus output power of the proposed converter.
Figure 13. Efficiency versus output power of the proposed converter.
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Table 1. Comparison with other buck–boost topologies.
Table 1. Comparison with other buck–boost topologies.
Topology[14][15][20][21][16][17][18][22][19]Proposed
ComponentsSwitches1222221122
Diodes3222223334
Inductors2222223422
Capacitors2222225634
Total88888812141012
Voltage gain (VO/Vin) D ( 1 D ) 2 ( D 1 D ) 2 ( D 1 D ) 2 ( D 1 D ) 2 D ( 2 D ) ( 1 D ) 2 D ( 2 D ) ( 1 D ) 2 3 D 1 D 3 D 1 D 2 D ( 1 D ) 2 D ( 1 + D ) ( 1 D ) 2
Voltage gain = 1, D=0.380.50.50.50.290.290.250.250.270.33
Switch voltage stress (VS/Vin) 1 1 D 1 1 D
D ( 1 D ) 2
1 1 D
D ( 1 D ) 2
1 1 D
D ( 1 D ) 2
1 1 D
D ( 1 D ) 2
1 1 D
D ( 1 D ) 2
1 1 D 1 1 D 1 1 D
1 + D ( 1 D ) 2
1 1 D
D ( 1 D ) 2
Continuous input currentNoNoYesYesNoNoNoYesYesYes
Non-inverting output voltageYesYesYesYesNoNoNoYesNoYes
Table 2. Hardware design parameters.
Table 2. Hardware design parameters.
ParametersSpecification/Value
Input voltageVin = 48 V
Maximum powerPmax = 300 W
Load resistanceR = 150 − 300 Ω
InductorsL1 = 500 µH, L2 = 300 µH
CapacitorsC1 = 220 µF/100 V C2 = C3 = 100 µF/250 V, C4 = 100 µF/450 V
Mosfet (S1, S2)SPW52N50C3, 560 V, 52 A, 0.07 Ω
Diodes (D1–D4)CMPFCD86-600V, IF = 8 A VF = 1.5 V
MicrocontrollerSTM32, Nucleo H743ZI2
Gate driver ICTLP250H
Voltage regulator ICMCWI03-48S15
Power supplyChroma programmable DC supply, 621OOH-600S
LoadChroma programmable electronic load simulator
Table 3. Hardware test results.
Table 3. Hardware test results.
Duty
Ratio
Measured Voltage (Volt)Calculated Voltage (Volt)Output Voltage Error
| V O c a l V O m e a | × 100 V O c a l
VOVDS1VDS2VD1VD2VD3VD4VOVDS1VDS2VD1VD2-D4 = V i n D 2 ( 1 D ) 2
0.218.863186115.615.214.818601560154%
0.475.774537553535474.68053.38053.31.47%
0.62841201781151751751732881201801201802.77%
VO is the output voltage, VDS is the switch voltage stress, VD is the diode voltage and Vin is the input voltage.
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Khan, M.S.; Lin, C.-H.; Ahmad, J.; Sarwar, A.; Tariq, M.; Urooj, S. Non-Inverting Quadratic Buck–Boost Converter with Common Ground Configuration for Supercapacitor Applications. Processes 2022, 10, 2547. https://doi.org/10.3390/pr10122547

AMA Style

Khan MS, Lin C-H, Ahmad J, Sarwar A, Tariq M, Urooj S. Non-Inverting Quadratic Buck–Boost Converter with Common Ground Configuration for Supercapacitor Applications. Processes. 2022; 10(12):2547. https://doi.org/10.3390/pr10122547

Chicago/Turabian Style

Khan, Mohammad Suhail, Chang-Hua Lin, Javed Ahmad, Adil Sarwar, Mohd Tariq, and Shabana Urooj. 2022. "Non-Inverting Quadratic Buck–Boost Converter with Common Ground Configuration for Supercapacitor Applications" Processes 10, no. 12: 2547. https://doi.org/10.3390/pr10122547

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