Chips

This paper presents the design of a 140 GHz vector-sum phase shifter in a 28 nm CMOS process. Two variable-gain amplifiers—Gilbert cell and current-steering amplifiers—are investigated and compared. The Gilbert cell-based phase shifter controls the tail current source in a common-source amplifier. However, this configuration exhibits insufficient gain at D-band frequencies. To address this issue, we designed a current-steering variable-gain amplifier in cascode form to improve the gain performance. I/Q signals are generated by Marchand baluns and Lange couplers, and a 13-bit digital-to-analog converter enables fine bias control. Simulation results show that the current-steering phase shifter achieves up to a 4.4 dB higher gain than the Gilbert cell-based phase shifter, with an RMS gain error below 1.3 dB and an RMS phase error below 4.8° across 129–144 GHz.

This paper proposes a novel fault-tolerant routing method without creating faulty regions for 3D mesh Network-on-Chips (NoCs). Most conventional methods create faulty regions containing faulty nodes and route packets around them to reach the destinations. However, the creation of faulty regions results in low communication performance and low node utilization. To overcome the two problems, the proposed method does not create faulty regions based on the idea of predefining paths in the absence of shortest paths while allowing the passage of faulty nodes. Simulation results show that, compared with conventional methods, the proposed method reduces average latency by about 44.5% and improves node utilization rate by about 41.2% for 3D mesh NoCs of nodes.

Silicon-Based Physical Unclonable Functions (PUFs) exploit inherent manufacturing variations to produce a unique, random, and ideally unclonable secret key. As electronic devices are decommissioned and sent for End of Life (EOL) recycling, the encrypted critical program information remains within the device. However, conventional PUFs remain vulnerable to invasive attacks and reverse engineering that with sufficient time, resources, and effort can enable an adversary to bypass the security enclave of the system and extract this secret data. Recent research has started to explore techniques to respond to tamper attempts using electromigration (EM) and time-dependent dielectric breakdown (TDDB) to the PUF entropy source, preventing future authentication attempts with well-known semiconductor reliability failure mechanisms. This work presents a Pre-Amplifier Physical Unclonable Function (Pre-Amp PUF) with a self-corruption function designed and manufactured in a 3 nm FinFET technology. This PUF can perform a destructive read operation as an EOL anti-counterfeit measure against recycled and reused electronics. The destructive read utilizes an accelerated aging technique that exploits both Hot Carrier Injection (HCI) and Bias Temperature Instability (BTI) degradations directly at the PUF entropy source bitcell data. This work demonstrates a silicon proven ability to irreversibly corrupt the encryption key, invalidating the PUF key, and blocking future authentication attempts. By utilizing HCI and BTI aging effects rather than physical damage a PUF that can self-corrupt its own key without being detectable with imaging techniques is demonstrated for the first time. A feedback loop enables corruption of up to ~30% of the PUF entropy source, which is approximately 3× more data corruption than the prior state of the art self-corrupting PUF. Our technique reuses on-chip stable (repeatable) PUF bitcells identifying circuitry and thereby minimizes the area overhead to support this differentiated feature.