Research on Electronic Packaging Materials

A special issue of Coatings (ISSN 2079-6412). This special issue belongs to the section "Functional Polymer Coatings and Films".

Deadline for manuscript submissions: 31 March 2025 | Viewed by 1989

Special Issue Editor


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Guest Editor
Department of Mechanical Engineering, National Taiwan University, Taipei 106, Taiwan
Interests: semiconductor; package; novel material; carbon nanotubes

Special Issue Information

Dear Colleagues,

In the post-Moore's Law era, advanced packaging and materials technologies are becoming increasingly important. Advanced packaging greatly shortens the connection between different chips and further increases the chip efficiency. It has produced many different applications, such as 5G and AI. On the other hand, the development of novel semiconductor materials also provides another new path for future semiconductor devices. Recently, many materials, such as ferroelectric material (FE), oxide semiconductors, 2D material, and 1D carbon nanotubes, have been widely discussed. Therefore, this Special Issue will focus on advanced packaging technology and novel semiconductor material technology. The topics of interest for this Special Issue, in particular, include (but are not restricted to):

  • Package Technology;
  • 2.5 DIC;
  • 3 DIC;
  • TSV/RDL/Interposer/Passive Device Integration;
  • EDA;
  • Novel Semiconductor Materials;
  • Ferroelectric material;
  • Oxide Semiconductor;
  • 2D Materials;
  • 1D Materials: Carbon Nanotubes.

Prof. Dr. Ming-Han Liao
Guest Editor

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Keywords

  • package
  • novel semiconductor materials
  • ferroelectric material
  • oxide semiconductor
  • 2D/1D materials
  • thin films

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Published Papers (1 paper)

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Research

7 pages, 2819 KiB  
Article
The Advantages of Double Catalytic Layers for Carbon Nanotube Growth at Low Temperatures (<400 °C) in 3D Stacking and Power Applications
by Hong-Yi Lin, Nilabh Basu, Min-Hung Lee, Sheng-Chi Chen and Ming-Han Liao
Coatings 2023, 13(5), 965; https://doi.org/10.3390/coatings13050965 - 22 May 2023
Viewed by 1567
Abstract
A double catalytic layer scheme is proposed and investigated for the low temperature growth of carbon nanotubes (CNTs) over Co (Cobalt), Al (Aluminum), and Ti (Titanium) catalysts on a silicon substrate. In this work, we demonstrate the growth of CNTs by a thermal [...] Read more.
A double catalytic layer scheme is proposed and investigated for the low temperature growth of carbon nanotubes (CNTs) over Co (Cobalt), Al (Aluminum), and Ti (Titanium) catalysts on a silicon substrate. In this work, we demonstrate the growth of CNTs by a thermal chemical vapor deposition (TCVD) process at both 350 °C and 400 °C. Based on scanning electron microscopy (SEM) and Raman spectroscopy analyses, the good quality of the CNTs is demonstrated. This study contributes to the on-going research on integrating semiconductors into packaging and power-related applications, as demonstrated with the low resistance (~128 Ω) and high thermal conductivity (~29.8 Wm−1 K−1) of our developed CNTs. Full article
(This article belongs to the Special Issue Research on Electronic Packaging Materials)
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