New Trends in CMOS: Devices, Technologies, and Applications

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 August 2026 | Viewed by 904

Special Issue Editors


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Guest Editor
Department of Engineering and Applied Sciences, University of Bergamo, Via Marconi 5, 24044 Dalmine, Italy
Interests: low-noise front-end electronics; radiation effects in CMOS technology; CMOS active pixel sensors; voltage references and regulators; wearable monitoring systems
Special Issues, Collections and Topics in MDPI journals

E-Mail Website
Guest Editor
Department of Engineering and Applied Sciences, University of Bergamo, Via Marconi 5, 24044 Dalmine, BG, Italy
Interests: CMOS front-end electronics; low-noise amplifiers; radiation effects in CMOS devices; mixed-signal readout circuits; monolithic active pixel sensors; wearable sensors
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The aim of this Special Issue is to provide a comprehensive platform for researchers and engineers to share the latest advancements and breakthroughs in the field of complementary metal–oxide–semiconductor (CMOS) technology. It aims to promote in-depth understanding and further development of CMOS technologies by presenting cutting-edge research findings.

The scope encompasses a wide range of aspects related to CMOS technology, covering both fundamental research exploring the physical properties and behavior of CMOS devices, as well as applied research focusing on the integration of CMOS technologies into various practical applications. The Special Issue will also cover the technological challenges and solutions in the design, fabrication, and optimization of CMOS systems.

This Special Issue will focus on (but is not limited to) the following topics: 

  • Advanced CMOS Devices: Novel device structures such as FinFETs, nanowire FETs, and their performance enhancements. Research on improving device scalability, reducing power consumption, and enhancing switching speed.
  • CMOS Fabrication Technologies: New materials and processes for CMOS manufacturing, including advanced lithography techniques, high-k dielectrics, and metal gates. The optimization of fabrication processes is intended to achieve higher yields and better device performance.
  • Low-Power CMOS Design: Circuit- and system-level design strategies for low-power operations, such as power management techniques, clock gating, and voltage scaling, as well as the exploration of energy-efficient architectures for different applications.
  • CMOS in Emerging Applications: The integration of CMOS technologies into areas like artificial intelligence, the internet of things (IoT), and 5G communication, and exploration of how CMOS technologies can enable new functionalities and improve the performance of these emerging systems.

Dr. Gianluca Traversi
Dr. Luigi Gaioni
Guest Editors

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Keywords

  • CMOS technology
  • CMOS devices
  • artificial intelligence
  • internet of things (IoT)

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Published Papers (1 paper)

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Research

16 pages, 1911 KB  
Article
Development of 28 nm CMOS Front-End Channels for the Readout of Hybrid Pixel Sensors in Future Colliders and Photon Science Applications
by Luigi Gaioni, Simone Gerardin, Valerio Re and Gianluca Traversi
Electronics 2026, 15(8), 1641; https://doi.org/10.3390/electronics15081641 - 14 Apr 2026
Viewed by 369
Abstract
This paper describes two front-end architectures developed in a 28 nm CMOS process for the readout of pixel detectors in future high-energy physics (HEP) colliders and advanced X-ray imaging instrumentation. The front-end channels have been developed in the framework of the PiHEX project, [...] Read more.
This paper describes two front-end architectures developed in a 28 nm CMOS process for the readout of pixel detectors in future high-energy physics (HEP) colliders and advanced X-ray imaging instrumentation. The front-end channels have been developed in the framework of the PiHEX project, funded by the Italian Ministry of University and Research. PiHEX aims to improve the state of the art of pixel readout chip technology in high-luminosity colliders and X-ray imagers in the next generation of free electron lasers (FELs) by developing, in 28 nm CMOS technology, the fundamental microelectronic building blocks for pixel readout chips. Such blocks, also implementing innovative circuit ideas, will enable, in future applications, the integration of large-scale readout chips, meeting a set of challenging requirements, such as high spatial resolution, high signal-to-noise ratio, very wide dynamic range and the capability to withstand unprecedented radiation levels. Two different front-end channels were designed, integrated into two prototype chips, and tested. One architecture, featuring a pixel size of 25 µm × 100 µm, was optimized for tracking applications in high-energy physics experiments, like the ones that take place at CERN in the high-luminosity upgrade of the Large Hadron Collider (LHC), while the second one, featuring a pixel size of 110 µm × 55 µm, was devised for X-ray imaging applications in FELs. Full article
(This article belongs to the Special Issue New Trends in CMOS: Devices, Technologies, and Applications)
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