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Enhancing Efficiency and Driving Innovation in the Semiconductor Industry through...
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Enhancing Efficiency and Driving Innovation in the Semiconductor Industry through Artificial Intelligence Applications

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Artificial Intelligence".

Deadline for manuscript submissions: closed (15 November 2024) | Viewed by 2608

Special Issue Editors

Prof. Dr. Wei-Chang Yeh

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Guest Editor
Department of Industrial Engineering and Engineering Management, National Tsing Hua University, Hsinchu, Taiwan
Interests: network reliability; scheduling problem; cloud computing management; SSO and soft computing; data mining
Special Issues, Collections and Topics in MDPI journals
Prof. Dr. Siddhartha Bhattacharyya

E-Mail Website
Guest Editor
Department of Computer Science, VSB Technical University of Ostrava, 700 80 Ostrava, Czech Republic
Interests: computational intelligence; electronics and communication
Dr. Wenbo Zhu

E-Mail Website
Guest Editor
School of Mechanical and Electrical Engineering and Automation, Foshan University, Foshan 528225, China
Interests: omplex industrial process detection; image analysis and multi-dimensional perception; smart operation; skill learning; artificial intelligent-related theoretical research and application

Special Issue Information

 

Dear Colleagues,

This Special Issue, entitled "Intelligent Semiconductors", delves into the transformative impact of Artificial Intelligence (AI) on the semiconductor industry, a critical driver of technological advancement across various sectors such as computing, telecommunications, healthcare, and the automotive industry. As these industries face increasing demands for efficiency, precision, and miniaturization, AI has emerged as an essential tool for enhancing the design, manufacturing, testing, and deployment of semiconductors. This issue aims to showcase cutting-edge research, case studies, and practical applications that demonstrate the integration of AI in optimizing semiconductor processes, from design and simulation to defect detection and quality control. It also explores AI-driven solutions for supply chain optimization, energy efficiency, and emerging technologies like quantum computing and flexible electronics. By fostering a dialogue among researchers, practitioners, and industry professionals, this Special Issue seeks to provide a comprehensive overview of current  advancements, address challenges, and outline future research directions at the intersection of AI and semiconductor technology. Contributions from diverse disciplines are encouraged, reflecting the interdisciplinary nature of this evolving field and highlighting the potential of AI to drive innovation and efficiency in the semiconductor industry.

Prof. Dr. Wei-Chang Yeh
Prof. Dr. Siddhartha Bhattacharyya
Dr. Wenbo Zhu
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • Artificial Intelligence (AI)
  • semiconductor technology
  • computing
  • telecommunications
  • healthcare
  • automotive industry

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Published Papers (3 papers)

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Research

13 pages, 5647 KiB  
Article
ResNet Modeling for 12 nm FinFET Devices to Enhance DTCO Efficiency
by Yiming Huang, Bin Li, Zhaohui Wu and Wenchao Liu
Electronics 2024, 13(20), 4040; https://doi.org/10.3390/electronics13204040 - 14 Oct 2024
Viewed by 604
Abstract
In this paper, a deep learning-based device modeling framework for design-technology co-optimization (DTCO) is proposed. A ResNet surrogate model is utilized as an alternative to traditional compact models, demonstrating high accuracy in both single-task (I–V or C–V) and multi-task (I–V and C–V) device [...] Read more.
In this paper, a deep learning-based device modeling framework for design-technology co-optimization (DTCO) is proposed. A ResNet surrogate model is utilized as an alternative to traditional compact models, demonstrating high accuracy in both single-task (I–V or C–V) and multi-task (I–V and C–V) device modeling. Moreover, transfer learning is applied to the ResNet model, using the BSIM-CMG compact model for a 12 nm FinFET SPICE model as the pre-trained source. Through this approach, superior modeling accuracy and faster training speed are achieved compared to a ResNet surrogate model initialized with random weights, thereby meeting the rapid and efficient demands of the DTCO process. The effectiveness of the ResNet surrogate model in circuit simulation for 12 nm FinFET devices is demonstrated. Full article
(This article belongs to the Special Issue Enhancing Efficiency and Driving Innovation in the Semiconductor Industry through Artificial Intelligence Applications)
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14 pages, 1585 KiB  
Article
TAFENet: A Two-Stage Attention-Based Feature-Enhancement Network for Strip Steel Surface Defect Detection
by Li Zhang, Zhipeng Fu, Huaping Guo, Yan Feng, Yange Sun and Zuofei Wang
Electronics 2024, 13(18), 3721; https://doi.org/10.3390/electronics13183721 - 19 Sep 2024
Viewed by 512
Abstract
Strip steel serves as a crucial raw material in numerous industries, including aircraft and automobile manufacturing. Surface defects in strip steel can degrade the performance, quality, and appearance of industrial steel products. Detecting surface defects in steel strip products is challenging due to [...] Read more.
Strip steel serves as a crucial raw material in numerous industries, including aircraft and automobile manufacturing. Surface defects in strip steel can degrade the performance, quality, and appearance of industrial steel products. Detecting surface defects in steel strip products is challenging due to the low contrast between defects and background, small defect targets, as well as significant variations in defect sizes. To address these challenges, a two-stage attention-based feature-enhancement network (TAFENet) is proposed, wherein the first-stage feature-enhancement procedure utilizes an attentional convolutional fusion module with convolution to combine all four-level features and then strengthens the features of different levels via a residual spatial-channel attention connection module (RSC). The second-stage feature-enhancement procedure combines three-level features using an attentional self-attention fusion module and then strengthens the features using a RSC attention module. Experiments on the NEU-DET and GC10-DET datasets demonstrated that the proposed method significantly improved detection accuracy, thereby confirming the effectiveness and generalization capability of the proposed method. Full article
(This article belongs to the Special Issue Enhancing Efficiency and Driving Innovation in the Semiconductor Industry through Artificial Intelligence Applications)
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20 pages, 1284 KiB  
Article
Feature Selection for Data Classification in the Semiconductor Industry by a Hybrid of Simplified Swarm Optimization
by Wei-Chang Yeh and Chia-Li Chu
Electronics 2024, 13(12), 2242; https://doi.org/10.3390/electronics13122242 - 7 Jun 2024
Viewed by 825
Abstract
In the semiconductor manufacturing industry, achieving high yields constitutes one of the pivotal factors for sustaining market competitiveness. When confronting the substantial volume of high-dimensional, non-linear, and imbalanced data generated during semiconductor manufacturing processes, it becomes imperative to transcend traditional approaches and incorporate [...] Read more.
In the semiconductor manufacturing industry, achieving high yields constitutes one of the pivotal factors for sustaining market competitiveness. When confronting the substantial volume of high-dimensional, non-linear, and imbalanced data generated during semiconductor manufacturing processes, it becomes imperative to transcend traditional approaches and incorporate machine learning methodologies. By employing non-linear classification models, one can achieve more real-time anomaly detection, subsequently facilitating a deeper analysis of the fundamental causes behind anomalies. Given the considerable dimensionality of production line data in semiconductor manufacturing, there arises a necessity for dimensionality reduction to mitigate noise and reduce computational costs within the data. Feature selection stands out as one of the primary methodologies for achieving data dimensionality reduction. Utilizing wrapper-based heuristics algorithms, although characterized by high time complexity, often yields favorable performance in specific cases. If further combined into hybrid methodologies, they can concurrently satisfy data quality and computational cost considerations. Accordingly, this study proposes a two-stage feature selection model. Initially, redundant features are eliminated using mutual information to reduce the feature space. Subsequently, a Simplified Swarm Optimization algorithm is employed to design a unique fitness function aimed at selecting the optimal feature subset from candidate features. Finally, support vector machines are utilized as the classification model for validation purposes. For practical cases, it is evident that the feature selection method proposed in this study achieves superior classification accuracy with fewer features in the context of wafer anomaly classification problems. Furthermore, its performance on public datasets further substantiates the effectiveness and generalization capability of the proposed approach. Full article
(This article belongs to the Special Issue Enhancing Efficiency and Driving Innovation in the Semiconductor Industry through Artificial Intelligence Applications)
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