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Electronics
Special Issues
RF and Mixed Signal High Speed Circuit Design
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RF and Mixed Signal High Speed Circuit Design

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (31 July 2021) | Viewed by 3703

Special Issue Editors

Dr. Grigorios Kalivas

E-Mail Website
Guest Editor
Department of Electrical and Computer Engineering, University Of Patras, 26504 Rio Achaia, Greece
Interests: RF circuit and systems design; millimeter wave IC transceiver design; phase locked loops and synthesizers; broadband front-end amplifiers; mixers and downconverters
Prof. Dr. Alexios Birbas

E-Mail Website
Guest Editor
Department of Electrical and Computer Engineering, University of Patras, 26504 Rio Achaia, Greece
Interests: device electronics; optoelectronics; noise and fluctuation problems in electronics; mixed-signal high-speed design and implementation of sensor read out circuits; error correcting circuits; RF electronics

Special Issue Information

Dear Colleagues,

Transmitters and receivers for cellular, WiFi and wireless personal area networks, networking interfaces and interfaces for hybrid RF/optical transceivers are some of the multiple electronics systems that constitute enabling technologies for high speed fixed point and mobile networking. To implement such devices, high speed RF and mixed signal circuits are greatly in need.

RF and mixed signal integrated circuits for high speed applications have dominated the semiconductor market during the last few years. This along with nanoscale integration capabilities permit the design and fabrication of low power miniature systems providing even more advantages for the exponential expansion of handheld devices into the global market.

This Special Issue aims to publish recent advances on RF and mixed signal circuits, giving more attention and focus on front-end transmitter and receiver high frequency circuits, circuits for front-end optical processing, A/D and D/A high-speed low consumption devices and high–speed data links, interfaces, and backplanes.

Representative topics of interest include the following:

  • Front-end transmitter and receiver circuits (PAs, LNAs, mixers, oscillators)
  • Front-end optical processing circuits (transimpedance amplifiers, limiters, modulators)
  • Wideband A/D and D/A converters, sample and hold / track and hold amplifiers
  • Techniques for system-on-chip (SoC) development of multiple radios, high performance FPGA interfaces
  • High speed interfaces such as USB and PCIe
  • Data serializers/ deserializers (SerDes), clock and data recovery circuits (CDRs)
  • High speed links, differential line modeling, signal integrity
  • Gigabit Ethernet transmission systems for vehicle networking, high throughput interconnects
Dr. Grigorios Kalivas
Prof. Dr. Alexios Birbas
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

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Published Papers (1 paper)

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Research

12 pages, 2862 KiB  
Article
A 5–50 GHz SiGe BiCMOS Linear Transimpedance Amplifier with 68 dBΩ Differential Gain towards Highly Integrated Quasi-Coherent Receivers
by Guillermo Silva Valdecasa, Jose A. Altabas, Monika Kupska, Jesper Bevensee Jensen and Tom K. Johansen
Electronics 2021, 10(19), 2349; https://doi.org/10.3390/electronics10192349 - 26 Sep 2021
Cited by 4 | Viewed by 2663
Abstract
Quasi-coherent optical receivers have recently emerged targeting access networks, offering improved sensitivity and reach over direct-detection schemes at the expense of a higher receiver bandwidth. Higher levels of system integration together with sufficiently wideband front-end blocks, and in particular high-speed linear transimpedance amplifiers [...] Read more.
Quasi-coherent optical receivers have recently emerged targeting access networks, offering improved sensitivity and reach over direct-detection schemes at the expense of a higher receiver bandwidth. Higher levels of system integration together with sufficiently wideband front-end blocks, and in particular high-speed linear transimpedance amplifiers (TIAs), are currently demanded to reduce cost and scale up receiver data rates. In this article, we report on the design and testing of a linear TIA enabling high-speed quasi-coherent receivers. A shunt-feedback loaded common-base topology is adopted, with gain control provided by a subsequent Gilbert cell stage. The circuit was fabricated in a commercial 130 nm SiGe BiCMOS technology and has a bandpass characteristic with a 3 dB bandwidth in the range of 5–50 GHz. A differential transimpedance gain of 68 dBΩ was measured, with 896 mVpp of maximum differential output swing at the 1 dB compression point. System experiments in a quasi-coherent receiver demonstrate an optical receiver sensitivity of −30.5 dBm (BER = 1 × 10−3) at 10 Gbps, and −26 dBm (BER = 1 × 10−3) at 25 Gbps. The proposed TIA represents an enabling component towards highly integrated quasi-coherent receivers. Full article
(This article belongs to the Special Issue RF and Mixed Signal High Speed Circuit Design)
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