Reconfigurable Computing and Real-Time Embedded Systems

Dear Colleagues,

Modern embedded real-time systems are characterized by an always-increasing demand for processing capabilities to serve computationally intensive workloads. For many tasks, hardware accelerators are an essential means to achieve the required level of performance, as in the case of future-generation workloads due to artificial intelligence. As a result, embedded platforms used in real-time systems are considerably more complex than in the past. For example, many challenges are introduced due to the contention produced by multiple cores and hardware accelerators when accessing the main memory or I/O devices, the scheduling policies implemented by the accelerator itself, and the network-based communication. These challenges call for solutions that allow guaranteeing the timing requirements of real-time applications – both from an analysis perspective, where the increased hardware complexity must be correctly captured to guarantee provably safe response time and latency bounds – and from a practical perspective, where suitable hardware and software mechanisms can be devised to arbitrate contention, allowing to increase the overall system’s predictability and performance.

Many application domains share these goals, including cyber-physical systems, IoT devices, future-generation autonomous-driving applications, robotics, Industry 4.0, smart-buildings, edge computing, and more.

Particular interest is attributed to emerging hardware accelerators based on the field-programmable gate array (FPGA) technology, especially to those embedded platforms that offer the possibility to dynamically - and partially -reconfigure the FPGA at runtime. Dynamic-partial reconfiguration provides a powerful and flexible way to dynamically deploy multiple accelerators, thus overcoming FPGA area constraints that would possibly not allow allocating all of them statically. Furthermore, FPGA-based accelerators offer the chance to analyze their timing behavior with a clock-level timing precision, thus resulting in a great fit for real-time systems.

In this Special Issue, we aim to collect high-quality submissions that include the theoretical, engineering, and application aspects of real-time embedded systems and reconfigurable systems.

The Special Issue will focus on (but is not limited to) the following topics:

• Real-time computing architectures
• Real-time network protocols
• Reconfigurable systems
• Dynamic partial reconfiguration
• Predictable access to shared memories, I/O devices, and accelerators
• Real-time virtualization
• Real-time robotics systems
• Resource scheduling and allocation in embedded real-time systems
• Optimization in real-time embedded and reconfigurable systems
• Hardware acceleration
• Predictable and efficient parallel applications
• Energy-and-power-aware allocation and scheduling
• Spatial and temporal isolation
• Floorplanning in FPGA
• Timing predictability for artificial intelligence
• Worst-case and probabilistic real-time guarantees

Prof. Dr. Alessandro Biondi
Dr. Daniel Casini
Guest Editors

Manuscript Submission Information

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• Embedded Systems
• Real-Time Systems
• Reconfigurable Computing
• Hardware Accelerators
• Real-Time Operating Systems
• Predictable Computing Platforms
• Edge Computing
• FPGA-based Accelerators
• GPU-based Accelerators