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Micromachines
Special Issues
Microelectronic Devices: Physics, Design and Applications
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Microelectronic Devices: Physics, Design and Applications

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "A：Physics".

Deadline for manuscript submissions: 30 November 2024 | Viewed by 3047

Special Issue Editor

Prof. Dr. Jun Zhang

E-Mail Website
Guest Editor
The College of Integrated Circuit Science and Engineering, Nanjing University of Posts and Telecommunications, Nanjing 210023, China
Interests: power device and integration; organic semiconductors; semiconductor device physics

Special Issue Information

Dear Colleagues,

With the aggressive scaling of CMOS technologies and constantly emerging diversified devices, semiconductor device modeling and designing techniques pose severe challenges to circuit and system designers, especially for RF/MW/mmW/THz/Power/optics. In particular, emerging semiconductor devices based on wide-band semiconductors or carbon-based semiconductors are leading devices in semiconductor physics and fabrication technologies. The Special Issue aims to strengthen communications among experts in the field, providing a forum for the presentation and discussion of leading-edge research and development results in analytical modeling, emerging devices, fabrication, and integration techniques for advanced devices, circuits, and technologies. Modeling and validation techniques of all solid-state devices, including, Si, III-V, power, nanoscale electronic structures, and other related new devices, are within the scope of this Special Issue. Accordingly, this Special Issue seeks to showcase research papers, communications, and review articles focusing on novel methodological developments in micro- and nano-scale semiconductor devices.

We look forward to receiving your submissions!

Prof. Dr. Jun Zhang
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • micro-nanoelectronics
  • emerging semiconductor devices
  • wide-band semiconductor
  • emerging fabrication techniques

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Further information on MDPI's Special Issue polices can be found here.

Published Papers (4 papers)

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Research

11 pages, 2199 KiB  
Article
Analysis of Signal Transmission Efficiency in Semiconductor Interconnect and Proposal of Enhanced Structures
by Tae Yeong Hong, Sarah Eunkyung Kim, Jong Kyung Park and Seul Ki Hong
Micromachines 2024, 15(10), 1207; https://doi.org/10.3390/mi15101207 - 28 Sep 2024
Viewed by 571
Abstract
As the demand for high-density, high-performance technologies in semiconductor systems increases, efforts are being made to mitigate and optimize the issues of high current density and heat generation within interconnects to ensure reliability. While interconnects are the most fundamental pathways for transmitting current [...] Read more.
As the demand for high-density, high-performance technologies in semiconductor systems increases, efforts are being made to mitigate and optimize the issues of high current density and heat generation within interconnects to ensure reliability. While interconnects are the most fundamental pathways for transmitting current signals, there has been relatively little research conducted on them compared to individual unit devices from the perspective of overall system performance. However, as integration density increases, the amount of loss in interconnects also rises, necessitating research and development to minimize these losses. In this study, we propose a method to analyze power efficiency by utilizing the differences between simulation results and measured results of interconnect structures. We confirmed that the difference between theoretical resistance values and actual measured values varies with the contact area ratio between metal lines and vias, and we analyzed the power efficiency based on these differences. Using the findings, we proposed and validated a structure that can improve power efficiency. This study presents a method to analyze power efficiency and suggests ways to achieve higher power efficiency within the limited specifications of interconnects. This contributes to enhancing power efficiency and ensuring reliability, thereby preserving the performance of the overall system in highly integrated semiconductor systems. Full article
(This article belongs to the Special Issue Microelectronic Devices: Physics, Design and Applications)
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21 pages, 9961 KiB  
Article
Electrical Capacitors Based on Silicone Oil and Iron Oxide Microfibers: Effects of the Magnetic Field on the Electrical Susceptance and Conductance
by Ioan Bica, Eugen Mircea Anitas and Gabriela Eugenia Iacobescu
Micromachines 2024, 15(8), 953; https://doi.org/10.3390/mi15080953 - 25 Jul 2024
Viewed by 552
Abstract
This paper presents the fabrication and characterization of plane capacitors utilizing magnetodielectric materials composed of magnetizable microfibers dispersed within a silicone oil matrix. The microfibers, with a mean diameter of about 0.94 μm, comprise hematite (α-Fe2O3), [...] Read more.
This paper presents the fabrication and characterization of plane capacitors utilizing magnetodielectric materials composed of magnetizable microfibers dispersed within a silicone oil matrix. The microfibers, with a mean diameter of about 0.94 μm, comprise hematite (α-Fe2O3), maghemite (γ-Fe2O3), and magnetite (Fe3O4). This study investigates the electrical behavior of these capacitors under the influence of an external magnetic field superimposed on a medium-frequency alternating electric field, across four distinct volume concentrations of microfibers. Electrical capacitance and resistance measurements were conducted every second over a 60-s interval, revealing significant dependencies on both the quantity of magnetizable phase and the applied magnetic flux density. Furthermore, the temporal stability of the capacitors’ characteristics is demonstrated. The obtained data are analyzed to determine the electrical conductance and susceptance of the capacitors, elucidating their sensitivity to variations in microfiber concentration and magnetic field strength. To provide theoretical insight into the observed phenomena, a model based on dipolar approximations is proposed. This model effectively explains the underlying physical mechanisms governing the electrical properties of the capacitors. These findings offer valuable insights into the design and optimization of magnetodielectric-based capacitors for diverse applications in microelectronics and sensor technologies. Full article
(This article belongs to the Special Issue Microelectronic Devices: Physics, Design and Applications)
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13 pages, 3812 KiB  
Article
A 30–60 GHz Broadband Low LO-Drive Down-Conversion Mixer with Active IF Balun in 65 nm CMOS Technology
by Rong Wang and Jincai Wen
Micromachines 2024, 15(7), 845; https://doi.org/10.3390/mi15070845 - 29 Jun 2024
Viewed by 663
Abstract
A 30~60 GHz broadband down-conversion mixer driven by low local oscillator (LO) power is presented. The down-conversion mixer utilizes an input signal coupling technique based on the Marchand balun to achieve broadband operation and achieves low LO power drive and low DC power [...] Read more.
A 30~60 GHz broadband down-conversion mixer driven by low local oscillator (LO) power is presented. The down-conversion mixer utilizes an input signal coupling technique based on the Marchand balun to achieve broadband operation and achieves low LO power drive and low DC power consumption through the use of a weak inversion bias with Gilbert switching devices. The broadband conversion of single-ended to differential signals is achieved using the Marchand balun with compensation lines, and an equivalent circuit analysis is performed. For the intermediate frequency (IF) output, a self-biased IF trans-impedance amplifier with current reusing and an active IF balun structure are used to achieve signal amplification and single-ended signal output. Test results show that the proposed mixer achieves a conversion gain of −1.2 to 6.4 dB in an IF output bandwidth of 0.1 to 5 GHz at radio frequency (RF) input frequencies of 30 to 60 GHz and LO driving power of −10 dBm. The DC power consumption of the core mixing unit of the proposed mixer is 4.8 mW, and the DC power consumption including the IF amplifier is 28.3 mW. The proposed mixer uses a 65 nm CMOS technology with a chip area of 0.26 mm2. Full article
(This article belongs to the Special Issue Microelectronic Devices: Physics, Design and Applications)
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13 pages, 5896 KiB  
Article
A Novel 4H-SiC Asymmetric MOSFET with Step Trench
by Zhong Lan, Yangjie Ou, Xiarong Hu and Dong Liu
Micromachines 2024, 15(6), 724; https://doi.org/10.3390/mi15060724 - 30 May 2024
Viewed by 880
Abstract
In this article, a silicon carbide (SiC) asymmetric MOSFET with a step trench (AST-MOS) is proposed and investigated. The AST-MOS features a step trench with an extra electron current path on one side, thereby increasing the channel density of the device. A thick [...] Read more.
In this article, a silicon carbide (SiC) asymmetric MOSFET with a step trench (AST-MOS) is proposed and investigated. The AST-MOS features a step trench with an extra electron current path on one side, thereby increasing the channel density of the device. A thick oxide layer is also employed at the bottom of the step trench, which is used as a new voltage-withstanding region. Furthermore, the ratio of the gate-to-drain capacitance (Cgd) to the gate-to-source capacitance (Cgs) is significantly reduced in the AST-MOS. As a result, the AST-MOS compared with the double-trench MOSFET (DT-MOS) and deep double-trench MOSFET (DDT-MOS), is demonstrated to have an increase of 200 V and 50 V in the breakdown voltage (BV), decreases of 21.8% and 10% in the specific on-resistance (Ron,sp), a reduction of about 1 V in the induced crosstalk voltage, and lower switching loss. Additionally, the trade-off between the resistance of the JFET region (RJFET) and the electric field in the gate oxide (Eox) is studied for a step trench and a deep trench. The improved performances suggest that a step trench is a competitive option in advanced device design. Full article
(This article belongs to the Special Issue Microelectronic Devices: Physics, Design and Applications)
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