Search Results (16)

Proton and heavy ion irradiation experiments were carried out on Cascode GaN HEMT devices. Results show that device degradation from heavy ion irradiation is more significant than from proton irradiation. Under proton irradiation, obvious device degradation occurred. Low-frequency noise testing revealed a notable increase in internal defect density, reducing channel carrier concentration and mobility, and causing electrical performance degradation. Under heavy ion irradiation, devices suffered from single-event burnout (SEB) and exhibited increased leakage current. Failure analysis of post-irradiation devices showed that those with leakage current increase had conductive channels without morphological changes, while burned out devices showed obvious damage between the gate and drain regions. SRIM simulation indicated that ionization energy loss-induced electron–hole pairs and displacement damage from nuclear energy loss were the main causes of degradation. Sentaurus TCAD simulation of heavy ion irradiated GaN HEMT devices confirmed the mechanisms of leakage current increase and SEB. Full article

The U-shaped Metal-Oxide-Semiconductor Field-Effect Transistor (UMOS or trench FET) is one of the most widely used semiconductor power devices worldwide, increasingly replacing the traditional vertical double-diffused MOSFET (DMOSFET) in various applications due to its superior electrical performance. However, a detailed experimental comparison of ion-induced Single-Event Burnout (SEB) in similarly rated silicon (Si) UMOS and DMOS devices remains lacking. This study presents a comprehensive experimental comparison of ion-induced charge collection mechanisms and SEB susceptibility in similarly rated Si UMOS and DMOS devices. Charge collection mechanisms due to alpha particles from ²⁴¹Am radiation source are analyzed, and SEB cross sections induced by heavy ions from particle accelerators are directly compared. The implications of the unique gate structure of Si UMOSFETs on their reliability in harsh radiation environments are discussed based on technology computer-aided design (TCAD) simulations. Full article

In this work, the single-event burnout (SEB) effect and degradation behaviors induced by heavy-ion irradiation are investigated in a 120 V-rated transverse split-gate trench (TSGT) power metal-oxide-semiconductor field-effect transistor (MOSFET). Bismuth heavy-ions are used to conduct heavy-ion irradiation tests. The experimental results show that the SEB failure threshold voltage (V_SEB) of the tested sample is 72 V, which only accounts for 52.6% of the actual breakdown voltage of the device. The V_SEB value decreased with the increase in the flux. The simulation results show that the local “hot spot” formed after the incident heavy ion is an important reason for the drain current degradation of TSGT MOSFETs. To improve the single-event effect tolerance of TSGT MOSFETs, an SEB hardening method based on process optimization is proposed in this paper, which does not require additional customized epitaxial wafers. The simulation results show that, after SEB hardening, the V_SEB is increased to 115 V, which accounts for 89.1% of the breakdown voltage. Full article

The primary objective of this research is to comprehensively investigate the equivalence of single-event effects (SEEs) in silicon carbide metal-oxide semiconductor field-effect transistors (SiC MOSFETs) that are induced by protons and heavy ions. The samples utilized in the experiments are the fourth-generation symmetric groove gate SiC MOSFETs. Proton irradiation experiments were meticulously executed at varying energies, namely 70 MeV, 100 MeV, and 200 MeV, while heavy-ion irradiation was carried out using 138 MeV Cl ions. During these experiments, the drain–source current (I_DS) and drain–source voltage (V_DS) were continuously and precisely monitored in real time. Experimental results demonstrate that single-event burnout (SEB) susceptibility correlates strongly with proton energy and applied drain–source bias. Notably, SiC MOSFETs exhibit a stronger tolerance to proton SEB compared to heavy-ion SEB. Proton irradiation results in a sudden elevation in I_DS, whereas heavy-ion irradiation leads to a gradual increase. In summary, the mechanism underlying proton-induced SEE is intricately related to the ionization of secondary particles. Future research endeavors should place a greater emphasis on comprehensively considering proton effects to establish a more complete and effective evaluation system for SiC MOSFET SEEs. Full article

As a prominent focus in high-voltage power devices, SiC MOSFETs have broad application prospects in the aerospace field. Due to the unique characteristics of the space radiation environment, the reliability of SiC MOSFETs concerning single-event effects (SEEs) has garnered widespread attention. In this study, we employed accelerator-heavy ion irradiation experiments to study the degradation characteristics for SEEs of 1.2 kV SiC MOSFETs under different bias voltages and temperature conditions. The experimental results indicate that when the drain-source voltage (V_DS) exceeds 300 V, the device leakage current increases sharply, and even single-event burnout (SEB) occurs. Furthermore, a negative gate bias (V_GS) can make SEB more likely via gate damage and Poole–Frenkel emission (PF), reducing the V_DS threshold of the device. The radiation degradation behavior of SiC MOSFETs at different temperatures was compared and analyzed, showing that although high temperatures can increase the safe operating voltage of V_DS, they can also cause more severe latent gate damage. Through an in-depth analysis of the experimental data, the physical mechanism by which heavy ion irradiation causes gate leakage in SiC MOSFETs was explored. These research findings provide an essential basis for the reliable design of SiC MOSFETs in aerospace applications. Full article

In this paper, the single-event burnout (SEB) and reinforcement structure of 1200 V SiC MOSFET (SG-SBD-MOSFET) with split gate and Schottky barrier diode (SBD) embedded were studied. The device structure was established using Sentaurus TCAD, and the transient current changes of single-event effect (SEE), SEB threshold voltage, as well as the regularity of electric field peak distribution transfer were studied when heavy ions were incident from different regions of the device. Based on SEE analysis of the new structural device, two reinforcement structure designs for SEB resistance were studied, namely the expansion of the P+ body contact area and the design of a multi-layer N-type interval buffer layer. Firstly, two reinforcement schemes for SEB were analyzed separately, and then comprehensive design and analysis were carried out. The results showed that the SEB threshold voltage of heavy ions incident from the N+ source region was increased by 16% when using the P+ body contact area extension alone; when the device is reinforced with a multi-layer N-type interval buffer layer alone, the SEB threshold voltage increases by 29%; the comprehensive use of the P+ body contact area expansion and a multi-layer N-type interval buffer layer reinforcement increased the SEB threshold voltage by 33%. Overall, the breakdown voltage of the reinforced device decreased from 1632.935 V to 1403.135 V, which can be seen as reducing the remaining redundant voltage to 17%. The device’s performance was not significantly affected. Full article

Radiation hardening of power MOSFETs (metal oxide semiconductor field effect transistors) is of the highest priority for sustaining high-power systems in the space radiation environment. Silicon carbide (SiC)-based power electronics are being investigated as a strong alternative for high power spaceborne power electronic systems. SiC MOSFETs have been shown to be most prone to single-event burnout (SEB) from space radiation. The current knowledge of SiC MOSFET device degradation and failure mechanisms are reviewed in this paper. Additionally, the viability of radiation tolerant SiC MOSFET designs and the modeling methods of SEB phenomena are evaluated. A merit system is proposed to consider the performance of radiation tolerance and nominal electrical performance. Criteria needed for high-fidelity SEB simulations are also reviewed. This paper stands as a necessary analytical review to intercede the development of radiation-hardened power devices for space and extreme environment applications. Full article

Accelerated neutron tests on silicon (Si) and silicon carbide (SiC) power MOSFETs at different temperatures and drain bias voltages were performed at the ChipIr facility (Didcot, UK). A super-junction silicon MOSFET and planar SiC MOSFETs with different technologies made by STMicroelectronics were used. Different test methods were employed to investigate the effects of temperature on neutron susceptibility in power MOSFETs. The destructive tests showed that all investigated devices failed via a single-event burnout (SEB) mechanism. Non-destructive tests conducted by using the power MOSFET as a neutron detector allowed measuring the temperature trend of the deposited charge due to neutron interactions. The results of the destructive tests, in the −50 °C–180 °C temperature range, revealed the lack of a common trend concerning the FIT temperature dependence among the investigated SiC power MOSFETs. Moreover, for some test vehicles, the FIT-temperature curves were dependent on the bias condition. The temperature dependence of the FIT values, observed in some SiC devices, is weaker with respect to that measured in the Si MOSFET. The results of the non-destructive tests showed a good correlation between the temperature trends of the deposited charge with those of FIT data, for both Si and SiC devices. Full article

The single-event effect reliability issue is one of the most critical concerns in the context of space applications for SiC VDMOS. In this paper, the SEE characteristics and mechanisms of the proposed deep trench gate superjunction (DTSJ), conventional trench gate superjunction (CTSJ), conventional trench gate (CT), and conventional planar gate (CT) SiC VDMOS are comprehensively analyzed and simulated. Extensive simulations demonstrate the maximum SET current peaks of DTSJ−, CTSJ−, CT−, and CP SiC VDMOS, which are 188 mA, 218 mA, 242 mA, and 255 mA, with a bias voltage V_DS of 300 V and LET = 120 MeV·cm²/mg, respectively. The total charges of DTSJ−, CTSJ−, CT−, and CP SiC VDMOS collected at the drain are 320 pC, 1100 pC, 885 pC, and 567 pC, respectively. A definition and calculation of the charge enhancement factor (CEF) are proposed. The CEF values of DTSJ−, CTSJ−, CT−, and CP SiC VDMOS are 43, 160, 117, and 55, respectively. Compared with CTSJ−, CT−, and CP SiC VDMOS, the total charge and CEF of the DTSJ SiC VDMOS are reduced by 70.9%, 62.4%, 43.6% and 73.1%, 63.2%, and 21.8%, respectively. The maximum SET lattice temperature of the DTSJ SiC VDMOS is less than 2823 K under the wide operating conditions of a drain bias voltage V_DS ranging from 100 V to 1100 V and a LET value ranging from 1 MeV·cm²/mg to 120 MeV·cm²/mg, while the maximum SET lattice temperatures of the other three SiC VDMOS significantly exceed 3100 K. The SEGR LET thresholds of DTSJ−, CTSJ−, CT−, and CP SiC VDMOS are approximately 100 MeV·cm²/mg, 15 MeV·cm²/mg, 15 MeV·cm²/mg, and 60 MeV·cm²/mg, respectively, while the value of V_DS = 1100 V. Full article

Power MOSFETs are found to be very vulnerable to single-event burnout (SEB) in space irradiation environments, and the military components generally require that devices could operate reliably as the temperature varies from 218 K to 423 K (−55 °C to 150 °C); thus, the temperature dependence of single-event burnout (SEB) in power MOSFETs should be investigated. Our simulation results showed that the Si power MOSFETs are more tolerant to SEB at a higher temperature at the lower LET (10 MeV∙cm²/mg) due to the decrease of the impact ionization rate, which is in good agreement with the previous research. However, the state of the parasitic BJT plays a primary role in the SEB failure mechanism when the LET value is greater than 40 MeV∙cm²/mg, which exhibits a completely different temperature dependence from that of 10 MeV∙cm²/mg. Results indicate that with the temperature increasing, the lower difficulty to turn on the parasitic BJT and the increasing current gain all make it easier to build up the regenerative feedback process responsible for SEB failure. As a result, the SEB susceptibility of power MOSFETs increases as ambient temperature increases when the LET value is greater than 40 MeV∙cm²/mg. Full article

With the development of space exploration, high-power and high-voltage power systems are essential for future spacecraft applications. Because of the effects of space radiation such as single event burnout (SEB), the rated voltage of power devices in converters for a spacecraft power system is limited to a level much lower than that for traditional ground applications. Thus, multi-level DC/DC converters are good choices for high-voltage applications in spacecraft. In this paper, a fault-tolerant strategy is proposed for a three-level flying capacitor DC/DC converter to increase the reliability with minimal cost. There is no extra hardware needed for the proposed strategy; the fault tolerance of the converter is only achieved by changing the software control strategy. A stage analysis of the proposed strategy is provided in detail for different fault locations and ratios between the input and output voltage. Finally, a simulation model and prototype are built to verify the effectiveness of the proposed strategy. Full article

In this paper, a novel super-junction trench silicon-on-insulator laterally-diffused metal-oxide-semiconductor (SJT SOI LDMOS) power device with additional hole leakage paths to improve single-event burnout (SEB) performance under high liner energy transfer (LET) is proposed for the first time. The electrical characteristics and SEB performance of the proposed SJT SOI LDMOS are both enhanced effectively. The replacement of a lightly doped N drift region with a heavily doped P pillar and N pillar considerably improves the tradeoff between breakdown voltage (BV_DS) and specific on-resistance (R_on,sp). Compared with the conventional trench SOI LDMOS (CT SOI LDMOS), the static figures of merit (FOM, BV_DS²/R_on,sp) of the SJT SOI LDMOS increases by 239%. The SEB performance of the SJT SOI LDMOS is significantly improved as the holes induced by the heavy ion can be quickly absorbed to the trench source metal through the heavily doped P+ region and P buried region rather than the base resistor of the parasitic bipolar junction transistor (BJT). The SEB threshold voltage (V_SEB) of the CT SOI LDMOS is 58 V (39% of the BV_DS) and that of the SJT SOI LDMOS is up to 173 V (87% of the BV_DS) at high LET of 1 pC/μm. Full article

Single event burnout (SEB) is a great threat to gallium nitride (GaN) power devices for aerospace applications. This paper is dedicated to the investigation of the SEB mechanism in a GaN power device using a femtosecond pulsed laser. In the test, the SEB of a commercial p-GaN power device was triggered by a focused laser beam with a wavelength of 620 nm, and the irradiation-sensitive area of the devices was identified. We observed that the damage modes were consistent with the results of heavy ion experiments. The vertical breakdown of the drain is proposed as the dominant mechanism of SEB. We also provide a schematic representation of the leakage path formation using the electrical data obtained following laser-induced SEB. This study provides an important reference for consideration of device reliability and application prospects. Full article

An attractive candidate for space and aeronautic applications is the high-power and miniaturizing electric propulsion technology device, the gallium nitride high electron mobility transistor (GaN HEMT), which is representative of wide bandgap power electronic devices. The cascode AlGaN/GaN HEMT is a common structure typically composed of a high-voltage depletion-mode AlGaN/GaN HEMT and low-voltage enhancement-mode silicon (Si) MOSFET connected by a cascode structure to realize its enhancement mode. It is well known that low-voltage Si MOSFET is insensitive to single event burnout (SEB). Therefore, this paper mainly focuses on the single event effects of the cascode AlGaN/GaN HEMT using technical computer-aided design (TCAD) simulation and heavy-ion experiments. The influences of heavy-ion energy, track length, and track position on the single event effects for the depletion-mode AlGaN/GaN HEMT were studied using TCAD simulation. The results showed that a leakage channel between the gate electrode and drain electrode in depletion-mode AlGaN/GaN HEMT was formed after heavy-ion striking. The enhancement of the ionization mechanism at the edge of the gate might be an important factor for the leakage channel. To further study the SEB effect in AlGaN/GaN HEMT, the heavy-ion test of a cascode AlGaN/GaN HEMT was carried out. SEB was observed in the heavy-ion irradiation experiment and the leakage channel was found between the gate and drain region in the depletion-mode AlGaN/GaN HEMT. The heavy-ion irradiation experimental results proved reasonable for the SEB simulation for AlGaN/GaN HEMT with a cascode structure. Full article

Neutron test campaigns on silicon (Si) and silicon carbide (SiC) power MOSFETs and IGBTs were conducted at the TRIGA (Training, Research, Isotopes, General Atomics) Mark II (Pavia, Italy) nuclear reactor and ChipIr-ISIS Neutron and Muon Source (Didcot, U.K.) facility. About 2000 power transistors made by STMicroelectronics were tested in all the experiments. Tests with thermal and fast neutrons (up to about 10 MeV) at the TRIGA Mark II reactor showed that single-event burnout (SEB) failures only occurred at voltages close to the rated drain-source voltage. Thermal neutrons did not induce SEB, nor degradation in the electrical parameters of the devices. SEB failures during testing at ChipIr with ultra-fast neutrons (1-800 MeV) were evaluated in terms of failure in time (FIT) versus derating voltage curves according to the JEP151 procedure of the Joint Electron Device Engineering Council (JEDEC). These curves, even if scaled with die size and avalanche voltage, were strongly linked to the technological processes of the devices, although a common trend was observed that highlighted commonalities among the failures of different types of MOSFETs. In both experiments, we observed only SEB failures without single-event gate rupture (SEGR) during the tests. None of the power devices that survived the neutron tests were degraded in their electrical performances. A study of the worst-case bias condition (gate and/or drain) during irradiation was performed. Full article