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18 pages, 6135 KiB  
Article
A Microgrid Simulation Platform Based on Cyber-Physical Technology
by Dongli Jia, Xiaoyu Yang, Wanxing Sheng, Keyan Liu, Kaitong Yang, Xiaoming Li and Weijie Dong
Processes 2025, 13(5), 1441; https://doi.org/10.3390/pr13051441 - 8 May 2025
Abstract
With the transformation of energy structure and the development of new power systems, higher requirements have been put forward for the performance and stability of microgrids. To adapt to the multi-information, multi-energy, and multi-business characteristics of microgrids, this paper proposes a cyber-physical system [...] Read more.
With the transformation of energy structure and the development of new power systems, higher requirements have been put forward for the performance and stability of microgrids. To adapt to the multi-information, multi-energy, and multi-business characteristics of microgrids, this paper proposes a cyber-physical system (CPS) based a microgrid simulation platform, which constructs an integration architecture composed of the physical system, main station system, and strategy simulation system. Through the interaction of information and energy businesses, real-time reproduction and state control of business scenarios are achieved. The platform innovatively introduces the theory of finite state machine (FSM) and designs a state transition strategy. Taking fault optimization as an example, the optimal path can be selected through state transition, and the system fault optimization effect is improved based on FSM. Compared to traditional methods, this platform reduces simulation time by 16% to 86.6%, significantly shortening scene reproduction time. In addition, the practical application value of the platform in fault optimization and operational efficiency improvement was verified by building a semi-physical simulation system based on a rapid control prototype (RCP) and hardware-in-the-loop testing (HIL). Full article
(This article belongs to the Section Energy Systems)
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17 pages, 15127 KiB  
Article
Toward Automated Coronal Observations: A New Integrated System Based on the Lijiang 10 cm Coronagraph
by Tengfei Song, Yu Liu, Xuefei Zhang, Mingyu Zhao, Xiaobo Li, Qiwang Luo, Feiyang Sha, Qiang Liu, Jacob Oloketuyi and Xinjian Wang
Universe 2025, 11(5), 154; https://doi.org/10.3390/universe11050154 - 7 May 2025
Abstract
About ten years ago, we established the first coronagraph that has been continuously operating on the high plateau of western China. This coronagraph is an internal occulting, 10 cm aperture instrument, installed at Lijiang Station through a collaboration with the Norikura Station of [...] Read more.
About ten years ago, we established the first coronagraph that has been continuously operating on the high plateau of western China. This coronagraph is an internal occulting, 10 cm aperture instrument, installed at Lijiang Station through a collaboration with the Norikura Station of the National Astronomical Observatory of Japan. To ensure high efficiency in current and future coronal observations, developing integrated observation systems is essential for reliable, autonomous, and remote operation of coronagraphs. This paper introduces an advanced integrated observation and control system, based on the Lijiang 10 cm coronagraph. The coronagraph focuses on the observations for the solar inner corona, capturing the coronal green-line emission within a field range from 1.03R to 2.5R. To enhance the observational precision and efficiency, a comprehensive integrated system has been designed, incorporating various subsystems, including precise pointing and tracking mechanisms, a multi-band filter system, a protective dome system, and a robust data storage infrastructure. This paper details the hardware architecture and software frameworks supporting each subsystem. Results from extended operational testing confirm the stability of the system, its capacity for autonomous and remote observations, and significant improvements in the automation and efficiency of coronal imaging. The automated observation system will be further improved and used for our future coronagraphs to be developed for coronal magnetism diagnosis. Full article
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27 pages, 3753 KiB  
Article
Empirical Insights into Economic Viability: Integrating Bitcoin Mining with Biorefineries Using a Stochastic Model
by Georgeio Semaan, Guizhou Wang, Tunç Durmaz and Gopalakrishnan Kumar
Systems 2025, 13(5), 359; https://doi.org/10.3390/systems13050359 - 7 May 2025
Abstract
This study explores integrating Bitcoin mining with lignocellulosic biorefineries to create an additional revenue stream. Profits from mining can help offset internal costs, reduce business expenses, or lower consumer prices. Using sensitivity analysis and Monte Carlo simulations, this study identifies key profitability drivers, [...] Read more.
This study explores integrating Bitcoin mining with lignocellulosic biorefineries to create an additional revenue stream. Profits from mining can help offset internal costs, reduce business expenses, or lower consumer prices. Using sensitivity analysis and Monte Carlo simulations, this study identifies key profitability drivers, such as electricity costs, hardware expenses, starting year, and operational time. Time emerged as an extremely sensitive factor and showed that delaying mining operations significantly raised production costs and the probability of profitable outcomes. In contrast, longer mining durations had a smaller yet sizable impact. Hardware costs, computational efficiency, and electricity prices also strongly influenced the outcomes. The majority of simulated events showed a loss. Moreover, the model showed that the marginal profitability of mining decreases over time. Nonetheless, the model demonstrated that under favourable conditions, it is possible to integrate Bitcoin mining into biorefineries and other productive ventures, thereby allowing for cost recovery using Bitcoin profits. For a biorefinery to mine Bitcoin and maximise cost recovery, it must start early, access low electricity prices, and preserve hardware capital characterised by low expenditure and high revenues. Finally, a discussion about the opportunities, risks, and regulations is highlighted. Full article
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17 pages, 4831 KiB  
Article
Achieving Low-Latency, High-Throughput Online Partial Particle Identification for the NA62 Experiment Using FPGAs and Machine Learning
by Pierpaolo Perticaroli, Roberto Ammendola, Andrea Biagioni, Carlotta Chiarini, Andrea Ciardiello, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Michele Martinelli, Roberto Piandani, Luca Pontisso, Mauro Raggi, Cristian Rossi, Francesco Simula, Matteo Turisini, Piero Vicini and Alessandro Lonardo
Electronics 2025, 14(9), 1892; https://doi.org/10.3390/electronics14091892 - 7 May 2025
Abstract
FPGA-RICH is an FPGA-based online partial particle identification system for the NA62 experiment employing AI techniques. Integrated between the readout of the Ring Imaging Cherenkov detector (RICH) and the low-level trigger processor (L0TP+), FPGA-RICH implements a fast pipeline to process in real-time the [...] Read more.
FPGA-RICH is an FPGA-based online partial particle identification system for the NA62 experiment employing AI techniques. Integrated between the readout of the Ring Imaging Cherenkov detector (RICH) and the low-level trigger processor (L0TP+), FPGA-RICH implements a fast pipeline to process in real-time the RICH raw hit data stream, producing trigger primitives containing elaborate physics information—e.g., the number of charged particles in a physics event—that L0TP+ can use to improve trigger decision efficiency. Deployed on a single FPGA, the system combines classical online processing with a compact Neural Network algorithm to achieve efficient event classification while managing the challenging ∼10 MHz throughput requirement of NA62. The streaming pipeline ensures ∼1 μs latency, comparable to that of the NA62 detectors, allowing its seamless integration in the existing TDAQ setup as an additional detector. Development leverages High-Level Synthesis (HLS) and the open-source hls4ml package software–hardware codesign workflow, enabling fast and flexible reprogramming, debugging, and performance optimization. We describe the implementation of the full processing pipeline, the Neural Network classifier, their functional validation, performance metrics and the system’s current status and outlook. Full article
(This article belongs to the Special Issue Emerging Applications of FPGAs and Reconfigurable Computing System)
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15 pages, 16074 KiB  
Article
Design on Power Factor Correction of a Digital Soft Switching Single-Phase Arc Welding Power Source
by Xiaoqing Lv and Minhao Jiang
Materials 2025, 18(9), 2138; https://doi.org/10.3390/ma18092138 - 6 May 2025
Abstract
A power factor correction circuit for a single-phase arc welding power source using digital soft switching technology is proposed. The overall hardware structure of the system, the topology principle of the selected soft switch boost circuit, and the software design approach are discussed. [...] Read more.
A power factor correction circuit for a single-phase arc welding power source using digital soft switching technology is proposed. The overall hardware structure of the system, the topology principle of the selected soft switch boost circuit, and the software design approach are discussed. The power factor correction results of the soft switch are verified under two conditions: electronic load and TIG arc welding. By using the electrical signals of the resonating capacitor and switching tube, it is confirmed that the circuit successfully achieved zero current conduction and zero voltage turn off. Through testing the power factor and efficiency of electronic loads at different powers, it was confirmed that the power factor can reach 0.985 or above, and the overall efficiency has been improved. Through TIG arc welding experiments under different welding currents, the corrected electrical signals are analyzed to verify the effectiveness of power factor correction for single-phase arc welding power. Full article
(This article belongs to the Section Metals and Alloys)
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28 pages, 11617 KiB  
Article
PS-YOLO: A Lighter and Faster Network for UAV Object Detection
by Han Zhong, Yan Zhang, Zhiguang Shi, Yu Zhang and Liang Zhao
Remote Sens. 2025, 17(9), 1641; https://doi.org/10.3390/rs17091641 - 6 May 2025
Abstract
The operational environment of UAVs poses unique challenges for object detection compared to conventional methods. When UAVs capture remote sensing images from elevated altitudes, objects often appear minuscule and can be easily obscured by complex backgrounds. This increases the likelihood of false positives [...] Read more.
The operational environment of UAVs poses unique challenges for object detection compared to conventional methods. When UAVs capture remote sensing images from elevated altitudes, objects often appear minuscule and can be easily obscured by complex backgrounds. This increases the likelihood of false positives and missed detections, thereby complicating the detection process. Furthermore, the hardware resources available on UAV platforms are typically highly constrained. To meet deployment requirements, researchers often must compromise some detection accuracy in favor of a more lightweight model. To address these challenges, we propose PS-YOLO, a fast and precise network specifically designed for UAV-based object detection. In the proposed network, we first design a lightweight backbone based on partial convolution. Then, we introduce a more efficient neck network called FasterBIFFPN to replace the original PAFPN, enabling more effective multi-scale feature fusion. Finally, we propose the GSCD head. GSCD employs shared convolutions to enhance the network’s ability to learn common features across objects of different scales and introduces Normalized Gaussian Wasserstein Distance Loss (NWDLoss) to improve detection accuracy. This detection head effectively increases inference speed without significantly increasing parameter counts. The proposed PS-YOLO is validated on the Visdrone2019 dataset, and the results demonstrate that PS-YOLO provides a 2% improvement in precision, 0.5% improvement in recall, 1.3% improvement in mean average precision (mAP), 41.3% reduction in parameter counts, 6.1% reduction in computational cost, and 26.73 FPS improvement in inference speed compared to the benchmark model YOLOv11-s. Full article
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25 pages, 3464 KiB  
Article
A Comparative Analysis of the Usability of Consumer Graphics Cards for Deep Learning in the Aspects of Inland Navigational Signs Detection for Vision Systems
by Pawel Adamski and Jacek Lubczonek
Appl. Sci. 2025, 15(9), 5142; https://doi.org/10.3390/app15095142 - 6 May 2025
Viewed by 72
Abstract
Consumer-grade graphics processing units (GPUs) offer a potentially affordable and energy-efficient alternative to enterprise-class hardware for real-time image processing tasks, but systematic multi-criteria analyses of their suitability remain rare. This article fills that gap by evaluating the performance, power consumption, and cost-effectiveness of [...] Read more.
Consumer-grade graphics processing units (GPUs) offer a potentially affordable and energy-efficient alternative to enterprise-class hardware for real-time image processing tasks, but systematic multi-criteria analyses of their suitability remain rare. This article fills that gap by evaluating the performance, power consumption, and cost-effectiveness of GPUs from three leading vendors, AMD, Intel, and Nvidia, in an inland water transport (ITW) context. The main objective is to assess the feasibility of using consumer GPUs for deep learning tasks involving navigational sign detection, a critical component for ensuring safe and efficient inland transportation. The evaluation includes the use of image datasets of inland water transport signs processed by widely used detector and classifier models such as YOLO (you only look once), ResNet (residual neural network l), and MobileNet. To achieve this, we propose a multi-criteria framework based on a weighted scoring method (WSM), covering 21 different characteristics such as compatibility, resting power, energy efficiency in learning and inference, and the financial threshold for technology adoption. The results confirm that consumer-grade GPUs can deliver competitive performance with lower initial costs and lower power consumption. The findings underscore the enduring value of our analysis, as its framework can be adapted for ongoing comparisons of evolving GPU technologies using the proposed methodology. Full article
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28 pages, 7959 KiB  
Article
Current-Adaptive Control for Efficiency Enhancement in Interleaved Converters for Battery Energy Storage Systems
by Andrej Brandis, Kristian Knol and Denis Pelin
Electronics 2025, 14(9), 1862; https://doi.org/10.3390/electronics14091862 - 2 May 2025
Viewed by 122
Abstract
Battery energy storage systems are essential for grid stability and the efficient integration of renewable energy sources. Their performance is influenced by the efficiency of bidirectional converters, particularly under varying load conditions. This study presents a novel current-adaptive control strategy for a two-stage [...] Read more.
Battery energy storage systems are essential for grid stability and the efficient integration of renewable energy sources. Their performance is influenced by the efficiency of bidirectional converters, particularly under varying load conditions. This study presents a novel current-adaptive control strategy for a two-stage non-isolated bidirectional DC-DC converter designed to dynamically adjust the number of active branches based on real-time load variations. The proposed approach introduces a current-adaptive algorithm for branch activation and deactivation, combined with real-time temperature-based control decision making, which has not been explored in existing studies. The validation was conducted using real-time Hardware-in-the-Loop simulation with the Typhoon HIL 402 system, ensuring accurate system representation. The results show an increase in average efficiency from 77.69% to 83.15% in Buck mode and from 81.00% to 83.71% in Boost mode, with a reduction in average power losses by 8.67% and 13.31%, respectively. These findings underscore the need for further research on temperature-adaptive control for efficiency optimization and thermal management, which is currently ongoing and will be expanded in future work. Future efforts will focus on experimental validation using a physical prototype and further refinement of temperature-adaptive control strategies. Full article
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29 pages, 6623 KiB  
Article
Exploring Smartphone-Based Edge AI Inferences Using Real Testbeds
by Matías Hirsch, Cristian Mateos and Tim A. Majchrzak
Sensors 2025, 25(9), 2875; https://doi.org/10.3390/s25092875 - 2 May 2025
Viewed by 240
Abstract
The increasing availability of lightweight pre-trained models and AI execution frameworks is causing edge AI to become ubiquitous. Particularly, deep learning (DL) models are being used in computer vision (CV) for performing object recognition and image classification tasks in various application domains requiring [...] Read more.
The increasing availability of lightweight pre-trained models and AI execution frameworks is causing edge AI to become ubiquitous. Particularly, deep learning (DL) models are being used in computer vision (CV) for performing object recognition and image classification tasks in various application domains requiring prompt inferences. Regarding edge AI task execution platforms, some approaches show a strong dependency on cloud resources to complement the computing power offered by local nodes. Other approaches distribute workload horizontally, i.e., by harnessing the power of nearby edge nodes. Many of these efforts experiment with real settings comprising SBC (Single-Board Computer)-like edge nodes only, but few of these consider nomadic hardware such as smartphones. Given the huge popularity of smartphones worldwide and the unlimited scenarios where smartphone clusters could be exploited for providing computing power, this paper sheds some light in answering the following question: Is smartphone-based edge AI a competitive approach for real-time CV inferences? To empirically answer this, we use three pre-trained DL models and eight heterogeneous edge nodes including five low/mid-end smartphones and three SBCs, and compare the performance achieved using workloads from three image stream processing scenarios. Experiments were run with the help of a toolset designed for reproducing battery-driven edge computing tests. We compared latency and energy efficiency achieved by using either several smartphone clusters testbeds or SBCs only. Additionally, for battery-driven settings, we include metrics to measure how workload execution impacts smartphone battery levels. As per the computing capability shown in our experiments, we conclude that edge AI based on smartphone clusters can help in providing valuable resources to contribute to the expansion of edge AI in application scenarios requiring real-time performance. Full article
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14 pages, 4754 KiB  
Article
A Low-Cost Multimodal Testbed for Array-Based Electrophysiological Microelectrodes
by Cat-Vu H. Bui, Neethu Maliakal, Hasan Ulusan, Andreas Hierlemann and Fernando Cardes
Sensors 2025, 25(9), 2874; https://doi.org/10.3390/s25092874 - 2 May 2025
Viewed by 308
Abstract
Electrode designs and materials have become an increasingly important performance driver for microelectrode arrays, which are among the essential tools for cellular electrophysiology. Ongoing works have continuously innovated over a diverse range of electrode shapes, sizes, and materials. The large design and fabrication [...] Read more.
Electrode designs and materials have become an increasingly important performance driver for microelectrode arrays, which are among the essential tools for cellular electrophysiology. Ongoing works have continuously innovated over a diverse range of electrode shapes, sizes, and materials. The large design and fabrication parameter space represents rich opportunities for optimizing performance and functionalities as well as a challenge for electrode developers due to a lack of predictive simulation software to aid design works. Electrode prototypes often need to be fabricated, empirically evaluated, and iteratively optimized at significant cost. Efficient hardware testing solutions to aid the development of new electrodes, especially at an early stage when the number of candidate designs is still high, are therefore increasingly important. Here, we propose and implement a cost-effective testbed platform, which is aimed at obtaining first-order characteristics from electrode prototypes to inform early-stage screening and refinement. Upon testing with microfabricated electrodes, the platform was shown to achieve an impedance measurement accuracy comparable to commercial equipment and effectively recorded extracellular action potentials of in vitro rat cortical neurons. By providing relevant electrode testing at a significantly lower cost, in a more compact form, and with greater ease of assembly, compared to existing hardware solutions, the presented testbed can meaningfully lower entry barriers for the development of new array-based electrophysiological microelectrodes. Full article
(This article belongs to the Special Issue Sensing Technologies in Neuroscience and Brain Research)
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29 pages, 16039 KiB  
Article
PRIVocular: Enhancing User Privacy Through Air-Gapped Communication Channels
by Anastasios N. Bikos
Cryptography 2025, 9(2), 29; https://doi.org/10.3390/cryptography9020029 - 1 May 2025
Viewed by 264
Abstract
Virtual reality (VR)/the metaverse is transforming into a ubiquitous technology by leveraging smart devices to provide highly immersive experiences at an affordable price. Cryptographically securing such augmented reality schemes is of paramount importance. Securely transferring the same secret key, i.e., obfuscated, between several [...] Read more.
Virtual reality (VR)/the metaverse is transforming into a ubiquitous technology by leveraging smart devices to provide highly immersive experiences at an affordable price. Cryptographically securing such augmented reality schemes is of paramount importance. Securely transferring the same secret key, i.e., obfuscated, between several parties is the main issue with symmetric cryptography, the workhorse of modern cryptography, because of its ease of use and quick speed. Typically, asymmetric cryptography establishes a shared secret between parties, after which the switch to symmetric encryption can be made. However, several SoTA (State-of-The-Art) security research schemes lack flexibility and scalability for industrial Internet-of-Things (IoT)-sized applications. In this paper, we present the full architecture of the PRIVocular framework. PRIVocular (i.e., PRIV(acy)-ocular) is a VR-ready hardware–software integrated system that is capable of visually transmitting user data over three versatile modes of encapsulation, encrypted—without loss of generality—using an asymmetric-key cryptosystem. These operation modes can be optical character-based or QR-tag-based. Encryption and decryption primarily depend on each mode’s success ratio of correct encoding and decoding. We investigate the most efficient means of ocular (encrypted) data transfer by considering several designs and contributing to each framework component. Our pre-prototyped framework can provide such privacy preservation (namely virtual proof of privacy (VPP)) and visually secure data transfer promptly (<1000 ms), as well as the physical distance of the smart glasses (∼50 cm). Full article
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20 pages, 2343 KiB  
Article
Robust Single-Cell RNA-Seq Analysis Using Hyperdimensional Computing: Enhanced Clustering and Classification Methods
by Hossein Mohammadi, Maziyar Baranpouyan, Krishnaprasad Thirunarayan and Lingwei Chen
AI 2025, 6(5), 94; https://doi.org/10.3390/ai6050094 - 1 May 2025
Viewed by 216
Abstract
Background. Single-cell RNA sequencing (scRNA-seq) has transformed genomics by enabling the study of cellular heterogeneity. However, its high dimensionality, noise, and sparsity pose significant challenges for data analysis. Methods. We investigate the use of Hyperdimensional Computing (HDC), a brain-inspired computational framework recognized for [...] Read more.
Background. Single-cell RNA sequencing (scRNA-seq) has transformed genomics by enabling the study of cellular heterogeneity. However, its high dimensionality, noise, and sparsity pose significant challenges for data analysis. Methods. We investigate the use of Hyperdimensional Computing (HDC), a brain-inspired computational framework recognized for its noise robustness and hardware efficiency, to tackle the challenges in scRNA-seq data analysis. We apply HDC to both supervised classification and unsupervised clustering tasks. Results. Our experiments demonstrate that HDC consistently outperforms established methods such as XGBoost, Seurat reference mapping, and scANVI in terms of noise tolerance and scalability. HDC achieves superior accuracy in classification tasks and maintains robust clustering performance across varying noise levels. Conclusions. These results highlight HDC as a promising framework for accurate and efficient single-cell data analysis. Its potential extends to other high-dimensional biological datasets including proteomics, epigenomics, and transcriptomics, with implications for advancing bioinformatics and personalized medicine. Full article
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19 pages, 494 KiB  
Article
Hardware-Accelerated Data Readout Platform Using Heterogeneous Computing for DNA Data Storage
by Xiaopeng Gou, Qi Ge, Quan Guo, Menghui Ren, Tingting Qi, Rui Qin and Weigang Chen
Appl. Sci. 2025, 15(9), 5050; https://doi.org/10.3390/app15095050 - 1 May 2025
Viewed by 151
Abstract
DNA data storage has emerged as a promising alternative to traditional storage media due to its high density and durability. However, large-scale DNA storage systems generate massive sequencing reads, posing substantial computational complexity and latency challenges for data readout. Here, we propose a [...] Read more.
DNA data storage has emerged as a promising alternative to traditional storage media due to its high density and durability. However, large-scale DNA storage systems generate massive sequencing reads, posing substantial computational complexity and latency challenges for data readout. Here, we propose a novel heterogeneous computing architecture based on a field-programmable gate array (FPGA) to accelerate DNA data readout. The software component, running on a general computing platform, manages data distribution and schedules acceleration kernels. Meanwhile, the hardware acceleration kernel is deployed on an Alveo U200 data center accelerator card, executing multiple logical computing units within modules and utilizing task-level pipeline structures between modules to handle sequencing reads step by step. This heterogeneous computing acceleration system enables the efficient execution of the entire readout process for DNA data storage. We benchmark the proposed system against a CPU-based software implementation under various error rates and coverages. The results indicate that under high-error, low-coverage conditions (error rate of 1.5% and coverage of 15×), the accelerator achieves a peak speedup of up to 373.1 times, enabling the readout of 59.4 MB of stored data in just 12.40 s. Overall, the accelerator delivers a speedup of two orders of magnitude. Our proposed heterogeneous computing acceleration strategy provides an efficient solution for large-scale DNA data readout. Full article
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20 pages, 2606 KiB  
Article
A Linear Model for Irrigation Canals Operating in Real Time Applied in ASCE Test Cases
by Enrique Bonet, Maria Teresa Yubero, Marc Bascompta and Pura Alfonso
Water 2025, 17(9), 1368; https://doi.org/10.3390/w17091368 - 1 May 2025
Viewed by 196
Abstract
In the context of irrigation canal flow, numerical models developed to accurately estimate canal behavior based on gate trajectories are often highly complex. Consequently, hardware limitations make it significantly more challenging to implement these models locally at gate devices. In this regard, one [...] Read more.
In the context of irrigation canal flow, numerical models developed to accurately estimate canal behavior based on gate trajectories are often highly complex. Consequently, hardware limitations make it significantly more challenging to implement these models locally at gate devices. In this regard, one of the most significant contributions of this paper is the concept of the hydraulic influence matrix (HIM) and its application as a linear model to estimate the water surface flow in irrigation canals, integrated within an irrigation canal controller to facilitate real-time operations. The HIM model provides a significant advantage by quickly and accurately computing water level and velocity perturbations in open-flow canals. This capability empowers watermasters to apply this linear free-surface model in both unsteady and steady flow conditions, enabling real-time applications in control algorithms. The HIM model was validated by comparing water-level estimates under various perturbations with results from software using the full Saint-Venant equations. The test involved introducing a 10% perturbation in gate movement over a specified time period in two different test cases, resulting in a flow discharge increase of more than 10% in each test case. The results showed maximum absolute errors below 7 cm and 0.2 cm, relative errors of 0.7% and 0.023%, root mean square errors ranging from 2.4 to 0.07 cm, and Nash–Sutcliffe efficiency values of approximately 0.95 in the first and second test cases, respectively, when compared to the full Saint-Venant equations. This highlights the high precision of the HIM model, even when subjected to significant disturbances. However, larger gate movement disturbances (exceeding 10%) should be planned in advance rather than managed in real time. Full article
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10 pages, 2743 KiB  
Article
Ternary Heterojunction Synaptic Transistors Based on Perovskite Quantum Dots
by Shuqiong Lan, Jinkui Si, Wangying Xu, Lan Yang, Jierui Lin and Chen Wu
Nanomaterials 2025, 15(9), 688; https://doi.org/10.3390/nano15090688 - 1 May 2025
Viewed by 107
Abstract
The traditional von Neumann architecture encounters significant limitations in computational efficiency and energy consumption, driving the development of neuromorphic devices. The optoelectronic synaptic device serves as a fundamental hardware foundation for the realization of neuromorphic computing and plays a pivotal role in the [...] Read more.
The traditional von Neumann architecture encounters significant limitations in computational efficiency and energy consumption, driving the development of neuromorphic devices. The optoelectronic synaptic device serves as a fundamental hardware foundation for the realization of neuromorphic computing and plays a pivotal role in the development of neuromorphic chips. This study develops a ternary heterojunction synaptic transistor based on perovskite quantum dots to tackle the critical challenge of synaptic weight modulation in organic synaptic devices. Compared to binary heterojunction synaptic transistor, the ternary heterojunction synaptic transistor achieves an enhanced hysteresis window due to the synergistic charge-trapping effects of acceptor material and perovskite quantum dots. The memory window decreases with increasing source-drain voltage (VDS) but expands with prolonged program/erase time, demonstrating effective carrier trapping modulation. Furthermore, the device successfully emulates typical photonic synaptic behaviors, including excitatory postsynaptic currents (EPSCs), paired-pulse facilitation (PPF), and the transition from short-term plasticity (STP) to long-term plasticity (LTP). This work provides a simplified strategy for high-performance optoelectronic synaptic transistors, showcasing significant potential for neuromorphic computing and adaptive intelligent systems. Full article
(This article belongs to the Section Nanoelectronics, Nanosensors and Devices)
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