Search Results (39)

Leveraging the human brain as a paradigm of energy-efficient computation, considerable attention has been paid to photonic neurons and neural networks to achieve higher computing efficiency and lower energy consumption. This study experimentally demonstrates on-chip silicon photonic neurons and neural networks based on thermally tunable microring resonators (MRRs) implement weighting and nonlinear operations. The weight component consists of eight cascaded MRRs thermally tuned within wavelength division multiplexing (WDM) architecture. The nonlinear response depends on the MRR’s nonlinear transmission spectrum, which is analogous to the rectified linear unit (ReLU) function. The matrix multiplication and recognition task of digits 2, 3, and 5 represented by seven-segment digital tube are successfully completed by using the photonic neural networks constructed by the photonic neurons based on the on-chip thermally tunable MRR as the nonlinear units. The power consumption of the nonlinear unit was about 5.65 mW, with an extinction ratio of about 25 dB between different digits. The proposed photonic neural network is CMOS-compatible, which makes it easy to construct scalable and large-scale multilayer neural networks. These findings reveal that there is great potential for highly integrated and scalable neuromorphic photonic chips. Full article

With the advent of 6G technologies, satellite communication networks are in urgent need of innovative bearer technologies to meet the demands of government and enterprise private lines as well as computing power networks. We propose optical service unit-based optical inter-satellite links (OISL-OSU) as a solution to address the current limitations in fine-grained service bearing within optical transport networks (OTNs), thereby enhancing the flexibility and efficiency of satellite optical networks. Comparative tests were conducted between OISL-OSU and existing packet-switching technologies in multi-service satellite optical transport networks. Through hardware-in-the-loop simulation verification, key performance indicators such as delay optimization, bandwidth utilization rate, and flexible resource adjustment capability were systematically evaluated. Experimental results demonstrate that OISL-OSU technology exhibits superior performance in delay optimization and fine-grained service bearing. The flexible mapping and multiplexing mechanism of OISL-OSU significantly improves resource utilization efficiency, decreases transmission delay, and strengthens hard-pipe connection capabilities. Full article

Metasurfaces, as subwavelength planar structures, offer unprecedented electromagnetic wavefront manipulation capabilities. However, most existing focusing metasurfaces operate in a single polarization mode, support only one focusing function, or rely on complex multi-unit configurations, limiting their versatility in practical applications. This study proposes a dual-polarization multiplexed transmissive focusing metasurface operating at 5.8 GHz. Through theoretical analysis and full-wave simulations, the electromagnetic response of the metasurface unit is systematically investigated. To overcome the limitations of conventional transmissive units, an anisotropic low-profile unit is designed using a hybrid stacking strategy that combines dielectric substrates and an air layer, achieving a compact profile of only 0.16λ. This unit achieves 360° phase modulation with a transmission magnitude exceeding 0.85 while being lightweight and cost-effective. Based on the unit, three metasurface arrays are developed to achieve various focusing functions, including single-point offset focusing, dual-point focusing, and multi-focal energy-controlled focusing, offering over 15% operational bandwidth and maintaining satisfactory performance under a 25° oblique incidence, with respective efficiencies of 35.59%, 25.11%, and 33.42%. This work provides a novel solution for multifunctional focusing applications, expanding the potential of metasurfaces in wireless communication, wireless power transfer, and beyond. Full article

In this article, an additional protected fiber and free-space optical (FSO) link path is proposed, to provide self-healing capabilities for protection against fiber faults in wavelength division multiplexed passive optical network (WDM-PON) systems. The new optical line terminal (OLT), remote node (RN), and optical network unit (ONU) in the presented PON architecture result in self-protective function against fiber breakpoints. In the measurement, 25 Gbit/s on-off keying (OOK) modulation was applied on each WDM channel to assess the downstream and upstream signals after 25 km single-mode fiber (SMF) and 25 km SMF + 2 m FSO connections, respectively. In addition to using protected fiber paths for self-healing operations. This PON system can also apply the FSO link method. The measured bit error rate (BER) for all downstream and upstream traffic was maintained below 3.8 × 10⁻³ with forward error correction (FEC). The detected optical power sensitivity of the proposed self-restorative fiber- and FSO-based WDM-PON for downstream and upstream WDM signals ranged from −33.5 to −28.5 dBm and from −33 to −28.5 dBm, respectively, and the corresponding power budgets of the downstream and upstream WDM signals were between 29.5 and 30.5 dB and 33 and 38 dB, respectively. Full article

This paper presents an E-band four-channel multiplexer based on a turnstile junction. The proposed multiplexer consists of a power distribution unit featuring a turnstile junction topology and four Chebyshev bandpass filters. Thanks to the implementation of a rotating gate connection structure as the distribution unit, the overall compactness was enhanced, and the complexity of optimization was significantly reduced. Furthermore, this configuration offers a well-organized spatial port distribution, facilitating scalability for additional channels. According to the frequency band planning and design requirements of the communication system, an E-band four-channel multiplexer was designed and manufactured using high-precision computer numerical control (CNC) milling technology, achieving an error margin of ±5 μm. The experimental results indicate that the passbands are 70.6–73.07 GHz, 73.7–76.07 GHz, 82.55–82.9 GHz, and 83.4–85.9 GHz. The in-band insertion loss of each channel is below 1.7 dB, while the return loss at the common port exceeds 12 dB. The measured results align closely with simulations, demonstrating promising potential for practical applications. Full article

This study presents a synthesizer topology based on a delay-locked loop (DLL) and programmable frequency multiplier for 5G⁺ communication systems. The proposed synthesizer comprises a 512-phase DLL, an intermediate frequency generator (IFG), and an RF frequency multiplier (RFFM). The 512-phase DLL provides 512 delayed pulses through a chain of 256 delay units and single-to-differential complementary converters (S2DCs). The IFG comprises I/Q-multiplexers, I/Q-accumulators, an XOR, and an S2DC. The I/Q-multiplexer outputs switch to the phase lag or lead waveforms at every rising or falling edge of the outputs, which makes the I/Q-multiplexer output frequency, f_MX, programmable. The IF, f_IF, is two times f_MX, and f_IF is up-converted to RF, f_RF, through the RFFM. When the reference clock frequency, f_ref, is 156.25 MHz, the f_IF range is 156.863–312.5 MHz and the f_RF dynamic range is approximately 1.89–9.96 GHz. The channel resolution range is 3.698–38.609 MHz. Consequently, the proposed synthesizer provides a wide 134% output frequency bandwidth and a finer channel resolution smaller than f_ref. The presented synthesizer is fabricated in a 65 nm CMOS process. The total power consumption is 15 mW, and the rms jitter integrated from 1 kHz to 100 MHz measured as 107.6 fs. Full article

In this paper, a multichannel FIR filter design based on the Time Division Multiplex (TDM) approach that incorporates one multiply and add unit, regardless of the variable coefficient length and varying channels, by associating the resource sharing doctrine is suggested. A multiplier based on approximate distributed arithmetic (DA) circuits is employed for effective resource optimization. Although no explicit multiplication was conducted in this realization, the radix-8 and radix-4 Booth algorithms are utilized in the DA framework to curtail and optimize the partial products (PPs). Furthermore, the input stream is truncated with an erratum mending unit to roughly construct the partial products. For an aggregation of PPs, an approximate Wallace tree is taken into consideration to further minimize hardware expenses. Consequently, the suggested design’s latency, utilized area, and power usage are largely reduced. The Xilinx Vertex device is expedited, given the synthesis of the suggested multichannel realization with 16 taps, which is simulated using the Verilog formulary. It is observed that the filter structure with one channel produced the desired results, and the system’s frequency can support up to 429 MHz with a reduced area. Utilizing TSMC 180 nm CMOS technology and the Cadence RC compiler, cell-level performance is also achieved. Full article

Mobile technology is currently trending toward supporting multiple communication standards on a single device. This means that some reconfigurable techniques must be the foundation of their design. The two essential requirements of channel filters are minimized complexity and reconfigurability. In this research, a novel extension of Frequency Response Masking (FRM) was investigated by employing Time Division Multiplexing (TDM)-based single Multiply and Accumulate (MAC) architecture using the principle of resource sharing to realize multiple sharp filter responses from a single prototype constant group delay low pass filter. This paper uses a single multiply and add units regardless of the quantity of channels and taps. The suggested reconfigurable filter was synthesized on technology based on 0.18-µm CMOS and put into practice. Further trials were carried out on Virtex-II 2v3000ff1152-4 FPGA device. The outcomes revealed that the suggested channel filter, which was synthesized using FPGA, provides 21.36% of the area curtail and 14.88% of power scaling down on average and put into practice using ASIC provides 5.18% of the area reduction and 9.08% of power scaling down on average. Full article

This paper presents a low-power, energy-efficient, 12-bit incremental zoom analog-to-digital converter (ADC) for multi-channel bio-signal acquisitions. The ADC consists of a 7-stage ring voltage-controlled oscillator (VCO)-based incremental ΔΣ modulator (I-ΔΣM) and an 8-bit successive approximation register (SAR) ADC. The proposed VCO-based I-ΔΣM can provide fast phase-alignment of the ring-VCO to reduce the interval settling time; thereby, the I-ΔΣM can accommodate time-division-multiplexed input signals without phase leakage between consecutive measurements. The SAR ADC also adopts splitting unit capacitors that can support V_CM-free tri-level switching and prevent invalid states from the phase frequency detector with minimal logic gates and switches. The proposed ADC has been fabricated in a standard 180 nm standard 1P6M CMOS process, exhibiting a 67-dB peak signal-to-noise ratio, a 74-dB dynamic range, and a Walden figure of merit of 19.12 fJ/c-s, while consuming a power of 3.51 μW with a sampling rate of 100 kS/s. Full article

The operation of a four-channel multiplexer, utilizing multimode interference (MMI) wavelength division multiplexing (WDM) technology, can be designed through the cascading of MMI couplers or by employing angled MMI couplers. However, conventional designs often occupy a larger footprint, spanning a few millimeters, thereby escalating the energy power requirements for the photonic chip. In response to this challenge, we propose an innovative design for a four-channel silicon nitride (Si₃N₄) MMI coupler with a compact footprint. This design utilizes only a single MMI coupler unit, operating within the O-band spectrum. The resulting multiplexer device can efficiently transmit four channels with a wavelength spacing of 20 nm, covering the O-band spectrum from 1270 to 1330 nm, after a short light propagation of 22.8 µm. Notably, the multiplexer achieves a power efficiency of 70% from the total input energy derived from the four O-band signals. Power losses range from 1.24 to 1.67 dB, and the MMI coupler length and width exhibit a favorable tolerance range. Leveraging Si₃N₄ material and waveguide inputs and output tapers minimizes light reflection from the MMI coupler at the input channels. Consequently, this Si₃N₄-based MMI multiplexer proves suitable for deployment in O-band transceiver data centers employing WDM methodology. Its implementation offers the potential for higher data bitrates while maintaining an exemplary energy consumption profile for the chip footprint. Full article

Future 6G networks are expected to utilize Massive Multiple-Input Multiple-Output (M-MIMO) and follow a user-centric cell-free (UCCF) architecture. In a UCCF M-MIMO network, the user can be potentially served by multiple surrounding Radio Units (RUs) and Distributed Units (DUs) controlled and coordinated by a single virtualized Centralized Unit (CU). Moreover, in an M-MIMO network, each transmit frontend is equipped with a Power Amplifier (PA), typically with nonlinear characteristics, that can have a significant impact on the throughput achieved by network users. This work evaluates a UCCF M-MIMO network within an advanced system-level simulator considering multicarrier transmission, using Orthogonal Frequency-Division Multiplexing (OFDM), realistic signal-processing steps, e.g., per resource block scheduling, and a nonlinear radio frontend. Moreover, both idealistic independent and identically distributed (i.i.d.) Rayleigh and 3D ray-tracing-based radio channels are evaluated. The results show that under the realistic radio channel, the novel user-centric network architecture can lead to an almost uniform distribution of user throughput and improve the rate of the users characterized by the worst radio conditions by over 3 times in comparison to a classical, network-centric design. At the same time, the nonlinear characteristics of the PA can cause significant degradation of the UCCF M-MIMO network’s performance when operating close to its saturation power. Full article

Cascaded H-bridge power electronic transformers (CHB-PET) play a pivotal role in distribution grids and their efficient operation. The input series and output parallel (ISOP) configurations result in a huge number of power switching devices, high-frequency transformers (HFT), and capacitors in high-voltage, high-capacity CHB-PET, leading to the need for high hardware costs and huge-sized CHB-PET, which further poses a significant challenge to the engineering feasibility and marketability of the CHB-PET. To address these issues, a CHB-PET topology is proposed in this paper. The novel topology exploits the concept of multi-frequency modulation to achieve power decoupling and power unit multiplexing through reasonable LC resonant frequency selection, which optimizes the ISOP structure and ultimately reduces the hardware cost and size of the CHB-PET. In this study, the effectiveness of reducing the number of power switching devices and HFT is firstly analyzed, and after describing its working principle, the control strategy of each power conversion link of PET is discussed before the correctness and effectiveness of the CHB-PET topology and control strategy proposed in this paper are verified via simulation. Full article

In the paper, a dual-bidirectional ring-type wavelength-division-multiplexing (WDM) access network with downlink and uplink signal access simultaneously using a single fiber backbone in clockwise and counterclockwise directions, respectively. The proposed network architecture is simple and easy to implement via the designed remote node (RN) and optical line termination (OLT) modules, but it also can double the downlink traffic using the original WDM downlink wavelengths. The presented ring-type WDM network can also avoid the Rayleigh backscattering (RB) beat noise when the same wavelengths are applied as downlink and uplink channels concurrently. In the measurement, 50 km long-reach and 15 km short-reach fiber transmission lengths are achieved for the symmetrical 10 and 28 Gbit/s on-off keying (OOK) data access, respectively. In addition, based on the obtained power budgets of eight downlink WDM signals and network design at the forward error correction (FEC) threshold, 16 optical network units (ONUs) can be supported simultaneously. Full article

Convolutional neural networks (CNNs) are to be effective in many application domains, especially in the computer vision area. In order to achieve lower latency CNN processing, and reduce power consumption, developers are experimenting with using FPGAs to accelerate CNN processing in several applications. Current FPGA CNN accelerators usually use the same acceleration approaches as GPUs, where operations from different network layers are mapped to the same hardware units working in a multiplexed manner. This will result in high flexibility in implementing different types of CNNs; however, this will degrade the latency that accelerators can achieve. Alternatively, we can reduce the latency of the accelerator by pipelining the processing of consecutive layers, at the expense of more FPGA resources. The continued increase in hardware resources available in FPGAs makes such implementations feasible for latency-critical application domains. In this paper, we present FPQNet, a fully pipelined and quantized CNN FPGA implementation that is channel-parallel, layer-pipelined, and network-parallel, to decrease latency and increase throughput, combined with quantization methods to optimize hardware utilization. In addition, we optimize this hardware architecture for the HDMI timing standard to avoid extra hardware utilization. This makes it possible for the accelerator to handle video datasets. We present prototypes of the FPQNet CNN network implementations on an Alpha Data 9H7 FPGA, connected with an OpenCAPI interface, to demonstrate architecture capabilities. Results show that with a 250 MHz clock frequency, an optimized LeNet-5 design is able to achieve latencies as low as 9.32 µs with an accuracy of 98.8% on the MNIST dataset, making it feasible for utilization in high frame rate video processing applications. With 10 hardware kernels working concurrently, the throughput is as high as 1108 GOPs. The methods in this paper are suitable for many other CNNs. Our analysis shows that the latency of AlexNet, ZFNet, OverFeat-Fast, and OverFeat-Accurate can be as low as 69.27, 66.95, 182.98, and 132.6 µs, using the architecture introduced in this paper, respectively. Full article

Ultra-wideband (UWB) antennas cover a frequency range of 3.1 to 10.6 GHz and have sparked a lot of research interest as an essential part of wireless communication systems as they provide high data transmission speeds, are less expensive, and consume less power. UWB antennas are widely used in radar imaging, radio frequency identification, public security, and other high-accuracy positioning devices such as altimetry. Some smart applications of UWB antennas are vehicular radar systems, surveillance systems, software-defined radios, spectrum analysis, proximity fuses, etc. Multiple-input-multiple-output (MIMO) is a multiplexing technology that adopts multiple antennas both at the transmitter and receiver, which can enhance the channel capacity. MIMO technology is extensively used in several applications, such as in portable devices, wireless body area networks (WBANs), vehicular communication, and satellite–terrestrial networks. Generally, the MIMO antennas are used to obtain high reliability, high capacity, high throughput, and high security. The UWB MIMO antennas (UMAs) are considered the best choice for wireless communication systems as they offer reliability and wide transmission capacity, in contrast to unit antenna elements (AEs), without increasing system bandwidth or transmission power. The present-day and future communications systems need higher throughput to meet the demands of users. The signal transfer rate can be improved by improving channel bandwidth or increasing the number of receiving antennas. However, the main issue in designing UMAs is to provide high isolation between AEs because mutual coupling interactions between them affect the generated radiation patterns, leading to worse performance and failing to meet the operative constraints and requirements. When introducing decoupling techniques (DTs), researchers experience numerous challenges, including an increase in antenna size, design complexity, and cross-polarization. This article offers an organized review and simulated study of the various DTs in UMAs. The simulated study has been carried out through the implementation of various types of DTs on the same two-port UMA, which consists of two microstrip-fed circular-shaped AEs with open-end slotted partial ground. In contrast with previously reported review articles, this article provides a detailed study of various types of DTs reported so far and a better understanding for selecting appropriate DTs, which help in designing UMAs with better performance. Full article