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Keywords = transistor clamped

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28 pages, 25758 KB  
Article
Cam Design and Pin Defect Detection of Cam Pin Insertion Machine in IGBT Packaging
by Wenchao Tian, Pengchao Zhang, Mingfang Tian, Si Chen, Haoyue Ji and Bingxu Ma
Micromachines 2025, 16(7), 829; https://doi.org/10.3390/mi16070829 - 20 Jul 2025
Viewed by 573
Abstract
Packaging equipment plays a crucial role in the semiconductor industry by enhancing product quality and reducing labor costs through automation. Research was conducted on IGBT module packaging equipment (an automatic pin insertion machine) during the pin assembly process of insulated gate bipolar transistor [...] Read more.
Packaging equipment plays a crucial role in the semiconductor industry by enhancing product quality and reducing labor costs through automation. Research was conducted on IGBT module packaging equipment (an automatic pin insertion machine) during the pin assembly process of insulated gate bipolar transistor (IGBT) modules to improve productivity and product quality. First, the manual pin assembly process was divided into four stages: feeding, stabilizing, clamping, and inserting. Each stage was completed by separate cams, and corresponding step timing diagrams are drawn. The profiles of the four cams were designed and verified through theoretical calculations and kinematic simulations using a seventh-degree polynomial curve fitting method. Then, image algorithms were developed to detect pin tilt defects, pin tip defects, and to provide visual guidance for pin insertion. Finally, a pin insertion machine and its human–machine interaction interface were constructed. On-machine results show that the pin cutting pass rate reached 97%, the average insertion time for one pin was 2.84 s, the pass rate for pin insertion reached 99.75%, and the pin image guidance accuracy was 0.02 mm. Therefore, the designed pin assembly machine can reliably and consistently perform the pin insertion task, providing theoretical and experimental insights for the automated production of IGBT modules. Full article
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24 pages, 21291 KB  
Article
Stochastic Pulse-Width Modulation and Modification of Direct Torque Control Based on a Three-Level Neutral-Point Clamped Inverter
by Vasilev Bogdan Yurievich and Nguyen The Hien
Energies 2024, 17(23), 6017; https://doi.org/10.3390/en17236017 - 29 Nov 2024
Cited by 7 | Viewed by 1191
Abstract
The three-level neutral-point clamped inverter represents a significant advancement in direct torque-control systems for asynchronous motors. A significant achievement of this study lies in the comprehensive analysis of a random frequency-modulation algorithm, which demonstrates its efficacy in substantially reducing the amplitude of harmonic [...] Read more.
The three-level neutral-point clamped inverter represents a significant advancement in direct torque-control systems for asynchronous motors. A significant achievement of this study lies in the comprehensive analysis of a random frequency-modulation algorithm, which demonstrates its efficacy in substantially reducing the amplitude of harmonic oscillations and minimizing switching losses. This simplifies filter design and minimizes thermal dissipation in power transistors, thereby enhancing the overall reliability and efficiency of the system. Additionally, the implementation of a six-position torque regulator with a fixed sensitivity zone, applied in direct torque control based on the three-level inverter, improves the stability of the stator flux linkage and reduces the switching frequency of transistors. Numerical simulations conducted in the Matlab/Simulink environment indicate that the proposed algorithm reduces switching losses by 15% during transient states and by 2% during steady-state operation while increasing the system’s efficiency by 2% compared to conventional methods. These findings highlight the potential of the proposed solutions for application in energy-efficient drive systems. Full article
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13 pages, 1502 KB  
Article
Fault-Tolerant Performance Analysis of a Modified Neutral-Point-Clamped Asymmetric Half-Bridge Converter for an In-Wheel Switched Reluctance Motor
by Jackson Oloo and Laszlo Szamel
Eng 2024, 5(4), 2575-2587; https://doi.org/10.3390/eng5040135 - 11 Oct 2024
Viewed by 1231
Abstract
Reliability is an essential factor for the operation of the Switched Reluctance Motor (SRM) drive. Electric vehicles operate in harsh environments, which may degrade the operation of power converters. These failure modes include transistor open- and short-circuits, freewheeling diode open- and short-circuits, and [...] Read more.
Reliability is an essential factor for the operation of the Switched Reluctance Motor (SRM) drive. Electric vehicles operate in harsh environments, which may degrade the operation of power converters. These failure modes include transistor open- and short-circuits, freewheeling diode open- and short-circuits, and DC-link capacitor failures. This work presents a performance analysis of an in-wheel SRM for an electric vehicle under short-circuit (SC) and open-circuit (OC) faults of a modified Neutral-Point-Clamped Asymmetric Half-Bridge (NPC-AHB) Converter. The SRM is modeled as an in-wheel electric vehicle. A separate vehicle model attached to the motor is also developed for validation and performance of the NPC-AHB under different faulty scenarios. The performance of the modified NPC-AHB is also compared with that of a conventional AHB under faulty conditions for an in-wheel 8/6 SRM. The performance indicators such as torque, speed, current, and flux are presented from MATLAB/Simulink 2023b numerical simulations. Full article
(This article belongs to the Section Electrical and Electronic Engineering)
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18 pages, 7982 KB  
Article
On-State Voltage Measurement Circuit for Condition Monitoring of MOSFETs in Resonant Converters
by Marco Ventimiglia, Alfio Scuto, Giuseppe Sorrentino, Gaetano Belverde, Francesco Iannuzzo and Santi Agatino Rizzo
Electronics 2024, 13(19), 3902; https://doi.org/10.3390/electronics13193902 - 2 Oct 2024
Cited by 1 | Viewed by 1550
Abstract
This work aims to estimate the Metal-Oxide-Semiconductor Field-Effect Transistor’s (MOSFET) junction temperature, guessing in real time the dynamic drain-source resistance during MOSFET operation in LLC (Inductor-Inductor-Capacitor) converters usually adopted in Switched-Mode Power Supplies. The task is accomplished using an on-state voltage measurement circuit [...] Read more.
This work aims to estimate the Metal-Oxide-Semiconductor Field-Effect Transistor’s (MOSFET) junction temperature, guessing in real time the dynamic drain-source resistance during MOSFET operation in LLC (Inductor-Inductor-Capacitor) converters usually adopted in Switched-Mode Power Supplies. The task is accomplished using an on-state voltage measurement circuit that allows clamping of the high-voltage drain-source voltage during the off-state. The results of this method have been compared with the temperature accurately measured using a co-packed die as a thermal sensor. Full article
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21 pages, 3299 KB  
Article
A Voltage Equalization Strategy for Series-Connected SiC MOSFET Applications
by Peng Li, Jialin Liu, Shikai Sun, Wenhao Yang, Yuyin Sun and Yuming Zhang
Electronics 2024, 13(18), 3766; https://doi.org/10.3390/electronics13183766 - 22 Sep 2024
Cited by 1 | Viewed by 1748
Abstract
A novel clamped voltage equalization strategy is presented for series-connected Silicon Carbide (SiC) Metal–Oxide semiconductor Field-Effect transistors (MOSFETs) in this paper. Differences in device parameters and circuit asymmetry result in the uneven voltage distribution of series-connected SiC MOSFETs, which threatens the safe operation [...] Read more.
A novel clamped voltage equalization strategy is presented for series-connected Silicon Carbide (SiC) Metal–Oxide semiconductor Field-Effect transistors (MOSFETs) in this paper. Differences in device parameters and circuit asymmetry result in the uneven voltage distribution of series-connected SiC MOSFETs, which threatens the safe operation of the circuit. Dynamic voltage equalization is difficult to achieve due to the fast switching speed of SiC MOSFETs. This paper analyzes the switching characteristics and dynamic voltage equalization characteristics of SiC MOSFETs. Based on the analysis, an energy recovery strategy based on the clamping auxiliary circuit is proposed. A 2.8 kW (50 KHz) prototype is fabricated and tested to verify the strategy. Measurement results show that the maximum voltage stress is suppressed from 600 V to less than 320 V in the experimental condition. Full article
(This article belongs to the Special Issue Wide-Bandgap Device Application: Devices, Circuits, and Drivers)
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12 pages, 15242 KB  
Technical Note
Inherently Decoupled Dc-Link Capacitor Voltage Control of Multilevel Neutral-Point-Clamped Converters
by Gabriel Garcia-Rojas, Sergio Busquets-Monge, Robert Griñó and José M. Campos-Salazar
Electronics 2024, 13(13), 2671; https://doi.org/10.3390/electronics13132671 - 7 Jul 2024
Viewed by 1738
Abstract
This letter derives and discusses the superiority of a simple dc-link capacitor voltage control configuration for multilevel neutral-point-clamped converters with any number of levels. The control involves n − 2 control loops regulating the difference between the voltage of neighbor capacitors. These control [...] Read more.
This letter derives and discusses the superiority of a simple dc-link capacitor voltage control configuration for multilevel neutral-point-clamped converters with any number of levels. The control involves n − 2 control loops regulating the difference between the voltage of neighbor capacitors. These control loops are inherently decoupled, i.e., they are independent and the control action of one loop does not affect the others. This method is proven to be equivalent to previously published approaches, with the added advantages of increased simplicity and scalability to a higher number of levels, all while imposing a lower computational burden. The good performance of such control is confirmed through simulations and experiments. Full article
(This article belongs to the Special Issue Multi-level Power Converters Systems)
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10 pages, 4042 KB  
Article
A Novel High-Speed Split-Gate Trench Carrier-Stored Trench-Gate Bipolar Transistor with Enhanced Short-Circuit Roughness
by Zhehong Qian, Wenrong Cui, Tianyang Feng, Hang Xu, Yafen Yang, Qingqing Sun and David Wei Zhang
Micromachines 2024, 15(6), 680; https://doi.org/10.3390/mi15060680 - 22 May 2024
Viewed by 1378
Abstract
A novel high-speed and process-compatible carrier-stored trench-gate bipolar transistor (CSTBT) combined with split-gate technology is proposed in this paper. The device features a split polysilicon electrode in the trench, where the left portion is equipotential with the cathode. This design mitigates the impact [...] Read more.
A novel high-speed and process-compatible carrier-stored trench-gate bipolar transistor (CSTBT) combined with split-gate technology is proposed in this paper. The device features a split polysilicon electrode in the trench, where the left portion is equipotential with the cathode. This design mitigates the impact of the anode on the trench gate, resulting in a reduction in the gate-collector capacitance (CGC) to improve the dynamic characteristics. On the left side of the device cell, the P-layer, the carrier-stored (CS) layer and the P-body are formed from the bottom up by ion implantation and annealing. The P-layer beneath the trench bottom can decrease the electric field at the bottom of the trench, thereby improving breakdown voltage (BV) performance. Simultaneously, the highly doped CS layer strengthens the hole-accumulation effect at the cathode. Moreover, the PNP doping layers on the left form a self-biased pMOS. In a short-circuit state, the self-biased pMOS turns on at a certain collector voltage, causing the potential of the CS-layer to be clamped by the hole channel. Consequently, the short-circuit current no longer increases with the collector voltage. The simulation results reveal significant improvements in comparison with the conventional CSTBT under the same on-state voltage (1.48 V for 100 A/cm2). Specifically, the turn-off time (toff) and turn-off loss (Eoff) are reduced by 38.4% and 41.8%, respectively. The short-circuit current is decreased by 50%, while the short-circuit time of the device is increased by 2.46 times. Full article
(This article belongs to the Special Issue Insulated Gate Bipolar Transistor (IGBT) Modules)
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17 pages, 12256 KB  
Article
Efficiency and Power Loss Distribution in a High-Frequency, Seven-Level Diode-Clamped Inverter
by Robert Stala, Szymon Folmer, Adam Penczek, Jakub Hachlowski and Zbigniew Mikoś
Energies 2023, 16(23), 7866; https://doi.org/10.3390/en16237866 - 1 Dec 2023
Cited by 1 | Viewed by 1845
Abstract
The paper presents efficiency and power loss analysis in a high-frequency, seven-level diode-clamped inverter (7LDCB). The inverter is composed of four-level (4L) diode-clamped branches based on MOSFET transistors and Si Schottky diodes. The range of DC-link voltages enables the operation of the inverter [...] Read more.
The paper presents efficiency and power loss analysis in a high-frequency, seven-level diode-clamped inverter (7LDCB). The inverter is composed of four-level (4L) diode-clamped branches based on MOSFET transistors and Si Schottky diodes. The range of DC-link voltages enables the operation of the inverter in connection with a single-phase power grid. The tested inverter can be controlled using various modulation concepts that affect its parameters, but also energy losses. Carrier-based modulation, which may be useful in a few applications, is compared to selective modulation based on the state machine (SM-based) algorithm. The article demonstrates the efficiency level of the inverter as well as the influence of the modulation method and switching frequency on the efficiency and loss distribution in semiconductor devices. The article also shows the hardware implementation of a complex modulation algorithm based on selective switching states used to maintain voltage balance on three DC-link capacitors. Redundant switching states allow the generation of the same voltage but with the use of a selected DC-link capacitor. This makes it possible to balance the DC-link voltage with the load current. The article presents experimental results, which show the advantage of using the modulation method with selective switching states. First, it allows for equalizing the loading of DC-link capacitors. The second advantage is a more uniform distribution of losses in semiconductor components. Full article
(This article belongs to the Special Issue Integration of Distributed Energy Resources (DERs))
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11 pages, 7241 KB  
Article
Characterization of Mechanical Oscillations in Bismuth Selenide Nanowires at Low Temperatures
by Liga Jasulaneca, Raimonds Poplausks, Juris Prikulis, Elza Dzene, Tom Yager and Donats Erts
Micromachines 2023, 14(10), 1910; https://doi.org/10.3390/mi14101910 - 7 Oct 2023
Cited by 1 | Viewed by 1577
Abstract
A single transistor preamplifier circuit was designed to facilitate electrical detection of mechanical oscillations in nanoelectromechanical systems (NEMSs) at low temperatures. The amplifier was integrated in the close vicinity of the nanowire inside the cryostat to minimize cabling load and interference. The function [...] Read more.
A single transistor preamplifier circuit was designed to facilitate electrical detection of mechanical oscillations in nanoelectromechanical systems (NEMSs) at low temperatures. The amplifier was integrated in the close vicinity of the nanowire inside the cryostat to minimize cabling load and interference. The function of the circuit was impedance conversion for current flow measurements in NEMSs with a high internal resistance. The circuit was tested to operate at temperatures as low as 5 K and demonstrated the ability to detect oscillations in double-clamped bismuth selenide nanowires upon excitation by a 0.1 MHz–10 MHz AC signal applied to a mechanically separated gate electrode. A strong resonance frequency dependency on temperature was observed. A relatively weak shift in the oscillation amplitude and resonance frequency was measured when a DC bias voltage was applied to the gate electrode at a constant temperature. Full article
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17 pages, 4567 KB  
Article
A New Transformer-Less Single-Phase Photovoltaic Inverter to Improve the Performance of Grid-Connected Solar Photovoltaic Systems
by Mohua Biswas, Shuvra Prokash Biswas, Md. Rabiul Islam, Md. Ashib Rahman, Kashem M. Muttaqi and S. M. Muyeen
Energies 2022, 15(22), 8398; https://doi.org/10.3390/en15228398 - 10 Nov 2022
Cited by 17 | Viewed by 3168
Abstract
Photovoltaic (PV) energy systems have found diverse applications in fulfilling the increasing energy demand worldwide. Transformer-less PV inverters convert the DC energy from PV systems to AC energy and deliver it to the grid through a non-isolated connection. This paper proposes a new [...] Read more.
Photovoltaic (PV) energy systems have found diverse applications in fulfilling the increasing energy demand worldwide. Transformer-less PV inverters convert the DC energy from PV systems to AC energy and deliver it to the grid through a non-isolated connection. This paper proposes a new transformer-less grid-connected PV inverter. A closed-loop control scheme is presented for the proposed transformer-less inverter to connect it with the power grid. The proposed transformer-less inverter reduces extra leakage current and holds the common-mode voltage at a constant point. To eliminate extra leakage current, as well as achieve constant common-mode voltage, a midpoint clamping method is utilized to operate the inverter. The proposed transformer-less inverter is formed of seven insulated gate bipolar transistors (IGBTs) employing a unipolar sinusoidal pulse width modulation (SPWM) technique for switching purposes. An LCL filter is employed to reshape the two-level inverter output voltage and current to obtain closer sinusoidal waveforms. The output voltage and current total harmonic distortion (THD) of the proposed transformer-less inverter were found to be 1.25% and 0.94%, respectively, in the grid-connected mode. The leakage current elimination mechanism with the proposed transformer-less inverter is deeply analyzed in this paper. The performances of the proposed transformer-less inverter were evaluated with MATLAB/Simulink simulation and validated in a laboratory scale experiment. Full article
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15 pages, 3339 KB  
Article
Analysis, Design, and Experimental Results for a High-Frequency ZVZCS Galvanically Isolated PSFB DC-DC Converter over a Wide Operating Range Using GaN-HEMT
by Abdullah Eial Awwad
World Electr. Veh. J. 2022, 13(11), 206; https://doi.org/10.3390/wevj13110206 - 2 Nov 2022
Cited by 6 | Viewed by 3261
Abstract
This paper investigates the potential of the emerging gallium nitride (GaN) high-electron mobility transistors (HEMT) power devices to meet certain power conversion challenges. The advantages of utilizing GaN HEMT transistors in a high-frequency, high-power isolated DC-DC topology are explored experimentally. Using the GaN [...] Read more.
This paper investigates the potential of the emerging gallium nitride (GaN) high-electron mobility transistors (HEMT) power devices to meet certain power conversion challenges. The advantages of utilizing GaN HEMT transistors in a high-frequency, high-power isolated DC-DC topology are explored experimentally. Using the GaN HEMT’s parasitic elements, e.g., output capacitance, and the leakage inductance of the transformer, a soft switching zero-voltage zero-current switching (ZVZCS) phase shift converter is proposed. Accordingly, the freewheeling current is terminated, and soft switching is realized for most of the primary and secondary active devices. Furthermore, without using any additional circuitry, the overshoot voltage across the bridges of active rectifier diodes is clamped at their voltage level. In addition, a high-frequency power transformer is optimized to minimize the overall transformer losses (e.g., winding and core losses). Combined the conductor types, e.g., litz wire and copper foil, shows good electrical and thermal performance by reducing the AC and DC resistance. Finally, a 5 kW, 100–250 kHz prototype is built and tested. The experimental results show a conversion efficiency of up to 98.18% for the whole converter. Full article
(This article belongs to the Topic Power Converters)
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34 pages, 7443 KB  
Article
High Step-Up Flyback with Low-Overshoot Voltage Stress on Secondary GaN Rectifier
by Radin Za’im, Jafferi Jamaludin, Yushaizad Yusof and Nasrudin Abd Rahim
Energies 2022, 15(14), 5092; https://doi.org/10.3390/en15145092 - 12 Jul 2022
Cited by 2 | Viewed by 3985
Abstract
This paper presents a new technique to mitigate the high voltage stress on the secondary gallium nitride (GaN) transistor in a high step-up flyback application. GaN devices provide a means of achieving high efficiency at hundreds (and thousands) of kHz of switching frequency. [...] Read more.
This paper presents a new technique to mitigate the high voltage stress on the secondary gallium nitride (GaN) transistor in a high step-up flyback application. GaN devices provide a means of achieving high efficiency at hundreds (and thousands) of kHz of switching frequency. Presently however, commercially available GaN is limited to only a 650 V absolute voltage rating. Such a limitation is challenging in high step-up flyback applications due to the secondary leakage. The leakage imposes high voltage stress on the secondary GaN rectifier during its turn-off transient. Such stress may cause irreversible damage to the GaN device. A new method of leakage bypass is presented to mitigate the high voltage stress issue. The experimental results suggest that when compared to conventional secondary active clamp, a 2.3-fold reduction in overshoot voltage stress percentage is achievable with the technique. As a result, it is possible to utilize GaN as the rectifier while keeping the peak voltage stress within the 650 V limitation with the technique. Full article
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25 pages, 8823 KB  
Article
Detailed Power Loss Analysis of T-Type Neutral Point Clamped Converter for Reactive Power Compensation
by Marcin Zygmanowski
Electronics 2022, 11(14), 2129; https://doi.org/10.3390/electronics11142129 - 7 Jul 2022
Cited by 6 | Viewed by 3789
Abstract
The paper presents an analysis of power losses in a three-phase T-type neutral point clamped converter with insulated gate bipolar transistors. The paper’s main aim is to perform a detailed analysis of power losses in the converter operating as an active power filter. [...] Read more.
The paper presents an analysis of power losses in a three-phase T-type neutral point clamped converter with insulated gate bipolar transistors. The paper’s main aim is to perform a detailed analysis of power losses in the converter operating as an active power filter. The study is based on the use of characteristics of semiconductor devices provided by the manufacturer in the module datasheet. Thanks to the analysis, it is possible to recognise the value of power losses, which facilitates the design of the converter cooling system. Identifying how power losses are distributed between the module switching devices is also possible. Power losses are shown as functions of the output current and module temperature. The analysis results were successfully verified by measuring power losses using a laboratory model of the converter with rated currents of 10 and 20 A. The obtained results indicate relatively low power losses and a relatively even distribution of power losses between the semiconductor devices. This is a superior feature of the three-level T-type neutral point clamped converter topology. Full article
(This article belongs to the Special Issue Power Converter Design, Control and Applications)
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21 pages, 11457 KB  
Article
Design and Implementation of a Single-Stage PFC Active-Clamp Flyback Converter with Dual Transformers
by Sen-Tung Wu and Yu-Ting Cheng
Electronics 2021, 10(21), 2588; https://doi.org/10.3390/electronics10212588 - 22 Oct 2021
Cited by 3 | Viewed by 5244
Abstract
This paper proposes an AC/DC single-stage structure by integrating a boost topology and an active clamp flyback (ACF) circuit with power-factor-correction (PFC) function. The PFC function can be achieved by controlling a boost PFC topology operated in the discontinuous conduction mode. With the [...] Read more.
This paper proposes an AC/DC single-stage structure by integrating a boost topology and an active clamp flyback (ACF) circuit with power-factor-correction (PFC) function. The PFC function can be achieved by controlling a boost PFC topology operated in the discontinuous conduction mode. With the coordination of active clamping components, a resonant technique is obtained and zero-voltage-switching (ZVS) can be achieved. The proposed converter is combined with the advantages of: (1) compared with two-stage circuit, a single stage circuit decreases the component of the main circuit and reduces the complexity of the control circuit; (2) a boost topology with PFC function operated in discontinuous conduction mode can be accomplished without adding any current detecting technique or detecting input signal; (3) by using the inductor from the PFC stage, ZVS function can be achieved without any additional inductor; (4) the increment of switching frequency facilitates the optimization of power density; (5) the conducting loss at the secondary side can be reduced by adding the synchronous rectification; (6) in this proposed scheme, the dual transformers with series-parallel connection are utilized, the current at the secondary side can be shared for lowering the conduction loss of the synchronous transistors. Finally, a prototype converter with AC 110 V input and DC 19 V/6.32 A (120 W) output under 300 kHz switching frequency is implemented. The efficiency of the proposed converter reaches 88.20% and 0.984 power factor in full load condition. Full article
(This article belongs to the Special Issue Automotive Electronics)
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19 pages, 6952 KB  
Article
An Improved Voltage Clamp Circuit Suitable for Accurate Measurement of the Conduction Loss of Power Electronic Devices
by Qiuping Yu, Zhibin Zhao, Peng Sun, Bin Zhao and Yumeng Cai
Sensors 2021, 21(13), 4285; https://doi.org/10.3390/s21134285 - 23 Jun 2021
Cited by 2 | Viewed by 4014
Abstract
Power electronic devices are essential components of high-capacity industrial converters. Accurate assessment of their power loss, including switching loss and conduction loss, is essential to improving electrothermal stability. To accurately calculate the conduction loss, a drain–source voltage clamp circuit is required to measure [...] Read more.
Power electronic devices are essential components of high-capacity industrial converters. Accurate assessment of their power loss, including switching loss and conduction loss, is essential to improving electrothermal stability. To accurately calculate the conduction loss, a drain–source voltage clamp circuit is required to measure the on-state voltage. In this paper, the conventional drain–source voltage clamp circuit based on a transistor is comprehensively investigated by theoretical analysis, simulations, and experiments. It is demonstrated that the anti-parallel diodes and the gate-shunt capacitance of the conventional drain–source voltage clamp circuit have adverse impacts on the accuracy and security of the conduction loss measurement. Based on the above analysis, an improved drain–source voltage clamp circuit, derived from the conventional drain–source voltage clamp circuit, is proposed to solve the above problems. The operational advantages, physical structure, and design guidelines of the improved circuit are fully presented. In addition, to evaluate the influence of component parameters on circuit performance, this article comprehensively extracts three electrical quantities as judgment indicators. Based on the working mechanism of the improved circuit and the indicators mentioned above, general mathematical analysis and derivation are carried out to give guidelines for component selection. Finally, extensive experiments and detailed analyses are presented to validate the effectiveness of the proposed drain–source voltage clamp circuit. Compared with the conventional drain–source voltage clamp circuit, the improved drain–source voltage clamp circuit has higher measurement accuracy and working security when measuring conduction loss, and the proposed component selection method is verified to be reasonable and effective for better utilizing the clamp circuit. Full article
(This article belongs to the Section Electronic Sensors)
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