Search Results (54)

This work presents a notch filter architecture based on a dual-output second-generation voltage conveyor, designed with a current-mode approach. The proposed topology employs a single frequency-selective LC branch and directly uses the two voltage outputs of the DOVCII to generate a notch response without additional active stages. Analytical expressions for the transfer function, notch frequency, and quality factor are derived, highlighting independent control of the passband gain and notch parameters. A sensitivity analysis demonstrates that the notch frequency depends exclusively on the LC product with half-order sensitivities, while the quality factor is predominantly controlled by a single resistor, resulting in predictable tuning and improved tolerance to passive component variations. Transistor-level analysis of the proposed filter was carried out using a standard AMS 0.35 μm CMOS process and has been validated through both circuit-level simulations and experimental measurements using a DOVCII implementation based on the AD844 current-feedback amplifier. Prototypes operating at 100 kHz and 50 Hz notch frequencies have been implemented, the latter employing a current-mode inductance simulator to avoid bulky passive inductors. Full article

Power electronic devices for AC/DC and AC/AC conversion are, nowadays, widely distributed in electrified transportation and industrial applications, which can determine significant deviation in supply voltage waveform from the AC sinusoidal and promote insulation extrinsic aging mechanisms as partial discharges (PDs). PDs are one of the most harmful processes as they are able to cause accelerated extrinsic aging of electrical insulation systems and are the cause of premature failure in electrical asset components. PD phenomenology under pulse width modulated (PWM) voltage waveforms has been dealt with in recent years, also through some IEC/IEEE standards, but less work has been performed on PD harmfulness under AC distorted waveforms containing voltage harmonics and notches. On the other hand, these voltage waveforms can often be present in electrical assets containing conventional loads and power electronics loads/drives, such as for ships or industrial installations. The purpose of this paper is to provide a contribution to this lack of knowledge, focusing on PD sensing and phenomenology. It has been shown that PD patterns can change considerably with respect to those known under sinusoidal AC when harmonic voltages and/or notches are present in the supply waveform. This can impact PD typology identification, which is based on features related to PD pattern-based physics. The adaptation of identification AI algorithms used for AC sinusoidal voltage as well as distorted AC waveforms is discussed in this paper, showing that effective identification of the type of defects generating PD, and thus of their harmfulness, can still be achieved. Full article

Traditional active magnetic bearing power amplifiers usually adopt hard-switching circuit topologies with simple structures and strong practicability. However, such topologies suffer from high switching losses and easy generation of current noise. To address these issues, this paper proposes a soft-switching power amplifier topology for active magnetic bearings. By employing soft-switching technology, zero-voltage notches are generated through an auxiliary resonant circuit, enabling the switching transistor s to turn on and off at the zero-voltage notch moment, thereby reducing switching losses and improving system efficiency. The working principle of the soft-switching power amplifier topology is analyzed in detail, and the proposed scheme is verified through system simulation and experiments. Results show that the soft-switching power amplifier can effectively reduce switching losses and current noise, while its dynamic performance and operating bandwidth are comparable to those of traditional hard-switching power amplifiers. With an output current of 3 A, the efficiency of the soft-switching power amplifier can be enhanced by 10%. Full article

This paper evaluates the performance of strategies based on finite-control-set model predictive control (FCS-MPC) aimed at reducing or fixing the converter switching frequency or decreasing the spread of the harmonic spectrum in multilevel hybrid cascade converters (HCCs). These properties are desirable for medium- to high-voltage applications, where minimizing switching losses is crucial, as well as for applications employing passive filters, where resonance modes can be excited. The strategies evaluated are input restriction, notch filtering, period control, and PWM restriction. Key aspects considered in this work are (i) the evaluation of the steady-state and transient performance of FCS-MPC strategies proposed for two-level converters in a multilevel topology, and (ii) the evaluation of the computational cost associated with the implementation of these strategies on a multilevel converter with a high number of available inputs. As a typical application, the study is carried out employing a five-level HCC experimental prototype driving an induction motor through indirect vector control. To perform a fair comparison between the strategies, a control platform based on a cost-effective Zynq system on chip is proposed, which allows for achieving the hard timing constraints imposed by FCS-MPC strategies. The results show that the PWM restriction strategy achieves the best steady-state performance among the evaluated strategies, with an error 400 times smaller than that of the second-best strategy (input restriction), with an average switching frequency of 962.5 Hz, which differs from the desired average frequency by 3%, and a maximum difference in power distribution between modules of 0.8%. In addition, the system-on-chip hardware achieves a competitive execution time of 46 μs when the ARM Cortex solution is implemented and 20 μs when the ARM Cortex–FPGA solution is used instead, employing the 512 inputs available in the FCS-MPC algorithm. The studies, performed in steady-state and transient regimes, confirm (i) the feasibility of the evaluated algorithms in an HCC topology and (ii) the feasibility of the control platform for implementing high-computational-burden algorithms with a low sampling time. Full article

A real-time tunable planar plasmonic waveguide based on a voltage-adjustable ferroelectric resonator is designed and investigated. The laminated ferroelectric compound resonator is composed of a ferroelectric Ba_0.85Ca_0.15Zr_0.9Ti_0.1O₃ (BCZT) layer, a PCB layer, as well as a localized spoof plasmonic metal layer, where the BCZT layer is beneficial for enhancing the voltage tunability in the spoof surface plasmon polariton (SSPP) waveguide. The simulated results show that the tuning range of the notch in the transmission curve, generated by the coupling between the ferroelectric compound resonator and the plasmonic waveguide, can achieve a variation of up to 8.8% thanks to the large tunability value in the BCZT ferroelectric layer. In addition, the notches consist of Fano resonant frequencies, the generation mechanism of which is elaborately discussed in terms of the temporal coupled mode theory. Full article

This paper presents a dual-mode clock-enhanced N-path notch filter that offers high linearity. In Mode 1, the clock swing boost mode, the boost module extends the clock swing from V_DD to 2 × V_DD, thereby significantly improving the filter’s linearity and blocker capacity. In Mode 2, the clock bootstrap mode, the bootstrap module raises the input large signal to the clock on-gate drive voltage, enhancing the large-signal performance. The flexible switching between clock operating modes allows for efficient adaptation to different input conditions and enables optimal clock power consumption. Post-layout simulations conducted using 130-nm SOI CMOS technology demonstrate a tuning range of 0.1 to 1.0 GHz, with a 10.5 dBm blocker 1-dB compression point (B1dB) in boost mode, consuming power between 25.3 and 40.7 mW. In bootstrap mode, the filter achieves a 12.7 dBm B1dB and a 10.1 dBm 1-dB compression point (P1dB), along with an IIP3 of up to 23.9 dBm, while consuming between 35.1 and 55.7 mW. Full article

This paper proposes a three-stage op amp based on the SOI (silicon-on-insulator) process, which achieves a low offset voltage and temperature coefficient across a wide temperature range from −40 °C to 250 °C. It can be used in aerospace, oil and gas exploration, automotive electronics, nuclear industry, and in other fields where the ability of electronic devices to withstand high-temperature environments is strongly required. By utilizing a SC (Switched Capacitor) notch filter, the op amp achieves low input offset in a power-efficient manner. The circuit features a multi-path nested Miller compensation structure, consisting of a low-speed channel and a high-speed channel, which switch according to the input signal frequency. The input-stage operational amplifier is a fully differential, rail-to-rail design, utilizing tail current control to reduce the impact of common-mode voltage on the transconductance of the input stage. The two-stage operational amplifier uses both cascode and Miller compensation, minimizing the influence of the feedforward signal path and improving the amplifier’s response speed. The prototype op amp is fabricated in a 0.15 µm SOI process and draws 0.3 mA from a 5 V supply. The circuit occupies a chip area of 0.76 mm². The measured open-loop gain exceeds 140 dB, with a 3 dB bandwidth greater than 100 kHz. The amplifier demonstrates stable performance across a wide temperature range from −40 °C to 250 °C, and exhibits an excellent input offset of approximately 20 µV at room temperature and an offset voltage temperature coefficient of 0.7 μV/°C in the full temperature range. Full article

Radio photonic technologies have emerged as a promising solution for addressing microwave frequency synthesis challenges in current and future communication and sensing systems. One particularly effective approach is the optoelectronic oscillator (OEO), a simple and cost-effective electro-optical system. The OEO can generate microwave signals with low phase noise and high oscillation frequencies, often outperforming traditional electrical methods. However, a notable disadvantage of the OEO compared to conventional signal generation methods is its significant frequency tuning step. This paper presents a novel approach for continuously controlling the output frequency of an optoelectronic oscillator (OEO) based on integrated photonics. This is achieved by tuning an integrated optical delay line within a feedback loop. The analytical model developed in this study calculates the OEO’s output frequency while accounting for nonlinear errors, enabling the consideration of various control schemes. Specifically, this study examines delay lines based on the Mach–Zehnder interferometer and microring resonators, which can be controlled by either the thermo-optic or electro-optic effect. To evaluate the model, we conducted numerical simulations using Ansys Lumerical software. The OEO that utilized an MRR-based electro-optical delay line demonstrated a tuning sensitivity of 174.5 MHz/V. The calculated frequency tuning sensitivity was as low as 6.98 kHz when utilizing the precision digital-to-analog converter with a minimum output voltage step of 40 μV. The proposed approach to controlling the frequency of the OEO can be implemented using discrete optical components; however, this approach restricts the minimum frequency tuning sensitivity. It provides an additional degree of freedom for frequency tuning within the OEO’s operating range, which is ultimately limited by the amplitude-frequency characteristic of the notch filter. Thus, the proposed approach opens up new opportunities for increasing the accuracy and flexibility in generating microwave signals, which can be significant for various communications and radio engineering applications. Full article

Voltage notches are steady-state sub-cycle waveform distortions caused by the normal operation of line-commutated power converters, significantly impacting power quality in industrial low-voltage (LV) networks. Despite their common occurrence, research on this phenomenon is still incipient, and realistic simulation platforms are lacking. This paper introduces a detailed MATLAB (R2024a)/Simulink-based simulation platform that models a benchmark low-voltage industrial installation, including a six-pulse controlled rectifier, linear loads, and a capacitor bank for power factor correction. Systematic simulations are performed with the platform to examine the sensitivity of notch characteristics to key parameters within plausible ranges, such as short-circuit power at the point of common coupling, commutation reactance, firing angle, snubber circuits, and rated power of the rectifier. In addition, parameters such as the rated power of linear loads and the compensation power of the capacitor bank are examined. Other influencing parameters including background voltage unbalance and distortion are also modeled and considered. A comparative analysis with field measurements from German industrial LV networks validates the plausibility and suitability of the simulations. Building upon this platform, a Monte Carlo simulation approach is adopted to generate extensive datasets of realistic voltage notch waveforms by randomly varying these key parameters. A case study conducted under conditions typical of German LV networks demonstrates the applicability of the simulations. To support further research, the simulation platform and exemplary synthetic waveforms are provided alongside the paper, serving as a valuable tool for testing and designing strategies for analysis, detection, and monitoring of voltage notches. Full article

In this work, we explore the behavior of a classical RLC resonance-based bandpass filter, which includes two resistors (one of which is associated with a non-ideal inductor), when either of these resistors is self voltage-controlled. In particular, self-feedback control is achieved by using the voltage developed across the inductor or the capacitor to dynamically change the value of the controlled resistor. This results in a multiplication-type non-linearity, which transforms the linear filter into a non-linear filter described by a set of non-linear differential equations. When gradually increasing the strength of the non-linearity, a notch-like behavior is observed at twice the resonance frequency. However, the non-linear filter can lose its stability with excessive feedback. Simulations and experimental results are provided to support the theory. Full article

The high-frequency (HF) voltage injection method is widely applied in achieving position-sensorless control for interior permanent-magnet synchronous motors (IPMSMs). This method necessitates precise and rapid extraction of the current signal for accurate position estimation and field-oriented control (FOC). In the traditional methods, the position error signal and fundamental current are extracted from the current signal using band-pass filters (BPFs) and low-pass filters (LPFs), or a method based on time-delay filters. However, the traditional extraction method falls short in ensuring simultaneous dynamic performance and accuracy, particularly when the switching frequency is limited or when encountering harmonic and noise interference. In this article, a novel HF pulsating square-wave voltage injection method based on an improved current signal-extraction strategy is proposed to improve the extraction accuracy while maintaining good dynamic performance. The newly devised current signal-extraction method is crafted upon a notch filter (NF). Through harnessing NF’s effective separation characteristics of specific frequency signals, the current signal is meticulously processed. This process yields the extraction of the position error signal and fundamental-current component, crucial for accurate position estimation and motor FOC. Simulation and hardware-in-the-loop (HIL) testing are conducted to validate the effectiveness of the proposed approach. Full article

Glass fiber-reinforced composite cylinders, capable of withstanding internal pressure generated during service, are increasingly utilized as insulators in high voltage circuit breakers. Different testing procedures have been suggested by various standards to assess the pressure resistance of these components. Due to its simplicity and cost-effectiveness, the split-disk testing method is the most widely used for evaluating the hoop strength of pressure cylinders during the development and verification phases. However, the method presents several aspects, such as those related to the influence of specimen geometry and friction, which require further examination since they may impact the outcome of the experimental tests. The investigation, carried out by a combination of experimental testing and finite element analyses, shows that the friction between the specimen and the semi-disks has a noteworthy effect on the hoop load applied to the specimen. Almost constant load distributions along the hoop direction, representative of the real operating conditions in a pressurized cylinder, can be achieved via proper lubrication of the contact surfaces. Furthermore, FE analyses demonstrate that the notch geometry suggested by specific standards (short notch) is not capable of inducing a uniform strain distribution in the notched region. A different notch geometry (long notch) is proposed in the study to attain a more uniform strain field over the reduced area region. The experimental results indicate that the strength measured on the short notch specimens is higher than that determined on the long notch specimens, thus confirming the significant influence of strain distribution on the strength properties measured with the split-disk method. Full article

TI–6AL–4V alloys are widely used in various fields owing to their excellent corrosion resistance, high-temperature resistance, and low-temperature toughness. Herein, a microgroove fixture was used to simulate the microgrooves in a titanium alloy with different aspect ratios to study the influence of the electrolyte flow rate on the polishing effect. The optimization of the electrochemical polishing parameters was conducted using experiments and simulations. The effects of process parameters, such as the concentration of sodium chloride (NaCl) and zinc chloride (ZnCl₂), polishing time, and processing voltage, on the quality of the post-polished surface were studied. Experiments were conducted on microgrooves with different aspect ratios under the optimized polishing process parameters. Changes in the surface elements of the microgrooves after polishing were detected. The experimental results indicated that the optimal electrochemical polishing solution flow rate, NaCl concentration, ZnCl₂ concentration, polishing time, and processing voltage were 0.2 m/s, 4.0 wt.%, 0.4 wt.%, 8 min, and 90 V, respectively. After 8 min of electrochemical polishing, a TiO₂ passivation film was formed on the surface of the microgroove. The surface roughness of the notch and bottom of the microgroove decreased from 250 nm to below 40 nm, with a minimum of 24.5 nm. Full article

To ensure precise phase estimation within the q-axis of the phase-locked loop (PLL), integrating a filter into the q-axis loop is essential to mitigate grid-voltage harmonics. Nevertheless, the intrinsic delay characteristics of this filter impede PLL synchronization during significant grid disturbances. This study begins by developing mathematical models for three types of filters—moving-average filter (MAF) for eliminating odd harmonic components, dq-frame cascaded delayed signal cancellation (dqCDSC) filter, and notch filter (NF). Following the reduction in filter orders, a third-order nonlinear large-signal model of the PLL, incorporating an additional q-axis internal filter, is formulated. Using phase plane analysis, this study investigates the transient synchronism of the grid-following converter (GFL) and explores the influence of delay time constants from the three PLL filters on its behavior while delineating the boundaries of their basins of attraction. Theoretical findings indicate that, relative to the traditional SRF-PLL, incorporating an internal filter into the PLL compromises the transient synchronous stability of GFL. Specifically, greater filter delay time constants exacerbate the GFL’s vulnerability to transient instability amid substantial grid disturbances. Hence, careful consideration is essential when using MAF-PLL and NF-PLL in situations demanding high synchronization stability. The theoretical analyses are validated using Matlab/Simulink to verify their accuracy. Full article

In this article, a tunable RF sensor is presented for the measurement of dielectric materials (liquids and solids) based on a metamaterial resonator. The proposed novel configuration sensor has a microstrip line-loaded metamaterial resonator with tunable characteristics by utilizing a single varactor diode in the series of the resonator. CST Microwave studio is employed for 3D simulations of the tunable sensor, and the desired performance is attained by optimizing various structural parameters to enhance the transmission coefficient ($S_{21}$ magnitude) notch depth performance. The proposed RF sensor can be tuned in L and S-bands using the varactor diode biasing voltage range of 0–20 V. To validate the performance of the sensor, the proposed design has been simulated, fabricated, and tested for the dielectric characterization of different solid and liquid materials. Material testing is performed in the bandwidth of 1354 MHz by incorporating a single metamaterial resonator-based sensor. Agilent’s Network Analyzer is used for measuring the S-parameters of the proposed sensor topology under loaded and unloaded conditions. Simulated and measured S-parameter results correspond substantially in the 1.79 to 3.15 GHz frequency band during the testing of the fabricated sensor. This novel tunable resonator design has various applications in modulators, phase shifters, and filters as well as in biosensors for liquid materials. Full article