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Article

Modeling and Analysis of a PCM-Controlled Boost Converter Designed to Operate in DCM

Laboratory of Electrical Energy Engineering, Tampere University of Technology, 33720 Tampere, Finland
Energies 2019, 12(1), 4; https://doi.org/10.3390/en12010004
Submission received: 15 November 2018 / Revised: 13 December 2018 / Accepted: 17 December 2018 / Published: 20 December 2018
(This article belongs to the Special Issue Power Electronics in Renewable Energy Systems)

Abstract

:
Peak current-mode (PCM) control has been a very popular control method in power electronic converters. The small-signal modeling of the dynamics associated with PCM control has turned out to be extremely challenging. Most of the modeling attempts have been dedicated to the converters operating in continuous conduction mode (CCM) and just a few to the converters operating in discontinuous operation mode (DCM). The DCM modeling method published in 2001 was proven recently to be very accurate when applied to a buck converter. This paper provides the small-signal models for a boost converter and analyses for the first time its real dynamic behavior in DCM. The objectives of this paper are as follows: (i) to provide the full-order dynamic models for the DCM-operated PCM-controlled boost converter; (ii) to analyze the accuracy of the full and reduced-order dynamic models; and iii) to verify the validity of the high-frequency extension applied in the DCM-operated PCM-controlled buck converter in the case of the boost converter. It is also shown that the DCM-operated boost converter can operate only in even harmonic modes, similar to all the CCM-operated PCM-controlled converters. In the case of the DCM-operated PCM-controlled buck converter, its operation in the odd harmonic modes is the consequence of an unstable pole in its open-loop power-stage dynamics.

1. Introduction

The concept of peak current-mode (PCM) control was launched publicly in 1978 [1,2], and it has become a very popular control method in DC–DC converters. The popularity is a consequence of the properties it provides, such as virtually first-order control dynamics, inherent overcurrent limiting of the switching elements, and high input-to-output voltage–noise attenuation in buck-derived converters [3]. The dynamic modeling of PCM control has turned out to be quite challenging. A large number of different modeling attempts has been published for the converters operating in continuous conduction mode (CCM), as discussed in [4], but just a few for the converters operating in discontinuous conduction mode (DCM), such as [5,6,7,8,9]. The DCM models in [5] (pp. 478–480) were given implicitly as equivalent circuits for buck, boost, and buck-boost converters, but the low-frequency control-to-output-voltage transfer function was given explicitly in a generalized form applicable to the named converters, which seemed to predict quite well the location of the load-resistor-affected low-frequency pole in the case of a buck converter [9]. The models are load-resistor affected, and the effect cannot be removed to obtain the required unterminated models. The dynamic models in [6] were derived assuming that there was no internal feedback from the inductor current even if it was used for generating the duty ratio. The author of [6] promoted earlier, in the case of CCM operation, the influence of the sampling effect on the dynamic behavior of PCM-controlled converters but forgetting it in the case of DCM-operated converters. The basic assumption in the modeling method in [6] was wrong, and therefore, the dynamic models were inaccurate as well. A discrete-time modeling method was applied to PCM-controlled DCM-operated buck converter in [7], but no explicit dynamic models were given. The modeling method proposed in [8] in the early 2000s and applied to buck converters was proven to be very accurate in [9]. The dynamic models in [8] were load-resistor affected, which hid the true, unterminated dynamic behavior, as discussed in [9,10]. The reduced-order (i.e., no parasitic elements are considered), unterminated small-signal state spaces applicable to DCM-operated PCM control in buck, boost, and buck-boost converters were also given in [11] (pp. 222–224), but the transfer functions were not solved for comparison.
It was recently proven that the small-signal models of PCM control in CCM contain infinite duty-ratio gain at the mode limit (i.e., the maximum duty ratio after which the converter enters into the harmonic mode of operation), which forces the converter to enter into the second-harmonic mode of operation, as discussed and demonstrated explicitly in [4]. The modeling method introduced in [8] also includes the infinite duty-ratio gain, which takes place at the boundary between the DCM and CCM operations. This implies that the existence of the infinite duty-ratio gain at the mode limit between the operations at the switching frequency and its harmonics are characteristic features of PCM control.
It is widely assumed that PCM-controlled converters are very sensitive to bifurcation phenomena and chaotic operation regardless of the operation mode (i.e., CCM or DCM) [12,13]. The harmonic operation modes are assumed to be the consequence of the bifurcation phenomena, which can take place in open and closed conditions as well. The infinite duty-ratio gain at the mode limit forces the converter to enter into the harmonic operation mode, as discussed explicitly in [4,9]. The harmonic operation mode can also take place as a consequence of a high-switching frequency ripple applied to the duty-ratio process, as discussed in [12,13]. Actually, a proper controller design will eliminate the appearance of the harmonic modes; when the control bandwidth is limited to 1/5th of the switching frequency, the controller is provided with a high-frequency noise filtering, and the operation is limited to the duty ratios less than the mode-limit duty ratio, as discussed and demonstrated in [4]. Both Reference [12] (plain proportional controller) and Reference [13] (proportional-integral (PI) controller without high-frequency pole) demonstrate the appearing of the bifurcation phenomena by using highly impractical controllers.
The main objective of this paper is to provide a comprehensive analysis of the dynamic behavior of a PCM-controlled boost converter operating in DCM including all the relevant parasitic circuit elements. The corresponding analyses are not published earlier in the literature. The investigations of this paper show clearly that the modeling technique introduced in [8] will also accurately predict the dynamic behavior of the DCM-operated PCM-controlled boost converter, when the relevant parasitic elements are considered [14] and the load-resistor effect is removed [10]. In addition, the boost converter is shown to operate only in even harmonic modes, where the averaged duty ratio equals approximately the duty ratio in boundary conduction mode (BCM). The validation of the proposed models was performed in a simulated environment, where all the components with parasitic elements were exactly known, and there were no extra source or load interactions.
The rest of the paper is organized as follows: Section 2 introduces the modeling method briefly and provides the relevant full and reduced-order state spaces, as well as the corresponding explicit transfer functions. Section 3 provides the validation of the developed small-signal models by utilizing MatlabTM Simulink-based switching models [11] (pp. 279–291) and the pseudorandom-binary-sequence-based frequency-response measurement technique introduced in [15,16]. The conclusions are presented in Section 4.

2. Modeling of PCM Control in DCM

The PCM small-signal state space can be obtained from the corresponding state space of a direct-duty-ratio (DDR) or voltage-mode (VM) controlled converter [4,11]. The transformation can be performed by replacing the perturbed duty ratio ( d ^ ) with the duty-ratio constraints given in Equation (1), where F m denotes the duty-ratio gain, x c is the control variable, x i is the state and input variable, and q i is the different feedback and feedforward gains related to x i .
d ^ = F m ( x ^ c i = 1 n q i x ^ i ) .
The DCM dynamic modeling under DDR control was established in the late 1990s [17], and it was later elaborated into a more convenient form in [14], providing the possibility of adding the effect of parasitic circuit elements and performing mixed-conduction-mode modeling as well. The models in [15] were load-resistor affected, and therefore, the modeling technique introduced in [14] is applied in this paper to obtain the unterminated state space, which accurately represents the DDR control dynamics in DCM. The power stage of the boost converter is given in Figure 1 with the open-loop PCM control system that is analyzed in this paper. The selection of the inductor was performed in such a manner that the converter would operate in DCM, when the duty ratio varied from approximately 0.039 to 0.786. The given duty-ratio range can be computed based on K crit = D D 2 and K = 2 L / T s / R L (i.e., K crit = K ), as instructed in detail in [5] (pp. 107–125) (Note: The method based on the application of K crit can yield quite inaccurate values for the corresponding minimum and maximum duty ratios, because it omits the effect of the circuit parasitic elements).
In principle, the accuracy of the DDR small-signal models in DCM is important for obtaining accurate PCM small-signal models due to the method used to develop the latter models. The frequency response of the control-to-output-voltage transfer function of the DDR-controlled boost converter in DCM (cf. Figure 2) is extracted from the Simulink-based switching model by applying the pseudorandom-binary-sequence method described in [15,16]. The construction of the Simulink-based switching models is described in detail in [11] (pp. 279–291).
Figure 2 shows explicitly that the predicted (solid lines: red at V in = 2 0   V and blue at V in = 5 0   V ) and simulated (squares marked at 20 V and diamonds marked at 50 V) frequency responses matched each other perfectly. The predictions were based on the full-order models, which were computed according to the method introduced in [12]. The used modulator gain (i.e., 1 / V M ) equaled 1/1 V (cf. [5]).

2.1. Small-Signal State Space of DDR-Controlled Boost Converter in DCM

The average state space of the DDR-controlled boost converter can be derived from Figure 1 by applying the methods described in detail in [14], which yields the following:
d i L d t = d ( ( R 1 R 2 ) i L + v C r C i o + V D ) L 2 i L d T s R 1 i L + v C r C i o + V D v in v in R 2 i L d v C d t = i L C d 2 T s 2 L C ( v in R 2 i L ) i o C i in = i L v o = v C + r C C d v C d t R 1 = r L + r d + r C     R 2 = r L + r ds .
The corresponding small-signal state space can be derived from Equation (2) by linearizing the averaged state space at a certain operating point by applying a partial-derivative-based method, which was introduced in detail in [11] (pp. 60–61). This procedure yields the following:
d i ^ L d t = A 1 L i ^ L A 2 L v ^ C + A 3 L v ^ in + A 4 L i ^ o + V e L d ^ d v ^ C d t = ( 1 + B 1 R 3 ) C i ^ L B 1 C v ^ in i ^ o C I e C d ^ i ^ in = i ^ L v ^ o = v ^ C + r C C d v ^ C d t
where A 1 4 , B 1 , V e , and I e are given in Equation (4), as well as V 1 3 and R 1 , 2 in Equation (5), respectively.
A 1 = D ( R 2 R 1 ) + 2 L D T s ( V 1 + R 1 I L V 3 + R 2 I L V 1 V 3 2 ) A 2 = D + 2 L I L D T s 1 V 3 A 3 = 2 L I L D T s V 2 V 3 2 A 4 = ( 2 I L L D T s 1 V 3 D ) r C B 1 = D 2 T s 2 L V e = V 2 + 2 L I L V 1 D 2 T s V I e = D T s V 3 L .
V 1 = V o V in + V D + R 1 I L r C I o V 2 = V o + V D + ( R 1 R 2 ) I L r C I o V 3 = V in R 2 I L R 1 = r L + r d + r C     R 2 = r L + r ds .
The operating points (i.e., I L and D ) with the parasitic circuit elements can be computed by the following:
I L = I o + D 2 T s 2 L V in 1 + D 2 T s 2 L R 2 f ( D ) = a 4 D 4 + a 2 D 2 + a 0 = 0
where
a 4 = T s 2 2 L ( V in I o R 2 ( R 1 R 2 ) + V 4 I o R 2 2 ) a 2 = T s ( R 2 ( R 1 R 2 ) I o 2 + V in I o R 1 V in 2 + 2 V 4 I o R 2 ) a 0 = 2 L I o ( V in V 4 R 1 I o ) V 4 = V o + V D r C I o
and without the parasitic circuit elements by
I L = M I o D = K M ( M 1 )
where M = V o / V in . The duty ratio ( D ) in Equation (6) (i.e., f ( D ) = 0 ) can be solved by MatlabTM as follows:
D = min ( abs ( roots ( f ( D ) ) ) .

2.2. Averaged Comparator Equation for PCM-Controlled DCM Boost Converter

The development of the generalized form of the duty-ratio constraints, which is applicable to the second-order converters, was given explicitly in [9]. The comparator equation applicable to the conventional boost converter can be given by the following:
i co m c d T s = i L + m 1 d T s ( 1 d 2 m 1 + m 2 m 2 )
where i co denotes the control current (cf. Figure 1: R s i co ), d denotes the duty ratio, m 1 and m 2 denote the inductor-current up and down slopes as absolute values, and m c denotes the inductor-current compensation slope (cf. Figure 1: R s M c ), respectively.
The averaged comparator equation in Equation (10) can be given as a function of D in a steady state with M c = 0 [11] (p. 199) according to Equation (10) by the following:
D 2 2 M 2 M 1 + M 2 D + 2 M 2 Δ I L M 1 ( M 1 + M 2 ) T s = 0
where Δ I L = I co I L . Equation (11) can be developed further in terms of M and K (i.e., R eq = R L ), when the inductor-current slopes M 1 and M 2 are substituted with their physical values (Note: the parasitic circuit elements are omitted) corresponding to the actual converter as follows:
2 D K R L I co V in = 0
which is applicable for boost and buck-boost converters. The final form of Equation (12) can be obtained for a boost converter by substituting D with K M ( M 1 ) (cf. (8)) yielding
M 2 M K ( I co R L 2 V in ) 2 = 0 .
Equation (13) has two real roots, which means that there are no right-half-plane (RHP) poles in the open-loop dynamics of a boost converter (i.e., the converter is stable in open loop). The corresponding buck converter incorporates one RHP pole, and therefore, it is unstable in open loop, as discussed and demonstrated in [9].
As discussed in [9], the duty-ratio gain ( F m ) will become infinite when the converter enters into the boundary between DCM and CCM operation, i.e., into the boundary-conduction-mode (BCM) operation, which will take place in the case of the boost converter in Figure 1, at approximately V in 17.5   V with D 0.76 . Figure 3 shows the behavior of the inductor current, when the converter enters into the mode boundary at V in 17.5   V and goes deeper into the harmonic operation mode.
Figure 3a shows that the converter entered into the second harmonic mode when the operating point passed through the BCM mode of operation (i.e., the black line), and it kept operating in DCM and in the second harmonic mode as well (i.e., the blue, magenta, and green lines). Figure 3b shows that the averaged duty ratio, which was computed based on D av = 1 V in / V o , stays approximately at the value of D 0.76 , equaling the value in BCM. This kind of behavior equals the behavior of D av in CCM, as discussed in [4]. The origin of such a behavior is the infinite duty-ratio gain at the mode limit, maintaining the average derivative of inductor current at zero.
The DCM-operated PCM-controlled buck converter can adopt both odd and even harmonic operation modes, when the operating point passes through the mode limit, as demonstrated in [5]. The existence of the odd harmonic operation modes is the consequence of the open-loop instability at M 2 / 3 at the resistive load. In Reference [8], the operation at odd and even harmonics was assumed to be a characteristic feature of the DCM-operated PCM-controlled converters in general. The analyses performed with the boost converter, in this paper, show clearly that the even harmonic operation is a general characteristic of PCM control.

2.3. Small-Signal Duty-Ratio Constraints for PCM-Controlled DCM Boost Converter

The coefficients of the duty-ratio constraints in Equation (1) can be solved by replacing m 1 and m 2 with their physical values, which are given for a boost converter in Equation (14), and by linearizing the averaged comparator equation in Equation (10), including all the parasitic circuit elements.
m 1 = v in R 2 i L L m 2 = R 1 i L + v C r C i o + V D v in L .
The duty-ratio constraints for a boost converter can be given in general by
d ^ = F m ( i ^ co q L i ^ L q C v ^ C q in v ^ in q o i ^ o )
and the corresponding full-order coefficients by
F m = 1 T s ( M c + V 3 ( D ( V o + V D ) V in + ( D R 1 + D R 2 ) I L D r C I o ) L V 1 ) q L = 1 D T s L R 2 D 2 T s 2 L V 1 ( ( R 1 R 2 ) V in R 2 ( V 2 + ( R 1 R 2 ) I L ) ) R 1 V 2 V 3 V 1 ) q C = D 2 T s 2 L V 3 2 V 1 2 q in = D T s L ( 1 D 2 V 2 2 V 1 2 ) q o = D 2 T s r C 2 L V 3 2 V 1 2
where V 1 3 and R 1 , 2 are defined in Equation (5).
The duty-ratio constraint coefficients in Equation (16) can also be given in a reduced-order form as a function of M and K by omitting all the parasitic circuit elements, as in [8,11], as given in Equation (17).
F m = 1 T s ( M c + V in ( D M 1 ) L ( M 1 ) ) q L = 1 q C = M R eq ( M 1 ) q in = 1 R eq ( 2 M ( M 1 ) K M M 1 ) q o = 0 .

2.4. Full-Order PCM State-Space for PCM-Controlled DCM Boost Converter

The full-order PCM state space can be obtained by replacing the perturbed duty ratio in Equation (3) with Equation (15) yielding
d i ^ L d t = A 1 + F m q L V e L i ^ L A 2 + F m q C V e L v ^ C + A 3 F m q in V e L v ^ in + A 4 F m q o V e L i ^ o + F m V e L d ^ d v ^ C d t = ( 1 + B 1 R 2 + F m q L I e ) C i ^ L + F m q C I e C v ^ C B 1 F m q in I e C v ^ in 1 F m q o I e C i ^ o F m I e C d ^ i ^ in = i ^ L v ^ o = v ^ C + r C C d v ^ C d t
where A 1 4 , B 1 , V e , and I e are given in Equations (4) and (5).
The reduced-order state space can be obtained from Equation (18) by applying the reduced-order duty-ratio constraints in Equation (17) and replacing A 1 4 , B 1 , V e , and I e with
A 1 = R eq K ( M 1 ) M     A 2 = K M M 1 A 3 = M 2 K M M 1     A 4 = 0     B 1 = M ( M 1 ) R eq V e = 2 V o     I e = 2 I o M 1 K M .

2.5. Full-Order PCM Transfer Functions for PCM-Controlled DCM Boost Converter

The full-order transfer functions can be solved from the linearized state space in Equation (18) with the complete duty-ratio constraints in Equation (16) and the complete DDR elements (i.e., A 1 4 , B 1 , V e , and I e ) in Equation (4) by formulating the state space into a matrix form and applying matrix manipulation techniques (cf. [11] (pp. 57–64).
The determinant ( Δ ) of the transfer functions can be given by
s 2 + s ( A 1 + F m q L V e L F m q C I e C ) + ( A 2 + F m q C V e ) ( 1 + B 1 R 2 ) + F m I e ( A 2 q L A 1 q C ) L C
and the transfer functions representing the input dynamics by
Δ G ci-o = F m ( s V e L + A 2 I e L C ) Δ T oi-o = s A 4 F m q o V e L + A 2 + F m q C V e L C F m I e ( A 4 q C + A 2 q o ) L C Δ Y in-o = s A 3 F m q in V e L + A 2 B 1 F m I e ( A 2 q in + A 3 q C ) L C + B 1 F m q C V e L C
where G ci-o = i ^ in / i ^ co , T oi-o = i ^ in / i ^ o , and Y in-o = i ^ in / v ^ in and the transfer functions represent the output dynamics as follows:
Δ G co-o ( 1 + s r C C ) = F m ( s L I e + ( 1 + B 1 R 2 ) V e A 1 I e ) L C Δ G io-o 1 + s r C C = s L ( F m q in I e B 1 ) + A 3 ( 1 + B 1 R 2 + F m q L I e ) A 1 ( B 1 F m q in I e ) + F m V e ( B 1 ( q L + q in R 2 ) + q in ) L C Δ Z o-o 1 + s r C C = s L ( 1 F m q o I e ) + A 1 ( 1 F m q o I e ) A 4 ( 1 + B 1 R 2 + F m q o I e ) + F m V e ( q L + ( 1 + B 1 R 2 ) q o ) L C
where G co-o = v ^ o / i ^ co , G io-o = v ^ o / v ^ in , and Z o-o = v ^ o / i ^ o .

2.6. Reduced-Order PCM Transfer Functions for PCM-Controlled DCM Boost Converter

The denominator ( Δ ) of the reduced-order transfer functions can be given by
s 2 + s ( R eq D D M 1 ( M 1 L M K M R eq 2 C ) ) + 1 L C ( K M M 1 + K M 2 D M 1 ) .
The transfer functions representing the input dynamics can be given by
Δ Y in-o = s ( M 2 K M M 1 2 F m q in V o L ) + M ( M 1 ) R eq ( K M M 1 2 F m q C V o ) + 2 F m I o ( q in + M 2 q C ) L C Δ T oi-o = K M M 1 + 2 F m q C V o L C Δ G ci-o = 2 F m I o L C ( s R eq C + 1 )
and the transfer functions representing the output dynamics can be given by
Δ Z o-o 1 + s r C C = ( s L + R eq ( K ( M 1 ) M + K ( M 1 ) M D M 1 ) ) L C Δ G io-o 1 + s r C C = s 2 F m q in I o M 1 K M M ( M 1 ) R eq C + M 2 K M M 1 ( M 1 ) K M ( M 1 ) + 2 F m I o ( q in R eq M 1 M + M 2 ) L C Δ G co-o 1 + s r C C = 2 F m V in ( 1 s D T s 2 ) L C .

2.7. Load-Resistor-Affected Dynamics

The load resistor effect on the control-to-output-voltage transfer function ( G co-o ) can be computed by [11] (pp. 38–39)
G co-o R L = G co-c 1 + Z o-o R L
where G co-o and Z o-o (i.e., output impedance) are the unterminated transfer functions of the converter given in Equation (22) or in Equation (25). Here, we treat only the load effect on the denominator of the transfer functions, which represents the dynamics of the system. The load-resistor-affected full-order denominator is given in Equation (27), and the reduced-order denominator with M c = 0 is given in Equation (28), respectively.
s 2 + s ( 1 R L C + A 1 + F m q L V e L F m I e ( q C + q o R L ) C ) + ( A 2 + F m q C V e ) ( 1 + B 1 R 2 ) ) + A 1 A 4 ( 1 + B 1 R 2 ) R L L C + + F m V e q L + q o ( 1 + B 1 R 2 ) R L + F m I e ( A 2 q L A 1 q C A 1 q o + A 4 q L R L ) L C
s 2 + s ( 1 R L C + R eq D D M 1 ( M 1 L M K M R eq 2 C ) ) + 1 L C ( 2 M 1 M K M M 1 + K M ( 2 M 1 ) D M 1 ) .
The damping in the DCM-operated PCM-controlled converters is very high [9], and therefore, the system poles are well separated, where the low-frequency pole ( ω p-LF ) is located close to origin and the high-frequency pole ( ω p-HF ) is located close to the switching frequency or beyond it. Therefore, the system poles can be approximated by utilizing the properties of a second-order polynomial s 2 + s a + b as follows:
ω p-LF b a ω p-HF a .
According to Equation (29), the poles of the unterminated system in Equation (23) can be given by
ω p-LF K M M 1 + K M 2 D M 1 R eq D D M 1 ( M 1 M C K M R eq 2 L ) ( D M 1 ) M K M M 1 + K M 3 C R eq D ( M 1 )
and
ω p-HF R eq D D M 1 ( M 1 L M K M R eq 2 C ) R eq D ( M 1 ) L ( D M 1 ) M .
In the case of the load-resistor-affected system in Equation (28), the poles can be given by
ω p-LF R L ( 2 M 1 ) ( D M 1 ) K M M 1 + K M 2 ( 2 M 1 ) R L C D ( M 1 ) 2 M 1 R L C ( M 1 ) ( D M 1 ) K M M 1 + K M 2 D
and
ω p-HF R L 1 R L C + R eq D D M 1 ( M 1 L M K M R eq 2 C ) R eq D ( M 1 ) L M ( D M 1 ) .
According to Equations (31) and (33), we can conclude that the load resistor does not affect significantly the location of ω p-HF . Equation (32) indicates that the low-frequency pole given in [5] (p. 480) (i.e., Equation (34)) resembles the pole given in Equation (32) but it does not equal it.
ω p-LF R L 2 M 1 R L C ( M 1 ) .
The denominator of the transfer function in [5] can be computed to be
s 2 + s ( 2 R L C + R L L M 1 M 2 ) + 1 L C 2 M 1 M 2
from which the low and high-frequency poles can be approximated to be
ω p-LF 2 M 1 2 M 2 L R L + R L C ( M 1 ) 2 M 1 R L C ( M 1 ) ω p-HF 2 R L C + R L L M 1 M 2 R L L M 1 M 2 .
The low-frequency pole in Equation (34) can be obtained from Equation (36) by setting L = 0 , as instructed in [5].
Table 1 shows the computed values for ω p-LF and ω p-HF at the input voltages of 20 V and 50 V. The values in parenthesis equal the load-resistor-affected values. Table 1 shows clearly that the system poles were well separated. It shows also that the effect of the load resistor was quite small. In addition, it shows that the low-frequency pole ω p-LF R L in Equation (34) and Equation (36) predicted quite well the location of the load-resistor-affected low-frequency pole as well. The high-frequency pole ω p-HF R L in Equation (36) predicted quite inaccurately the load-resistor-affected pole.
Equation (25) indicates that G co-o contains a right-half-plane (RHP) zero approximately at 2 / D T s . Table 1 (i.e., ω z-RHP ) shows that the RHP zero is located at much higher frequencies than in the corresponding CCM boost converter (i.e., ω z-RHP DCM f s / 2 vs. ω z-RHP CCM f s / 100 ; cf. [9] (p. 153). Thus, the main contributions of the RHP zero on the control design are reflected via the high-frequency phase behavior in DCM, which allows for the use of higher bandwidth controllers than in CCM.

2.8. Generalized Transfer Functions

The control engineering block diagrams, from which the generalized transfer functions in Equation (37) (output dynamics) and in Equation (38) (input dynamics) are defined, are given explicitly in [9]:
G io-o PCM = v ^ o v ^ in = ( 1 + F m q L B H sr B A ) G io-o DDR F m ( q in B + q L B H sr C A ) G co-o DDR 1 + L c + L v Z o-o PCM = v ^ o i ^ o = ( 1 + F m q L B H sr B A ) Z o-o DDR + F m q L B H sr A G co-o DDR 1 + L c + L v G co-c PCM = v ^ o i ^ co = F m B G co-o DDR 1 + L c + L v
Y in-o PCM = i ^ in v ^ in = Y in-o DDR F m B G ci-o DDR 1 + L c + L v ( q in B + q L B H sr C A + ( q o B + q L B H sr A Z C ) G io-o DDR ) T oi-o PCM = i ^ in i ^ o = T oi-o DDR + F m G ci-o DDR 1 + L c + L v ( ( q o B + q L B H sr A Z C ) Z o-o DDR q L B H sr A ) G ci-o PCM = i ^ in i ^ co = F m G ci-o DDR 1 + L c + L v
where L c and L v denote the inductor-current and output-voltage feedback-loop gains as given in Equation (39), G cL-o DDR and G co-o DDR denote the control-to-inductor-current and control-to-output-voltage transfer functions of the corresponding DDR-controlled converter
L c = F m q L B H sr G cL-o DDR L v = F m q o B G co-c DDR
and Z C denotes the impedance of the output capacitor, H sr denotes the high-frequency extension for correcting the phase behavior given in Equation (40), and A, B, and C are defined in Equation (41) for a boost converter, respectively.
H sr = 1 + s 2 ζ ω sr + s 2 ω sr 2 .
A = 1 D 2 T s 2 L ( r L + r ds )     B = D T s L V in     C = D 2 T s 2 L .
The duty-ratio constraints applicable for Equations (37) and (38) in the case of a boost converter can be derived from Equation (16) by setting r C = 0 as
F m B F m q L B q L     q in B q in     q o B q C
and G cL-o DDR and G co-o DDR for computing G co-o PCM of the boost converter in Equation (43) can be given by
G co-c = s L I e + ( 1 + B 1 R 2 ) V e A 1 I e L C ( s 2 + s A 1 L + A 2 ( 1 + B 1 R 2 ) L C ) ( 1 + s r C C ) G cL-o = s V e C + A 2 I e L C ( s 2 + s A 1 L + A 2 ( 1 + B 1 R 2 ) L C )
where A1,2, B1, Ve, and Ie are given in Equation (4), respectively.

3. Simulink-Based Model Validation

The validation was performed in such a manner that the simulated frequency responses were extracted from the Simulink-base switching model corresponding exactly to the boost converter given in Figure 1. The pseudo-random-binary-sequence-based method to extract the frequency responses is described in [13,14]. The predicted frequency responses were computed based on the complete transfer functions given in Equation (22), where the effect of the high-frequency extension H sr in Equation (40) is added with ζ = 0.5 and ω sr = 2 π f s (i.e., f s = 100   kHz ) (cf. [9]).
Figure 4 shows the predicted (solid lines) and simulated (diamond and square marks) output impedance at the input voltages of 20 V and 50 V. The figure shows that there were no high-frequency effects visible at the magnitude or phase, which were actually removed by the output capacitor, as also discussed in [5]. This means that the average-model-based transfer function given in Equation (22) predicted exactly the dynamic behavior of the output impedance as such.
Figure 5 shows the predicted (solid black lines) and simulated (red square marks at 20 V and blue diamond marks at 50 V) frequency responses of the control-to-output-voltage transfer functions. The figure shows that the predicted and simulated responses with the application of H sr in Equation (38) had very good matches with each other.
Figure 6 shows the comparison of the predicted responses of the control-to-output-voltage transfer functions, where the solid black lines denote the responses computed by using the full-order transfer functions, and the dashed lines denote the responses by using the reduced-order transfer functions, respectively. The figure shows that the responses coincided. This implies that the reduced-order models can be used for different design purposes, but it is, however, recommended to verify the situation with the actual design in a similar manner as shown in Figure 6.
Figure 7 shows the unterminated (dashed lines) and load-resistor-affected (solid lines) frequency responses of the control-to-output-voltage transfer function at the input voltages of 20 V (red) and 50 V (blue), respectively. The figure confirms that the load-resistor effects were concentrated at the low frequencies, as discussed in Section 2.6. It is obvious that the load-resistor-affected control-to-output-voltage responses can be utilized in the control design, when the feedback-loop crossover frequency is designed to be at high enough frequencies (i.e., >1 kHz in this case).
The output-voltage feedback loop of the boost converter was designed at the input voltage of 20 V, where the RHP zero is at its minimum frequency (cf. Table 1). The phase behavior of the control-to-output-voltage transfer function is such that a proportional-integral (PI) controller can be used (cf. Figure 7) as given in
G cc = K cc 1 + s / ω z s ( 1 + s / ω p ) .
The controller zero ( ω z ) was placed at 1 kHz, the controller pole ( ω p ) was placed at 5 kHz, and the controller gain ( K cc ) was set to 88,614 to obtain the feedback-loop crossover frequency of 10 kHz and the phase margin of 60 degrees, as shown in Figure 8. If looking carefully the behavior of the high-frequency magnitude of the feedback-loop gain (solid red line) at the input voltage of 20 V, then it would be clear that the sufficient gain margin (i.e., 6 dB at least) would determine the obtainable crossover frequency. The dashed lines denote the PI-controller design, where the high-frequency pole was omitted, as in [17]. According to the corresponding high-frequency-magnitude behavior (dashed red line), it would be obvious that the design would be easily sensitive to the high-frequency ripple effects in the duty-ratio generation process.
Figure 9 shows the output-voltage response to a load current change of 1.5 A at the input voltages of 20 V (red) and 50 V (blue). The responses were quite close to each other, because the feedback-loop gains do not change much when the input voltage varies. The same responses in the case of the CCM-operated PCM-controlled boost converter can be seen in [11] (p. 324, Figure 6.53), where the voltage dipped at 20 V and 50 V to 1.37 V and 0.56 V, respectively, for a steep change in the output current of 1.3 A. This is a very good indication of why the DCM operation is preferred in converters having a RHP zero in their control dynamics.

4. Conclusions

The full-order dynamic modeling and comprehensive analysis of a DCM-operated PCM-controlled boost converter are presented for first time in the literature in this paper. The investigations show that the PCM-modeling technique introduced in [8] and validated in the case of a buck converter in [9] also produces accurate models for a boost converter, when the load-resistor effect is removed [10] and the high-frequency extension introduced in [9] is added. In addition, this paper shows that the reduced-order models also quite accurately predicted the dynamic behavior in this particular case. This phenomenon should not be generalized until the validity of the reduced-order models in each specific case is verified by means of the full-order models.
Suntio [8] stated explicitly that DCM-operated PCM-controlled converters will operate in harmonic operation modes at both even and odd harmonic frequencies. The investigations in this paper show explicitly that the even harmonic-mode operation is a characteristic feature of PCM-controlled converters in general because of the infinite duty-ratio gain at the mode limit. The even and odd harmonic-mode operations of the buck converter are the consequence of the open-loop RHP pole.
It was also shown that the output-voltage transient response of the DCM-operated PCM- controlled boost converter is outstanding compared with the corresponding CCM-operated PCM-controlled boost converter.

Funding

The research received no external funding.

Conflicts of Interest

The author declares no conflict of interest.

References

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Figure 1. The power stage of the peak current-mode (PCM)-controlled boost converter in open loop with definitions of the component values and the operational conditions.
Figure 1. The power stage of the peak current-mode (PCM)-controlled boost converter in open loop with definitions of the component values and the operational conditions.
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Figure 2. The frequency responses of the control-to-output-voltage transfer function of the direct-duty-ratio (DDR)-controlled boost converter at the input voltages of 20 V (red) and 50 V (blue). The solid lines denote the predicted responses, and the squares (20 V) and diamonds (50 V) denote the simulated responses.
Figure 2. The frequency responses of the control-to-output-voltage transfer function of the direct-duty-ratio (DDR)-controlled boost converter at the input voltages of 20 V (red) and 50 V (blue). The solid lines denote the predicted responses, and the squares (20 V) and diamonds (50 V) denote the simulated responses.
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Figure 3. The behavior of (a) the inductor current and (b) the average duty ratio in the mode limit (boundary conduction mode (BCM)) and in harmonic operation modes.
Figure 3. The behavior of (a) the inductor current and (b) the average duty ratio in the mode limit (boundary conduction mode (BCM)) and in harmonic operation modes.
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Figure 4. The predicted (solid lines) and simulated (diamond and square marks) frequency responses of the output impedance at the input voltages of 20 V (red) and 50 V (blue).
Figure 4. The predicted (solid lines) and simulated (diamond and square marks) frequency responses of the output impedance at the input voltages of 20 V (red) and 50 V (blue).
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Figure 5. The predicted (solid black lines) and simulated (diamond and square marks) frequency responses of the control-to-output-voltage transfer functions at the input voltages of 20 V (red) and 50 V (blue).
Figure 5. The predicted (solid black lines) and simulated (diamond and square marks) frequency responses of the control-to-output-voltage transfer functions at the input voltages of 20 V (red) and 50 V (blue).
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Figure 6. The black solid lines represent the frequency responses of the control-to-output transfer function predicted by the full-order model, and the dashed lines represent the corresponding frequency responses predicted by the reduced-order model at 20 V (red) and 50 V (blue).
Figure 6. The black solid lines represent the frequency responses of the control-to-output transfer function predicted by the full-order model, and the dashed lines represent the corresponding frequency responses predicted by the reduced-order model at 20 V (red) and 50 V (blue).
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Figure 7. The dashed lines denote the predicted unterminated control-to-output-voltage frequency responses, and the solid lines denote the predicted load-resistor-affected frequency responses at the input voltages of 20 V (red) and 50 V (blue).
Figure 7. The dashed lines denote the predicted unterminated control-to-output-voltage frequency responses, and the solid lines denote the predicted load-resistor-affected frequency responses at the input voltages of 20 V (red) and 50 V (blue).
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Figure 8. The output-voltage feedback-loop gains, when the PI controller with a high-frequency pole is used (solid lines) and when the PI controller without the high-frequency pole is used (dashed lines).
Figure 8. The output-voltage feedback-loop gains, when the PI controller with a high-frequency pole is used (solid lines) and when the PI controller without the high-frequency pole is used (dashed lines).
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Figure 9. The output-voltage response to a load current change of 1.5 A at the input voltages of 20 V (red) and 50 V (blue).
Figure 9. The output-voltage response to a load current change of 1.5 A at the input voltages of 20 V (red) and 50 V (blue).
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Table 1. The location of the system poles ω p-LF and ω p-HF , as well as the location of the right-half-plane RHP zero ( ω z-RHP ) of G co-o at V o = 75   V and I o = 1.5   A .
Table 1. The location of the system poles ω p-LF and ω p-HF , as well as the location of the right-half-plane RHP zero ( ω z-RHP ) of G co-o at V o = 75   V and I o = 1.5   A .
Input Voltage ω p-LH / Hz ω p-HF / Hz ω z-RHP / Hz
20 V14 (24)1 M (864 k)53 k
50 V29 (40)193 k (192 k)195 k
20 V [5](24)(648 k)-
50 V [5](40)(295 k)-

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Suntio, T. Modeling and Analysis of a PCM-Controlled Boost Converter Designed to Operate in DCM. Energies 2019, 12, 4. https://doi.org/10.3390/en12010004

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Suntio T. Modeling and Analysis of a PCM-Controlled Boost Converter Designed to Operate in DCM. Energies. 2019; 12(1):4. https://doi.org/10.3390/en12010004

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Suntio, Teuvo. 2019. "Modeling and Analysis of a PCM-Controlled Boost Converter Designed to Operate in DCM" Energies 12, no. 1: 4. https://doi.org/10.3390/en12010004

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