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Article

Robust Control of Shunt Active Power Filters: A Dynamical Model-Based Approach with Verified Controllability

by
Jorge-Humberto Urrea-Quintero
*,
Nicolás Muñoz-Galeano
and
Jesús M. López-Lezama
Grupo en Manejo Eficiente de la Energía (GIMEL), Departamento de Ingeniería Eléctrica, Universidad de Antioquia (UdeA), Calle 70 No. 52-21, Medellín 050010, Colombia
*
Author to whom correspondence should be addressed.
Energies 2020, 13(23), 6253; https://doi.org/10.3390/en13236253
Submission received: 17 July 2020 / Revised: 30 September 2020 / Accepted: 23 November 2020 / Published: 27 November 2020
(This article belongs to the Special Issue Electrical Power Engineering: Efficiency and Control Strategies)

Abstract

:
This paper presents the robust control of Three-Leg Split-Capacitor Shunt Active Power Filters (TLSC SAPFs) by means of structured H controllers for reactive, unbalanced, and harmonic compensation and the DC-link bus voltage regulation. Robust controller synthesis is performed based on the TLSC SAPF dynamical model including power losses in passive elements. Before the control implementation, a systematic procedure for the nonlinear controllability verification of the converter and its quantification using the set-theoretic approach is presented. Controllability verification serves to accurately design the SAPF’s operation region. Thus, a Voltage Oriented Control (VOC) structure is implemented by using two different approaches to determine the PI controller parameters: (1) the traditional Pole-Placement method (PP-PI) and (2) the H -PI structured synthesis approach, which leads to PI robust controllers. From the latter approach, two sets of parameters are obtained. The first set considers the nominal model ( H -PI), and the second one explicitly accounts for the model parametric uncertainties ( H -uPI). An optimization procedure is presented for obtaining the optimal H -PI and H -uPI controller parameters where four complementary constrains are defined to establish a trade-off between the controllers performance and robustness. The enforcement of constraints is later evaluated for each of three PI controllers obtained. This work aims to establish a common ground for the comparison of robust control strategies applied to TLSC APFs; therefore, the TLSC SAPF compensation performance is measured and compared with the performance indices: integral of the absolute error ( I A E ), integral of the time-weighted absolute error ( I T A E ), integral of the absolute control action ( I U A ), and maximum sensitivity ( M s ).

Graphical Abstract

1. Introduction

In three-phase four-wire power systems, the proliferation of inefficient loads causes undesired reactive power demand, harmonic distortion, and unbalanced currents. Consequently, users and utilities must face excessive power losses in electric networks, the most representative being wire [1,2] and transformer [3,4] losses. Another drawback of power systems with the presence of inefficient power is the circulation of neutral currents that worsen power quality and lead to technical problems [5]. Shunt Active Power Filters (SAPFs) are often used for mitigating these problems. SAPFs are connected in parallel with loads and compensate the currents related to the inefficient power. Such compensation avoids the circulation of inefficient currents in power systems, reducing power losses, increasing the overall system efficiency, and improving power quality of the system.
The Three-Leg Split-Capacitor (TLSC) SAPF is one of the most common devices used in the industry for compensating inefficient currents [6,7]. The research community also recommends the use of the TLSC SAPF topology; after a comprehensive study of SAPF topologies, the authors in [8] concluded that TLSC SAPF features a superior performance over other SAPF topologies for low-to-medium-power applications, providing satisfactory results under both steady-state and dynamic performance conditions. The TLSC SAPF topology has only three legs, which facilitates the implementation of any control strategy, each of its legs being independently controlled. Concerning the split capacitor, it gives the possibility of controlling zero-sequence currents produced by unbalanced and third harmonic currents. For the aforementioned reasons, in this paper, TLSC SAPF is selected for the design of a robust control structure with verified controllability.
For improving the dynamic behavior of TLSC SAPF, researchers have focused on implementing advanced control techniques. To mention some of the most relevant and recently published papers: Reference [9] implemented a current controller based on particle swarm optimization for correcting the steady-state error. Reference [10] proposed a robust repetitive controller for following voltage and current signals, achieving zero steady-state errors. Reference [11] suppressed the low frequency harmonics whose frequencies are lower than the resonance frequency and mitigated the rest of the harmonics by a resonance damping method. In [12], a modified passivity-based control was proposed for handling steady-state current error where an error proportional-integral regulator was inserted into the coupling loop. Reference [13] proposed a parallel resonance detection and control scheme, which includes square-wave current active injection and selective compensation with closed-loop regulation. Reference [14] presented a control strategy that includes an algorithm for a proper selective compensation for inefficient load currents when power capacity in SAPF is exceeded. Although numerous papers have been reported concerning advanced control techniques for SAPF, as can be seen from the bibliographic search, most of the research is focused on obtaining a better performance of the closed-loop system. Moreover, one of the most widely adopted controllers that remains as the standard for power electronic converters is the PI controller. This is due to its ease of implementation and good performance in most applications (provided that it is properly tuned). Furthermore, there are plenty of techniques to compute its parameters [15]. Notwithstanding that the PI controller would be one of main players in the power electronics field to automatically regulate most of the converters, it has been recently reported in the literature as a general rule that only about one third of the PI/PID-based control loops works properly, and one third has poorly tuned controllers [16]. This makes the tuning of PI/PID controllers a very active and still relevant research topic.
The main contribution of this paper is the robust control synthesis of PI controllers for SAPFs by using H controllers and taking into account the model parameters’ uncertainty. Basically, our paper proposes the use of a state-of-the-art technique for synthesizing robust PI controllers to the SAPF that achieves high standards in the stabilization of the closed-loop system with guaranteed performance. This technique leads to the optimization of the PI controllers instead of the classical tuning approximation [17,18]. The design of PI/PID controllers that are robust in the presence of system uncertainty is a recurrent challenge in control engineering due to the inevitable mismatch between the real device and its mathematical model [18]. Nevertheless, this problem can be intrinsically handled by means of a structured H -control design [19]. Despite the fact that neither the application of H optimization-based controllers, nor the idea of structured H -PI controllers’ synthesis are new in the power electronics converters field (see, e.g., [20,21] for some H applications and [22] for structured H -PI controllers), to the best of the authors’ knowledge, this approach has not been yet applied to the control of three-phase four-wire active filters such as TLSC SAPFs.
The dynamical performance of a closed-loop control system highly depends on the controllability of the system that we want to control. Increasing system controllability leads to a better closed-loop system response [23]. Controllability is concerned with the ability of the system to be driven from an initial state to a desired one by applying a control input sequence [24]. Researchers frequently perform the controllability analysis of DC–DC converters after linearizing the dynamical model by means of Kalman’s rank condition [24]. Generally, controllability is a property of power electronic converters that is given as granted. However, the authors in [25] recently proved that a DC-DC converter is controllable only if certain conditions are met, and that is a property that could change depending on the region in which the system is operated. For power electronics devices that have an inherent non-linear behavior, it is more convenient to use Lie’s brackets method [25]. The evaluation of the controllability by using both the rank of the controllability matrix for linear systems and Lie’s brackets method for non-linear systems allows verifying if the system is controllable or not; nonetheless, such techniques do not permit its quantification. To overcome this limitation, the controllability analysis via the set-theoretic approach has been applied by some authors [26,27,28]. This approach allows not only the system controllability verification, but also its quantification. Furthermore, in [29], it was shown that the controllability verifications via the set-theoretic approach and Lie’s brackets method are equivalent. Consequently, the controllability analysis based on the set-theoretic approach as proposed by the authors in [30] is adopted in this work to verify whether the designed TLSC SAPF is controllable. Additionally, a normalized controllability index ( C I ) is introduced as proposed in [27] for quantifying SAPF controllability. This controllability analysis is performed here to support the validity of the designed robust PI controllers in a wide region around the nominal operation point. A C I close to one will indicate a highly controllable system, then the closed-loop control system performance will depend mainly on the selected control structure and its parameters’ synthesis method. This is of foremost importance because it permits establishing a benchmark to evaluate either new PI/PID controller synthesis methods or other control structures applied to the TLSC SAPF.
This paper is composed of the following sections: Section 2 presents the TLSC SAPF dynamical modeling in the d q 0 frame. Section 3 describes the robust control structure design, performance indices, and controllability index. Section 4 presents the results, which include: the evaluation of the controllability of the system, the computation of the C I , controllers synthesis, the computation of performance indices, and the evaluation of compensation performance. Finally, Section 5 concludes and highlights the most relevant aspects of this paper.

2. TLSC SAPF Dynamical Modeling

The TLSC SAPF under study is depicted in Figure 1. It is mainly composed of a split-capacitor DC-link ( C 1 and C 2 ) and a three-phase Voltage Source Inverter (VSI). The TLSC SAPF is connected in parallel at the Point of Common Coupling (PCC) through an L filter, and its function is to compensate the inefficient currents generated in the load, avoiding their circulation through the main supply. The neutral wire is directly connected to the mid-point of the DC link as presented by [31,32,33,34] to mitigate zero sequence currents produced by non-linear and unbalanced load components. Resistors R C 1 , R C 2 , and R L represent the converter losses, which reflect a more realistic approximation of the system.
Equation (1) corresponds to the switching function u a b c for activating power switches F 1 , 2 , 3 , 4 , 5 , 6 of the VSI. Assuming that switches F 1 , 3 , 5 and F 2 , 4 , 6 are complementary:
u a b c = 1 if F 1 , 3 , 5 = o n and F 2 , 4 , 6 = o f f 1 if F 1 , 3 , 5 = o f f and F 2 , 4 , 6 = o n
u a b c in terms of F 1 , 3 , 5 and F 2 , 4 , 6 are given by Equations (2) and (3), respectively.
u a b c = 2 F 1 , 3 , 5 1
u a b c = 1 2 F 2 , 4 , 6
By applying Kirchhoff’s laws to the system in Figure 1, the large-signal dynamical model of the converter is given by:
L d i S a b c d t = R L i S a b c v D C 2 u a b c ε v + v p c c a b c C d v D C d t = i S a b c u a b c T v D C R o 2 C d ε v d t = i S a b c 2 ε v R o
where v D C = v C 1 v C 2 is the total DC voltage, 2 ε v = v C 1 + v C 2 is the differential DC voltage between capacitors C 1 and C 2 , C 1 = C 2 = C , and R C 1 = R C 2 = R o .
It is well known that the model given by the equations in (4) describes the system evolution in terms of sinusoidal signals, which are not the most appropriate to perform the design and control tasks [35]. Consequently, d q 0 transformation is applied to decompose the a b c system into its direct, quadrature, and zero sequence components (Equation (5)) [36]. The direct component is denoted by subscript d and is associated with the active power component; the quadrature component is denoted by subscript q and is associated with the reactive power component; and the zero sequence component is denoted by subscript 0 and contains harmonics and unbalanced components. After d q 0 transformation, the TLSC SAPF model becomes:
L ω i S q ω i S d 0 + d i S d q 0 d t = R L i S d q 0 v D C 2 u d q 0 0 0 3 ε v + v p c c d q 0 C d v D C d t = i S d q 0 u d q 0 T v D C R o 2 C d ε v d t = 3 i S 0 2 ε v R o
where ω is the AC angular frequency; while i S d q 0 , v p c c d q 0 , and u d q 0 T are currents, voltages, and switching functions in the d q 0 frame; respectively.
For a balanced source and load, the d q components in Model (5) reach a constant value when the system is in a steady-state condition, while the zero sequence is equal to zero. In contrast, for unbalanced loads, the d q 0 components are composed of a constant quantity plus a small oscillatory part with twice the nominal grid frequency [37]. Furthermore, in the presence of harmonic loads, the d q 0 components have other oscillatory components that depend on the order of the current harmonics [38].
From the large-signal model given by the equations in (5), the TLSC SAPF small-signal model is obtained by applying the following standard state-space realization:
x ˙ = A x + B u y = C x + D u
with:
A = f x , u x i x e , u e B = f x , u u i x e , u e C = h x , u x i x e , u e D = h x , u u i x e , u e
where x i refers to the ith state variable, f ( x , u ) refers to each equation of Model (5), and h ( x , u ) refers to the equations that relate state and output variables, in this paper h ( x , u ) = x . Subscript e in (7) refers to both state variables ( x e ) and input variables ( u e ) in their rated values, which are represented with capital letters in Equations (8)–(15).
In this modeling stage and for obtaining the A, B, C, and D matrices, state variables are defined as x = i S d , i S q , i S 0 , v D C , ε v T ; input variables are defined as u = u d , u q , u 0 , v p c c d , v p c c q , v p c c 0 T ; and output variables are defined as equal to the state variables as y = x = i S d , i S q , i S 0 , v D C , ε v T .
Due to the fact that for a balanced load, the zero sequence components become zero, i.e., v p c c 0 = 0 , i S 0 = 0 , and u 0 = 0 , thus the coupling between the d q and zero components can be neglected, and the TLSC SAPF d q 0 small-signal model can be split into: (i.) a TLSC SAPF d q small-signal and (ii.) a TLSC SAPF 0 sequence small-signal model, respectively, as follows:
i ˙ L d i ˙ L q v ˙ D C = R L L ω U d 2 L ω R L L U q 2 L U d C U q C 1 R o C i S d i S q v D C + V D C 2 L 0 1 L 0 0 V D C L 0 1 L I S d C I S q C 0 0 u d u q v p c c d v p c c q
i ˙ L 0 ε ˙ v = R L L 3 L 3 2 C 1 R o C i S 0 ε v + V D C L 1 L 0 0 u 0 v p c c 0
If the system states are taken as the system outputs, matrix C corresponds to a 3 × 3 identity matrix for the model given by Equation (8) while a 2 × 2 identity matrix for the model given by Equation (9). On the other hand, matrix D is a 4 × 3 matrix of zeros and a 2 × 2 matrix of zeros for models given by Equations (8) and (9), respectively.
Note that the converter small-signal model given by Equation (8) is in the time domain. The common realization that allows relating the state-space model in the time domain to the model in the frequency domain is given as follows:
G ( s ) = 1 d e t ( s I A ) C a d j ( s I A ) T B + D
Applying the realization given by Equation (6) to the model given by Equation (8), the transfer functions for the TLSC SAPF d q small-signal model for i S d , i S q , and v D C are, respectively, given by:
G i S d ( s ) = 2 C L R o V D C s 2 + ( 2 C R o R L V D C 2 I S d L R o U d 2 L V D C ) s 2 I S d L R o U q ω 2 I S d R o R L U d R o ( U q ) 2 V D C 2 R L V D C ( 2 C L R o V D C ω 2 I S q L R o U d ) s 2 I S q L R o U q ω 2 I S q R o R L U d + R o U d U q V D C 2 L ω V D C 2 ( 2 C L R o s 2 + ( 2 C R o R L + 2 L ) s + R o ( U q ) 2 + 2 R L ) 2 ( 2 C L R o ω s R o U d U q + 2 ω L ) 4 C L 2 R o s 3 + ( 8 C L R o R L + 4 L 2 ) s 2 + ( 4 C L 2 R o ω 2 + 4 C R o R L 2 + 2 L R o ( U d ) 2 + 2 L R o ( U q ) 2 + 8 L R L ) s + 4 ω 2 L 2 + 2 R o R L ( U d ) 2 + 2 R o R L ( U q ) 2 + 4 R L 2
G i S q ( s ) = ( 2 C L R o V D C ω 2 I S d L R o U q ) s + 2 I S d L R o U d ω 2 I S d R o R L U q + R o U d U q V D C + 2 L ω V D C 2 C L R o V D C s 2 + ( 2 C R o R L V D C 2 I S q L R o U q 2 L V D C ) s + 2 I S q L R o U d ω 2 I S q R o R L U q R o ( U d ) 2 V D C 2 R L V D C 2 ( 2 C L R o ω s R o U d U q 2 ω L ) 2 ( 2 C L R o s 2 + ( 2 C R o R L + 2 L ) s + ( U d ) 2 R o + 2 R L ) 4 C L 2 R o s 3 + ( 8 C L R o R L + 4 L 2 ) s 2 + ( 4 C L 2 R o ω 2 + 4 C R o R L 2 + 2 L R o ( U d ) 2 + 2 L R o ( U q ) 2 + 8 L R L ) s + 4 ω 2 L 2 + 2 R o R L ( U d ) 2 + 2 R o R L ( U q ) 2 + 4 R L 2
G v D C ( s ) = 2 ( 2 I S d L 2 R o s 2 + ( 4 I S d L R L L U d V D C ) R o s + ( 2 I S d L 2 ω 2 + L U q V D C ω + 2 I S d R L 2 R L U d V D C ) R o ) 2 ( 2 I S q L 2 R o s 2 + ( 4 I S q L R L L U q V D C ) R o s + ( 2 I S q L 2 ω 2 L U d V D C ω + 2 I S q R L 2 R L U q V D C ) R o ) 2 ( 2 L R o U d s + ( 2 ( L U q ω + R L U d ) ) R o ) 2 ( 2 L R o U q s + ( 2 ( ω U d L + R L U q ) ) * R o ) 4 C L 2 R o s 3 + ( 8 C L R o R L + 4 L 2 ) s 2 + ( 4 C L 2 R o ω 2 + 4 C R o R L 2 + 2 L R o ( U d ) 2 + 2 L R o ( U q ) 2 + 8 L R L ) s + 4 ω 2 L 2 + 2 R o R L ( U d ) 2 + 2 R o R L ( U q ) 2 + 4 R L 2
Applying the realization given by Equation (6) to the model given by Equation (9), the transfer functions for the TLSC SAPF zero sequence small-signal model for i S 0 and ε v are, respectively, given by:
G i S 0 = C R o V D C s V D C 2 C R o s + 2 2 C L R o s 2 + ( 2 C R o R L + 2 L ) s + 3 R o + 2 R L
G ε v = 3 2 V D C R o 3 R o 2 C L R o s 2 + ( 2 C R o R L + 2 L ) s + 3 R o + 2 R L
Assuming an inductive balanced load, the zero sequence components become zero, then the remaining variables to be found are I S d , I S q , U d , and U q . To compute the stabilizing nominal values of such variables, it is enough to solve the equations in (5) such that the derivatives on the left-hand side are equal to zero as follows:
L ω i S q ω i S d = R L I S d q v D C 2 U d q + V p c c d q 0 = I S d q U d q T v D C R o
where V p c c d is the direct component of the grid voltage, I S d and I S q are the direct and quadrature current components of the TLSC SAPF, respectively, U d and U q are the direct and quadrature components of the modulated signal, and v D C is the DC-link voltage.
The steady-state model given by the equations in (16) corresponds to a system of three equations with four unknowns, namely, I S d , I S q , U d , and U q . Solving this model for the last three unknowns results in Equations (17)–(19). To consistently solve these nonlinear equations, it is convenient to find a suitable value for I S q .
I S d = 1 2 R L V p c c d ± ( V p c c d ) 2 4 R L R L ( I S q ) 2 + v D C 2 2 R o
U d = 1 I S d v D C R o + 2 I S q v D C ( L ω I S d + R L I S q )
U q = 2 v D C ( L ω I S d + R L I S q )
The TLSC SAPF function is to supply the currents demanded by the load while maintaining the DC-link voltage charged. This can be done by demanding active power from the grid. Accordingly, I S d must be equal to the requested current to maintain the DC-link voltage level and supply the VSI internal losses. Furthermore, I S q must be equal to the current requested by the load due to its inefficiencies.
Assuming that the system’s main supply only provides the fundamental positive-sequence active power ( P 1 + ) to the load (i.e., the load is completely efficient from the system main supply point of view [39]), the required current by the load, denoted as i L a b c , is given by:
i L a b c = 2 I ˜ L a b c e j ω t = 2 A I ˜ L 120 e j ω t
where I ˜ L a b c and I ˜ L 120 are three-phase phasor vectors and A is the standard Fortescue sequence component decomposition [37]. Applying the d q 0 transformation, the following relations are obtained:
i L d q = 2 I ˜ 1 e j ( θ ω t ) + 2 I ˜ 2 * e j ( θ + ω t )
i L 0 = 2 I ˜ 0
where i L d q = i L d + j i L q = i L a b c + i L a b c and complex variables 2 I ˜ 1 , 2 I ˜ 2 * , and 2 I ˜ 0 are directly related to the positive, negative, and zero sequence component phasors, respectively. In Equation (21), 2 I ˜ 1 corresponds to i L d q in the synchronous d q rotating reference frame ( T a b c d q 0 ( ω t ) ), when only the positive sequence is present. Similarly, 2 I ˜ 2 * corresponds to i L d q in the rotating reference frame ( T a b c d q 0 ( ω t ) ), when only the negative sequence is presented. Consequently, i S q is given by:
i S q = i L q = i L a b c
i S q can be easily computed by measuring the reactive power demanded by the load. Moreover, in steady-state, i S q = I S q .
Now, with I S q given by Equation (23), the system of equations given by (17)–(19) has three equations with three unknowns, being solvable and producing a stable steady-state condition of the system. It is noticed from Equation (17) that there are two possible solutions for I S d , then a criterion for solving this problem could be to select I S d as min | I S d | .
The previous steady-state analysis is critical for the tuning of the controllers when linear control structures are chosen due to the fact that a linear controller is only valid around a steady-state condition of the system. However, approaches to compute the steady-state condition were not found while reviewing the literature related to the SAPFs, the procedure presented in this work being, to the best of the authors knowledge, the first one to systematically compute it.
It is worth mentioning that the models given by the set of equations in (8) and (9) and the transfer functions given by (11)–(15) constitute the basis to study the converter dynamical attributes and allow the design of both its passive elements to guarantee some power quality requirements and the control structure to achieve a satisfactory compensation of the load inefficiencies. Additionally, the model given by the set of equations in (5) serves to carry out the system controllability verification.

3. Control Structure Design, Performance Indices, and Controllability Verification

This section includes the control structure design, the theory for computing the control performance indices, and the computation of the controllability index.

3.1. Control Structure Design

The main objective of the TLSC SAPF control structure is to supply inefficient currents demanded by the load while keeping the DC-link voltage at its nominal value. This control objective must be achieved such that the grid only provides fundamental positive-sequence active power P 1 + to the load [14]. Efficient and inefficient system currents are directly related to the d q 0 transformation and are compatible with IEEE Std. 1459–2010 [37]. Furthermore, the use of the TLSC SAPF d q 0 model facilitates the control structure design task [40].
This paper uses the Voltage Oriented Control (VOC) structure proposed by [40] (see Figure 2). The VOC is composed of two PI current controllers for both quadrature q and zero current components, a cascade PI controller in a slave-master configuration with an outer loop for regulating the DC-link and an inner loop for controlling the direct d current component. This control structure allows compensating not only the inefficient currents related to the d q components, but also the zero sequence currents related to harmonic and unbalanced loads.
Once the PI current control loops are closed, the TLSC SAPF can be approximated through the equivalent simplified representation presented in Figure 3. This equivalent representation assumes that the inductor current is perfectly controlled, reaching its steady-state fast enough to neglect the transient part. The above assumption allows dealing with the control of the DC-link voltage in a straightforward way by directly adopting it as the manipulated input i s d q 0 .
Both the large- and small-signal models of the simplified TLSC SAPF are, respectively, given by:
C d v D C d t = i S d q 0 u d q 0 T v D C R o 2 C d ε v d t = 3 i S 0 2 ε v R o
v ˙ D C ε ˙ v = 1 R o C 0 0 1 R o C v D C ε v + U d C U q C U 0 C 0 0 3 2 C i S d i S q i S 0 y = 1 0 v D C ε v
Then, by applying the realization given by Equation (10), the resulting transfer functions are given by:
G v D C i S d q 0 = R o U d R o U q R o U 0 R o C s + 1
Transfer function G v D C i S d is used to design the outer PI controller to regulate the DC-link voltage.
The PI controller parameters of Figure 2 were obtained using two different approaches: (1) the traditional Pole-Placement method (PP-PI) and (2) the H synthesis approach as proposed in [41] to obtain robust PI controllers [19]. From the latter approach, two different sets of the PI controller parameters were obtained: one of them considering only the TLSC SAPF nominal model ( H -PI) and the other one accounting for the converter model parameters uncertainty ( H -uPI).
Formally speaking, the H control problem can be stated as a plant P in function of real rational transfer matrices, as follows:
P : x ˙ P = A x P + B 1 w + B 2 u z = C 1 x P + D 11 w + D 12 u y = C 2 x P + D 21 w + D 22 u
where A, B 1 , are real matrices of appropriate dimensions, x P R n P corresponds to the states of the system, u R n u is the control function, y R n y is the measured output, w R n w is the disturbance, and z R n z is the regulated output. Furthermore, the space K of real rational transfer matrices K is defined, called the controller space, that is:
K : x ˙ K = A K x K + B K y u = C K x K + D K y
with x K R n K . The controller K is denominated as a structured controller if matrices A K , B K , C K , and D K depend smoothly on a design parameter κ R n , referred to as the vector of tunable parameters. Then, the problem of characterizing and computing an optimal solution K * K leads to the following optimization problem:
minimize κ T w z ( P , K ) s . t : K stabilizes P internally , K K .
where the objective function is the H -norm of the closed-loop performance channel T w z ( P , K ) . It is worth mentioning that the choice of the controller space K is the key to a proper understanding of the problem. In the case of a PID controller, the tunable parameters are κ = { τ K , k P , k I , k D } , which in the space-state can be expressed as:
K ( κ ) = A K B K C K D K = 0 0 1 0 1 / τ K k D / τ K k I 1 / τ K k P + k D / τ K
If the PID structure in Equation (30) is used within the H framework and a H -PID controller is computed, a PID controller that minimizes the closed-loop H -norm among all internally stabilizing PID controllers [18] can be expressed as follows:
T w z ( P , K p i d * ) T w z ( P , K p i d )
The controller space for this structure is:
K p i d = { K p i d ( κ ) : as in Equation ( 30 ) , κ = { τ K , k P , k I , k D } R 4 }
The structured controller concept is also valid for the problem when parametric uncertainties are considered. A practical way to face this problem consists of optimizing the structured controller K ( κ ) against a finite set of plants P ( 1 ) , , P ( M ) which represent model variations due to the parametric uncertainty in tandem with the robustness and performance specifications. This leads to a multi-objective constrained optimization problem of the form [17]:
minimize κ f ( κ ) = max k soft , i I k T w i z i ( k ) ( P , K ( κ ) ) s . t : g ( κ ) = max k hard , j J k T w j z j ( k ) ( P , K ( κ ) ) 1 K stabilizes P internally , κ K p i d .
where T w i z i ( k ) denotes the i-th closed-loop robustness or performance channel w i z i for the k-th plant model P ( k ) . Soft and hard denote index sets taken over a finite set of specifications, that is, for example, i = { 1 , , M } , and j = { 1 , , N } . The multi-objective optimization problem given by (33) can be read as follows: to minimize the worst-case cost of the soft constraints T w i z i ( k ) , k s o f t , while enforcing the hard constraints T w i z i ( k ) 1 , k h a r d , which prevails over the soft ones and are mandatory.
The bottleneck to efficiently solve the optimization problems given by (29) and (33) is the inherent nonconvexity and non-smoothness of the mathematical program underlying the design. These obstacles have been overcome by the use of nonsmooth optimization algorithms [41], which allow facing multi-model and multi-objective structured control designs, as discussed in [18].

3.2. Performance Indices

This subsection defines the performance indices that are used for comparing the controllers implemented in this paper. The performance of the closed-loop control system has been typically evaluated with diverse performance indices, the most common being: the integral of the absolute error ( I A E ) and the integral of the time-weighted absolute error ( I T A E ). For both indices, the error is measured as the difference between the reference set-point and the controller output, that is e ( t ) = r ( t ) y ( t ) . The I A E and I T A E performance indices are respectively given by:
I A E = 0 t f | e ( t ) | d t
I T A E = 0 t f t | e ( t ) | d t
where t f is defined as the final simulation time. The I A E and I T A E performance indices give relative information about how fast the set-point is reached by the output. However, outstanding controller performance turns into a deterioration of the control loop robustness, sometimes reflected as abrupt control action changes. Accordingly, it would be interesting to quantify the control system effort. This can be quantified by the integral of the absolute control action u ( t ) , defined as:
I U A = 0 t f | e u ( t ) | d t
with e u ( t ) = u 0 u ( t ) , where u 0 refers to the control action value at the system operating point.

3.3. Controllability Index

Prior to the implementation of a control structure, it is of utmost importance to verify whether the system inputs have any impact on the outputs, i.e., whether the system is controllable or not. State controllability is defined as a system property that refers to the ability to drive a dynamical system from a given initial condition to any final one and back within the space state of the system and in a finite time [24].
In this work, a set-theoretic approach is adopted to verify whether the TLSC SAPF is controllable. The controllability verification via the set-theoretic approach requires the computation of the reachable ( R t ( Ω τ ) ), controllable ( C t ( Ω τ ) ), and reversible ( τ t ( Ω τ ) ) sets, with Ω τ the set of the state space from which the system can evolve and into in a given time t = τ (reader is referred to Appendix A for additional details regarding the set-theoretic approach adopted here.). The system controllability is guaranteed if int ( τ t ( Ω τ ) ) . The controllability index ( C I ) is used for quantifying the controllability of the system [42,43]:
C I = η τ t ( Ω τ ) η R t ( Ω τ )
where η τ t ( Ω τ ) and η R t ( Ω τ ) are the reversible and reachable sets hypervolumes, respectively. Appendix A summarizes all the main definitions related to the controllability verification via the set-theoretic approach as introduced in [42].

4. Results

This section presents the simulation results of the TLSC SAPF with the operating requirements and parameters specified in Table 1 for a medium-power electrical application [44]. Passive elements selected to performed simulations are L = 30.2 mH, C = 2200 μ F, R L = 1 Ω , and R C 1 = R C 2 = 1000 Ω . All scripts used for the simulations are available online at github.com/jhurreaq/TLSC_SAPF_Energies. Section 4.1 describes the results concerning the evaluation of the system controllability and the computation of the C I . Section 4.2 presents the controllers synthesis and the computation of the performance indices. Section 4.3 shows the compensation performance.

4.1. Controllability Verification and Controllability Index Computation

In this work, the following states and input boundaries were considered to compute the reachable and controllable sets: i S d [ 10 A , 10 A ] , i S q [ 10 A , 10 A ] , and v D C [ 550 , 650 ] . Figure 4 shows the TLSC SAPF R t ( Ω τ ) from the initial condition x 0 = [ 1.1816 A , 4.3742 A , 600 V ] at t = 50 ms and C t ( Ω τ ) to x 0 at t = 50 ms. From Figure 4, it is evident that the reversible set τ t ( Ω t ) exists since R t ( Ω t ) and C t ( Ω t ) intersect. Furthermore, the system is locally controllable around x e .
The C I is computed based on Equation (A6), resulting in C I = 0.6772 , so the designed TLSC SAPF is 67.72 % controllable around the operating point ( x 0 ). This result implies that there is some portion of the space-state that is reachable with the admissible control actions, but it is impossible to return to x 0 from this space-state region in t = 50 ms with the same admissible control actions. Nevertheless, it is possible that for t > 50 ms, these uncontrollable states become controllable. However, in this work, t = 50 ms is considered as a safe time to analyze the system controllability since the switching time of the system is T s w = 0.05 ms, i.e., t > > 0.05 ms.
The controllability analysis of the TLSC SAPF via the set-theoretic approach allows a visual verification of this property. From Figure 4, it is seen that the system is locally controllable around x 0 due to the fact that, with the admissible control actions, it is possible to drive the system in any state-space direction from x 0 . Furthermore, there exits a state-space region ( τ t ( Ω τ ) = R t ( Ω τ ) C t ( Ω τ ) ) where it is possible to go and return to x 0 in t = 50 ms, i.e., the system is weakly reversible around x 0 , fulfilling the controllability conditions establishing that a non-linear system is locally controllable around its operating point if int ( τ t ( Ω τ ) ) . The most relevant fact of this result is that the nominal operating point is located towards the center of the intersection of the reachable and controllable sets indicating that the TLSC SAPF is highly controllable around its nominal operating point. This feature might relax the design of PI controllers designed taking this nominal operating point and allowing a satisfactory TLSC SAPF closed-loop performance.
It is remarked here that the system controllability could be improved following either a rigorous procedure to select its passive element values or through an optimization approach that maximizes the C I [28]. This is out of the scope of the present work. However, it would be very interesting as a future work to evaluate if a higher C I leads to a better closed-loop system performance and/or facilitates the control structure design.

4.2. Controllers Synthesis and Performance Evaluation

Due to the fact that switching frequency of the TLSC SAPF is f s w = 20 kHz, the bandwidth of the current loops must be equal to or smaller than 4 kHz, while the bandwidth of the DC-link voltage loop must be smaller than 800 Hz following the rule of f s w / 5 and f s w / 25 for the inner and outer control-loop bandwidth, respectively [46]. Additionally, it is desired to establish a trade-off between the control loop performance and its robustness [47]. Then, a maximum sensitivity M s within the range [ 1.2 , 2 ] would be desired, with M s = max ω | 1 / 1 + K ( j ω ) P ( j ω ) | , K being the controller transfer function and P the transfer function that represents the system.
The following design specifications are set up for the current controllers designed by means of the Pole-Placement technique (PP-PI): (i.) a damping factor ζ equal to 0.707 and (ii.) a closed-loop bandwidth of 4 kHz. On the other hand, the following goals are established for the current controllers designed based on the structured H -norm optimization for both the H -PI and H -uPI controllers. R1 is a sensitivity function represented by the following transfer function: S ( s ) = 1.2 s / s + 4 × 10 3 , which guarantees a small gain at low frequencies for good disturbance rejection crossing 0 dB at 4 kHz (the maximum allowed control-loop bandwidth). R2 is the maximum loop gain of 20 dB/decade roll-off past 4 kHz, which restricts the maximum control-loop bandwidth. R3 is the specification of the minimum damping and maximum natural frequency for the closed-loop poles, which are ζ = 0.707 and ω n = 12 × 10 3 Hz, respectively. R4 is the imposition of a minimum gain margin of 18 dB and a minimum phase margin of 60 degrees. Goals R1, R2, and R3 are defined as soft constraints, while R4 is defined as a hard constraint. Additionally, uncertainties of 30 % are considered for L and C and uncertainties of 50 % for R L and R 0 to compute the H -uPI controllers. A graphical representation of goals R1, R2, and R3 is shown in Figure 5a–c, respectively. In Figure 5, colored areas refer to the forbidden regions that the closed-loop system must avoid.
Regarding the DC-link voltage, the PI controller provides the i S d setpoint, when the pole-placement method is used with the following design specifications: i. a damping factor ζ equal to 0.707 and ii. a setting time t s equal to 0.2 s. The following goals are established for the DC-link voltage PI controller designed, based on the structured H -norm optimization for both the H -PI and H -uPI controllers: R1 is a sensitivity function represented by the following transfer function: S ( s ) = 1.2 s / s + 400 , which guarantees a small gain at low frequencies for good disturbances rejection crossing 0 dB at 400 Hz, the maximum allowed control-loop bandwidth. R2 is the maximum loop gain of 20 dB/decade roll-off past 1.6 kHz, restricting the maximum control-loop bandwidth. R3 is the specification of the minimum damping and maximum natural frequency for the closed-loop poles, which are ζ = 0.707 and ω n = 100 Hz, respectively. R4 is the imposition of a minimum gain margin of 20 dB and a minimum phase margin of 60 degrees. Goals R1 and R2 are defined as soft constraints, while R3 and R4 are defined as a hard constraints. A graphical representation of goals R1, R2, and R3 is depicted in Figure 6a–c, respectively. In Figure 6, colored areas refer to the forbidden regions that the closed-loop system must avoid.
Table 2 summarizes the PI controller parameters obtained by the pole-placement method and by the H optimization. A value lower than one in the soft and hard columns indicates that the optimization goals were achieved, while a value higher than one indicates that the constraints might be violated. From Table 2, it is remarked that the soft column has few values higher than one, while the hard constraints are fulfilled for all the optimized PI controllers.
Figure 7, Figure 8, Figure 9 and Figure 10 display the optimization constraints and the frequency response of the closed-loop system of every control loop. For instance, from Figure 7, Figure 8, Figure 9 and Figure 10, it is possible to see whether or not the closed-loop specifications are achieved by each of the optimized PI controllers for every control loop. Additionally, it is verified whether the PI controllers tuned via the pole-placement method also meet goals R1, R2, R3, and R4.
Figure 7 presents the results of the i s d control loop. Figure 7a shows the closed-loop system frequency response for specifications R1, R2, and R4 and the root location of the closed-loop system verifying specification R3 for the PI controller tuned by using the pole-placement method. From this set of figures, it is possible to observe that specifications R1, R2, and R3 are met, while specification R4 is slightly violated. It is remarked that this R4 refers to the robustness specification, and it was established as a hard constraint for the structured H optimization of the PI controllers. Consequently, it is expected that this PI controller presents a lower robustness than the optimized PI controllers. On the other hand, regarding the optimized PI controllers, from Figure 7b,c, it can be observed that all the specifications are met for H -PI and H -uPI, respectively.
Figure 8 presents the results of the i s q control loop. Figure 8a shows the closed-loop system frequency response for specifications R1, R2, and R4 and the root location of the closed-loop system verifying specification R3 for the PI controller tuned by using the pole-placement method. From this set of figures, it is possible to observe that specifications R1, R2, and R3 are met, while the gain margin part is not achieved for specification R4. This last specification refers to the robustness of the closed-lop system, and it was established as a hard constraint for the structured H optimization; then, it is expected that this PI controller presents lower robustness than the optimized PI controllers for this control loop. Regarding the H -PI controller, it is seen from Figure 8b that specification R3 is not fulfilled; however, this specification was given as a soft constraint in the optimization problem. From Figure 8c, it is observed that specification R1 is only violated at low frequencies, while specifications R2 and R3 are not satisfied. It is highlighted from Figure 8b,c that specification R4 is enforced.
Figure 9 presents the results of the i s 0 control loop. It can be seen that all the specifications are achieved; however, the gain margin in specification R4 for the PI controller tuned by means of the pole-placement method is not met. It is expected that the H -PI and H -uPI controllers are more robust than the pole-placement based PI controller because this restriction R4 was specified as a hard constraint for the H optimization, but it was not met.
Figure 10 presents the results of the v D C i s R E F d control loop. Figure 10a shows the closed-loop system frequency response for specifications R1, R2, and R4, as well as the root location of the closed-loop system verifying specification R3 for the PI controller tuned by the pole-placement method. From this set of figures, it is possible to observe that specifications R2 and R3 are met, while specifications R1 and R4 are not satisfied. In particular, it is seen that specification R1 is met at low and high frequencies; however, in an intermediate range, it is violated. Regarding specification R4, neither the phase nor the margin gains are fulfilled, meaning that this PI controller does not meet the robustness criteria. For the H -PI and H -uPI controllers, it is seen from Figure 8b,c that only specification R1 is not met at low frequencies; nevertheless, this specification was given as a soft constraint in the optimization problem.
As a conclusion from Figure 7, Figure 8, Figure 9 and Figure 10, all hard constraints are enforced, and the pole-placement PI controllers meet all specifications of the optimal controllers; however, the robustness constraint given by specification R4 is not met. This means that in the case of not having high parametric uncertainties, all obtained PI controllers should perform very similarly. To validate the above statement, simulations in PSIM comparing the closed-loops dynamical performance were carried out. Accordingly, starting from the nominal load, that is for R = 18.58 Ω and L = 44 mH, four step changes represented as load variations were applied to the TLSC SAPF as follows: i. At t = 0.7 s, an unbalanced system condition was set up, a total equivalent inductive-resistive load with L = 1 mH and R a = 17 Ω , R b = 18 Ω , and R c = 38 Ω is connected in shunt form to phases a, b, and c, respectively, to the nominal load. Next, ii. at t = 1.4 s, a harmonic and inductive-resistive load with L = 1 mH and R = 17 Ω was added in parallel to the previous equivalent unbalanced load. This configuration represents a harmonic-unbalanced load, and it is the worst condition considered in this study. iii. At t = 1.7 s, both the nominal and the unbalanced loads are removed, leaving only the harmonic and inductive-resistive load with L = 1 mH and R = 17 Ω . Finally, iv. at t = 2.2 s, the load is disconnected, the TLSC SAPF being the only remaining load to the main grid. Thus, from t = 2.2 to t = 2.4 , it is possible to obverse how much power the converter is demanding from the grid and whether it is active or reactive power. The total simulation time is t = 2.4 s.
Figure 11 shows the comparison between all the designed PI controllers. From Figure 11a–c, it is possible to appreciate that all the PI current controllers perform quite similarly, satisfactorily tracking the current references even when these are sinusoidal signals. Additionally, it is observed from the simulation results that the zero current component is different from zero only when the unbalanced load is connected to the grid and the d q current components track sinusoidal references. Furthermore, it is observed that the q current component predominates in the time interval when only the harmonic load is considered, meaning that most of the harmonics are related to load inefficiencies. Regarding the DC-link voltage loop simulations reported in Figure 11d, it is appreciated that the designed PI controllers can regulate the voltage to 600 V, rejecting all the disturbances due to the load variations. It is also observed that a small oscillation appears during the time interval in which the unbalanced condition of the load is simulated. However, this oscillation is considerably small and does not affect the control loop performance. Finally, it is highlighted that the maximum voltage overshoot is around 3 % , showing the control structure’s capabilities to preserve the system stability.
The simulation results displayed in Figure 11 validate that all the designed PI controllers satisfactorily achieve the control objectives. However, it is not possible to quantitatively establish which one performs better. Table 3 summarizes the PI controller dynamical performance indices I A E and I T A E , the control action effort index I U A , and the maximum sensitivity M s . From Table 3, it is possible to conclude that for the current control loops, in general, H -uPI controllers perform better than H -PI and PP-PI controllers; whereas, H -PI controllers turned out to be more robust for the performed simulations. However, it is expected that H -uPI controllers perform better in highly uncertainty situations. Regarding the DC-link voltage control loop, the H -PI controller turned out to perform better than the H -uPI and PP-PI controllers. However, again, the H -uPI controller is expected to perform better in highly uncertain scenarios. It is worth mentioning that despite the differences in the performance indices, all the designed PI controllers present a good dynamical performance, tracking complex current references and preserving the global stability of the control structure despite the applied load variations and their nonlinearities.

4.3. TLSC SAPF Compensation Performance

From the results reported in Figure 11, it is clear that each of the designed PI controllers is suitable to perform its functions. The question now is whether the whole control structure achieves the control objective; that is, the TLSC SAPF provides the load of all the currents associated with inefficient powers while regulating the DC-link voltage and minimizing the neutral current. Accordingly, other simulations are performed in PSIM to evaluate to what extent this control objective is achieved. These simulations are carried out only considering the H -uPI controllers and adopting the same simulation setup as in the PI controllers’ performance evaluation. From Figure 11, it is possible to validate that the DC-link voltage is regulated at 600 V independently of the load variations. On the other hand, Figure 12 shows the d q 0 components of the currents and the neutral current on the grid, load, and converter sides. Figure 12a shows the d current component. There, it is observed that the sum of i g r i d d and i S d results in i L o a d d , where i S d is composed of the oscillatory part of i L o a d d and a small DC quantity related to the demanded current by the TLSC SAPF to supply its internal losses and maintain the DC-link voltage level. This means that i g r i d d is mainly composed of efficient currents. Figure 12b displays the q current component. From this Figure, it is observed that i g r i d q remains close to zero during the whole simulation time, meaning that no inefficient currents related to the demanded reactive power are supplied by the grid. Indeed, it is observed that i L q and i S q are opposite, meaning that i S q corresponds to the q current component demanded by the load. Figure 12c presents the results of the zero current component. This figure shows that i L o a d 0 is different from zero within the time interval 0.7 s to 1.7 s, meaning that an unbalanced load condition in fact causes the appearance of the neutral current. However, i g r i d 0 remains close to zero during the whole simulated time, which indicates that the i S 0 u 0 control loop effectively compensates the inefficient currents related to the load unbalances. The above statement is validated by Figure 12d, where it is appreciated that the neutral current returning to the grid is close to zero during the whole simulated time, while the neutral current by the converter and the load cancel out each other.
Figure 13 shows the currents per phase in the a b c reference frame for i g r i d a b c , i L o a d a b c , and i S a b c , comparing them with respect to the voltage at the common coupling point (PCC). The aim is to verify whether currents and voltage are in or out of phase. Figure 13a compares the a b c current components on the grid, load, and converter sides from left to right, respectively. From the left-hand figure, it is possible to appreciate that the currents on the grid side remain balanced for the unbalanced and harmonic load conditions. The figure in the middle shows the waveform of the current demanded by the load. It is observed how, in the time interval 0.7 s to 1.2 s, phase c demands a lower current than phases a and b, while, in the time interval 1.8 s to 2.2 s, the demanded current has harmonic distortion. The right-hand side of Figure displays the currents related to the converter side. It is observed that the waveform of the currents at this side seems to correspond to the inefficient currents demanded by the load. For instance, by the zoom at t = 2 s, it is seen that the current waveform is very distorted, which can be associated with the harmonics caused by the harmonic load. Figure 13b–d displays the currents on each side of the system and compares them to the voltage at the PCC. From this set of figures, it can be seen that the only currents remaining in phase with the voltage at the PCC are those at the grid side. In contrast, the currents on the load and converter sides are all out of phase for the time intervals in which the load is unbalanced. Additionally, for the time interval in which the harmonic load condition is considered, it is possible to appreciate how the currents on the converter side become distorted.
In conclusion, from Figure 11, Figure 12 and Figure 13, it is possible to appreciate that the TLSC SAPF achieves the control objective, leaving to the grid the task of only supplying the considered efficient currents to the load. Moreover, the neutral current returning to the grid is minimized, and the DC-link voltage level is regulated, at the same time only with the proposed control structure based on simple feedback control loops and composed of standard PI controllers.

5. Conclusions

This paper introduced a dynamical-based model approach for controlling TLSC SAPFs; the reactive, unbalanced, and harmonic compensation, as well as the regulation of the DC-link bus were successfully achieved. The d q 0 model for TLSC SAPFs, which includes power losses, was deduced; both large- and small-signal models were presented to have ready-to-use models for design and control purposes. Furthermore, transfer functions and steady-state analysis were included in the procedure. It is remarked that the objective control was fulfilled by using a simple feedback control structure composed of standard PI controllers.
Controllability was evaluated through a set-theoretic approach, obtaining the reversible and reachable sets’ hypervolumes and concluding that TLSC SAPF is locally controllable around its operating point. For the particular case evaluated, the controllability index was 67.72 % , which indicates that there is a portion of the space-state reachable with the admissible control actions; the other uncontrollable portion that corresponds to the region when t > 50 ms is considered a safe region since the switching time is 0.05 ms.
Robust controllers based on PP-PI, H , and H -uPI controllers were satisfactorily implemented. The H and H -uPI controller parameters were obtained through an optimization process. A detailed comparison among controllers was performed though the evaluation of I A E , I T A E , I U A , and M s . The tests showed that all designed controllers performed very similarly and were capable of rejecting several types of disturbances while preserving the system stability; however, it was found that the H -uPI controller performed better under highly uncertainty scenarios.

Author Contributions

Conceptualization, J.-H.U.-Q. and N.M.-G.; data curation, J.-H.U.-Q.; formal analysis, J.-H.U.-Q. and N.M.-G.; funding acquisition, J.M.L.-L. and N.M.-G.; investigation, J.-H.U.-Q., N.M.-G., and J.M.L.-L.; methodology, J.-H.U.-Q.; project administration, N.M.-G.; resources, J.-H.U.-Q., N.M.-G., and J.M.L.-L.; software, J.-H.U.-Q.; supervision, N.M.-G. and J.M.L.-L.; validation, J.-H.U.-Q.; visualization, J.-H.U.-Q.; writing, original draft, J.-H.U.-Q.; writing, review and editing, J.-H.U.-Q., N.M.-G. and J.M.L.-L. All authors read and agreed to the published version of the manuscript.

Funding

This research was funded by the Colombia Scientific Program within the framework of the so-called Ecosistema Científico (Contract No. FP44842-218-2018).

Acknowledgments

The authors gratefully acknowledge the support from the Colombia Scientific Program within the framework of the call Ecosistema Científico (Contract No. FP44842-218-2018). The authors also want to acknowledge Universidad de Antioquia for its support through the project “estrategia de sostenibilidad”.

Conflicts of Interest

The authors declare no conflict of interest.

Appendix A. Set-Theoretic Approach for the Controllability Verification

Previous to the implementation of a control structure, it is of utmost importance to verify whether the system inputs have any impact over the outputs, i.e., whether the system is controllable or not. State controllability is defined as a system property that refers to the ability to drive a dynamical system from a given initial condition to any final one and back within the space state of the system and in a finite time [24].
Since 1960 when Kalman presented his seminal work “On the general theory of control systems", the rank of the controllability matrix has been widely adopted for evaluating this property in linear time invariant (LTI) systems represented by state-space models. Moreover, this approach has been applied in the power electronic converters field in [48,49,50,51] to verify their controllability. Recently, Lie’s brackets have been used to verify some DC-DC converters controllability [25]. However, the set-theoretic approach as in [28,30,42,52] can be seen as a more general approach to evaluate nonlinear system’s controllability. First, because it allows system controllability quantification and second because the information obtained by the sets computation could be used for future tasks such as the system optimization or redesign (see, e.g., [28] for some examples).
In this section, the basic concepts as well as an algorithm to verify the system controllability based on the set-theoretic approach are introduced. Here, the balanced load case is considered for the controllability verification of the TLSC SAPF since d q components of the model stabilize in constant values. Then, the remaining state variables are i S d , i S q , and v D C meaning that the system state-space dimension is X R 3 . This allows to compute three-dimensional sets using 3D plots. For a better understanding of the controllability concept, some remarks and definitions are provided bellow:
Definition A1
(State controllability [24]). A state x of a plant is said to be “controllable” if there exists a control signal u ( t ) defined over a finite interval 0 t t 1 such that Φ ( t 1 ; x , 0 ) = 0 . In general, the time t 1 will depend on x . If every state is controllable, the plant is said to be “completely controllable”. Where, the function Φ is defined by Kalman as a transition function that represents the system evolution from the initial state x 0 = x ( t 0 = 0 ) to the final state x ( t 1 ) = Φ ( t 1 ; x 0 , t 0 ) . If the final state is an equilibrium state ( x ( t 1 ) = 0 ), then this state is controllable.
Remark A1.
The linear system controllability is a global property, since the only equilibrium of a linear system is the origin.
Remark A2.
In Kalman’s definition, the input u is not bounded. Thus, u can take any value in the rage ( , ) .
Remark A3.
In Kalman’s definition, the controllability is a system property. Each system state is controllable or not. Therefore, a intermediate possibility is not considered in this definition making a controllability quantification impossible.
Definition A2
(Reachability [42]). A linear system is reachable if for x R n , there exists a control action u such that the system can be driven from the initial state x 0 = x ( t 0 = 0 ) to the final state x ( t ) = Φ ( t ; x 0 , t 0 ) in a finite time t.
Remark A4.
Reachability is the ability of a linear system has to reach any final state x ( t ) from an initial state. In the other hand, the controllability is the ability of a linear system reaches the origin from an initial state x 0 . In the LTI systems case, controllability and reachability coincide. Whereas, they are not equivalent concepts in the nonlinear systems case. Moreover, reachability is a weaker property than controllability [53], also called weak controllability or accessibility.
Definition A3
(Reachable Set in time t). Given a set Ω τ , the Reachable set R t ( Ω τ ) from Ω τ in a time t > τ is the set of all states vector x for which exists a x ( τ ) Ω τ X and u ( · ) U such that x ( t ) = x , that is:
R t ( Ω τ ) = { z X | x Ω τ u U : z = φ ( t , τ , x , u ) } ,
where z is the final state to be reached. This means, R t ( Ω τ ) is the set of all state-space vectors that can be reached by the system evolution from Ω τ at a time t by means of the admissible control actions.
Definition A4
(Controllable Set in time t). Given a set Ω τ , the Controllable set C t ( Ω τ ) to Ω τ in a time t < τ is the set of all states vector x for which exists a x ( τ ) Ω τ X and u ( · ) U such that if x ( t ) = x then x ( τ ) Ω τ , that is:
C t ( Ω τ ) = { z X | u U : φ ( t , τ , x , u ) Ω τ } .
This means, C t ( Ω τ ) is the set of all state-space vectors from which, given the admissible control actions, it is possible to arrive to the set Ω τ .
Remark A5.
Ω τ must not be a single state-space point but a small state-space region. This because the probability of driving the system to a single point is equal to zero. The size of Ω τ could be thought as a controller accuracy constraint. That is, if Ω τ size shrinks to the size of a point in the space-state, a very precise control strategy must be implemented to drive the system inside Ω τ . In contrast, if Ω τ is a small state-space region, a more flexible control strategy could be adopted.
Definition A5
(Reversible set in time t). Given a set Ω τ , the Reversible set from Ω τ to Ω τ in a time t = τ is the set of all states vector x for which exists a x ( τ ) Ω τ X and u ( · ) U such that x ( τ ) Ω τ , that is:
τ t ( Ω τ ) = { z X | x Ω τ u U : z = φ ( t , τ , x , u ) Ω τ } .
or equivalently
τ t ( Ω τ ) = R t ( Ω τ ) C t ( Ω τ )
Remark A6.
To analyze the state controllability in nonlinear systems via the set-theoretic approach, it is enough that int ( τ t ( Ω τ ) ) . Accordingly, a nonlinear system is controllable if: i. the system satisfies the Lie’s brackets rank condition and ii. it is almost weakly reversible [30]. Condition (i) leads to verify the dimension of Lie algebra associated to the system. However, the Lie algebra associated to the system only indicates the dimension of either the reachable or controllable sets, i.e, int R t ( Ω τ ) or int C t ( Ω | t a u ) . Furthermore, to the system being reversible and consequently at least weakly controllable, it must be satisfied that Ω τ τ t t = [ 0 , τ ] [29].
The controllability verification via the set-theoretic approach requires the computation of the reachable, controllable, and reversible sets, where the system controllability is guaranteed if int ( τ t ( Ω τ ) ) . It is highlighted that in contrast to the Lie’s bracket approach, the non-linear system need not be input-affine, the system states and inputs limitations can be included as constraints for the sets computations, and the system controllability is not anymore a yes/no property; instead, this property can be now quantified and visualized [27,28].
Gómez [42] presented a Monte Carlo based algorithm to compute an approximation of both reachable and controllable sets. This algorithm was extended by Alzate [43] for robust reachable and controllable sets case. Moreover, the authors in [43] presented a Controllability Index ( C I ) that verifies and quantifies the system controllability. The Monte Carlo based algorithm and C I described in [43] are presented below.
Algorithm A1 can be used to compute an approximation of R t , C t , and τ t to test local system controllability. Algorithm A1 is based on randomized algorithms, which have proven to be a good solution to transform intractable control problems into polynomial complexity problems dependent on system complexity and computer equipment [54].
Algorithm A1: Controllability verification algorithm
Input: x 0 , f , t , Ω τ , x m i n , x m a x , u m i n , u m a x , ϵ , δ
Output: R t ( Ω τ ) , C t ( Ω τ ) , and τ t ( Ω τ )
  • Given an initial condition x 0 , a fail-risk ( δ ) , a maximum permissible error ϵ , the constraints for x , and a set of admissible vales for U .
  • To Determine the sample size using the Chernoff bound given by:
    N > 1 2 ϵ 2 log 2 δ .
  • To obtain N samples for u i U n i f o r m ( U ) , for i = 1 , 2 , , N .
  • The Reachable set R t ( Ω τ ) at time t is the system solution x ˙ ( t ) = f ( x , u ) for each u i U .
  • The Controllable set C t ( Ω τ ) at time t is the system solution x ˙ ( t ) = f ( x , u ) for each u i U .
  • The Reversible set τ t ( Ω τ ) at time t = τ is the intersection between R t and C t .
Once the reachable, controllable, and reversible sets are computed, valuable information can be extracted from them. For example, it is possible to compute the size of the sets and use such information to quantify the system controllability around an operating point as done in [43].
A C I is required to quantify the system controllability. The author in [43] summarized several C I s available in the literature pointing out their limitations and remarking that such C I s have not been proposed based on the set-theoretic approach. Furthermore, it is emphasized that a C I must incorporate the system dynamical nature and its restrictions on the states and inputs. Based on these facts, [43] proposed the following index:
C I = η τ t ( Ω τ ) η R t ( Ω τ )
where η τ t ( Ω τ ) and η R t ( Ω τ ) are the reversible and reachable sets hypervolumes, respectively.
The hypervolume of an arbitrary set S t ( Ω o ) Ω o can be computed as follows:
η S t ( Ω o ) = S t ( Ω o ) 1 d x
An approximation of S t ( Ω o ) can be obtained by a disjunctive partitioning of the admissible sate-space set X . These partitions can be of an arbitrary size. Thereby, any state-space point only belongs to a single partition. However, it is suggested that X should be partitioned into c partitions B b in each label, where b is a vectorial index of dimension n that indicates the position of each X partition. In this way, c n partitions of X are created. Once X is partitioned, a membership function I Ω ( b ) is applied over the set S t ( Ω o ) . I Ω ( b ) is defined as follows:
Definition A6.
I Ω ( b ) , Ω membership function in the partition b: I Ω ( b ) is a function that is equal to 1 if there exists at least a x B b such that x Ω . Where b is a vectorial index of dimension n that indicates the position of an X partition. With b a = 1 , , b and a = 1 , , n . Otherwise, I Ω ( b ) is equal to zero, that is:
I Ω ( b ) = 1 i f   x B b : x Ω 0 o t h e r w i s e .
Figure A1 shows an example of the I Ω ( b ) evaluation for a set S t ( Ω o ) in each partition B b of the discretized S t .
Figure A1. Admissible state-space discretization and I Ω ( b ) membership function evaluation.
Figure A1. Admissible state-space discretization and I Ω ( b ) membership function evaluation.
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Then, an approximation of η S t ( Ω ) can be given by:
η S t ( Ω o ) b 1 = 1 b b n = 1 b { I S i ( Ω o ) } η B b
where
η B b = a = 1 n max ( x a ) min ( x a ) c
The C I given by Equation (A6) indicates the relative size between τ t ( Ω τ ) and R t ( Ω τ ) . This C I quantifies the fraction of state-space that is possible to reach and return to the operating point x 0 . C I can take values in the range 0 , 1 , where C I = 0 if i n t ( τ t ( Ω τ ) ) = and C I = 1 if η τ t ( Ω τ ) = η R t ( Ω τ ) , i.e., if the sizes of R t ( Ω τ ) and τ t ( Ω τ ) are equal. Is is important to remark that max ( C I ) = 1 due to the fact that τ t ( Ω τ ) R t ( Ω t ) .

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Figure 1. Three-Leg Split-Capacitor (TLSC) SAPF circuit representation.
Figure 1. Three-Leg Split-Capacitor (TLSC) SAPF circuit representation.
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Figure 2. TLSC SAPF control structure.
Figure 2. TLSC SAPF control structure.
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Figure 3. The TLSC SAPF equivalent simplified representation assuming a perfect control of i s d q 0 .
Figure 3. The TLSC SAPF equivalent simplified representation assuming a perfect control of i s d q 0 .
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Figure 4. Reachable set from x 0 at t = 50 ms and controllable set to x 0 in t = 50 ms for the TLSC SAPF.
Figure 4. Reachable set from x 0 at t = 50 ms and controllable set to x 0 in t = 50 ms for the TLSC SAPF.
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Figure 5. Closed-loop specifications for the structured H PI structured controllers: (a) R1 sensitivity function, (b) R2 maximum loop gain, and (c) R3 minimum damping and maximum natural frequency for the closed-loop poles.
Figure 5. Closed-loop specifications for the structured H PI structured controllers: (a) R1 sensitivity function, (b) R2 maximum loop gain, and (c) R3 minimum damping and maximum natural frequency for the closed-loop poles.
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Figure 6. Closed-loop specifications for the structured H DC-link PI structured controller: (a) R1 sensitivity function, (b) R2 maximum loop gain, and (c) R3 minimum damping and maximum natural frequency for the closed-loop poles.
Figure 6. Closed-loop specifications for the structured H DC-link PI structured controller: (a) R1 sensitivity function, (b) R2 maximum loop gain, and (c) R3 minimum damping and maximum natural frequency for the closed-loop poles.
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Figure 7. Closed-loop specifications’ verification for the i S d loop: (a) Pole-Placement (PP)-PI, (b) H -PI, and (c) H -uPI.
Figure 7. Closed-loop specifications’ verification for the i S d loop: (a) Pole-Placement (PP)-PI, (b) H -PI, and (c) H -uPI.
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Figure 8. Closed-loop specifications’ verification for the i S q loop: (a) PP-PI, (b) H -PI, and (c) H -uPI.
Figure 8. Closed-loop specifications’ verification for the i S q loop: (a) PP-PI, (b) H -PI, and (c) H -uPI.
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Figure 9. Closed-loop specifications’ verification for the i S 0 loop: (a) PP-PI, (b) H -PI, and (c) H -uPI.
Figure 9. Closed-loop specifications’ verification for the i S 0 loop: (a) PP-PI, (b) H -PI, and (c) H -uPI.
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Figure 10. Closed-loop specifications’ verification for the v D C loop: (a) PP-PI, (b) H -PI, and (c) H -uPI.
Figure 10. Closed-loop specifications’ verification for the v D C loop: (a) PP-PI, (b) H -PI, and (c) H -uPI.
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Figure 11. PI controllers’ dynamical performance comparison: (a) i s d , (b) i s q , (c) i s 0 , and (d) v D C .
Figure 11. PI controllers’ dynamical performance comparison: (a) i s d , (b) i s q , (c) i s 0 , and (d) v D C .
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Figure 12. PI controllers’ dynamical performance comparison: (a) i s d , (b) i s q , (c) i s 0 , and (d) v D C .
Figure 12. PI controllers’ dynamical performance comparison: (a) i s d , (b) i s q , (c) i s 0 , and (d) v D C .
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Figure 13. PI controllers dynamical performance comparison: (a) i s d , (b) i s q , (c) i s 0 , and (d) v D C .
Figure 13. PI controllers dynamical performance comparison: (a) i s d , (b) i s q , (c) i s 0 , and (d) v D C .
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Table 1. TLSC SAPF operating requirements. VSI, Voltage Source Inverter.
Table 1. TLSC SAPF operating requirements. VSI, Voltage Source Inverter.
RequirementValues
MinNominalMax
Input DC-link voltage range550 V600 V650 V
Rated grid voltage (line-to-neutral rms)119 V120 V121 V
Input power range0 W1.5 kW
output power range0 W1.5 kVA
VSI switching frequency 20 kHz
Rated grid frequency49.9 Hz50 Hz50.1 Hz
THD (voltage) [45]<5%
THD (current) [45]<5%
Load100 VA1.5 kVA
Steady-State TLSC SAPF efficiency90%95%98%
Table 2. Summary of the PI controller parameters.
Table 2. Summary of the PI controller parameters.
Control
Loop
PP H -PI H -uPI
k p k i k p k i SoftHard k p k i SoftHard
i s d u d −1.7 1.55 × 10 4 0.981 1.16 × 10 3 0.833 0.82358 1.23 2.72 × 10 3 0.833 0.97621
i s q u q −1.79 1.4 × 10 4 −4.73 4.73 × 10 7 3.91 0.69804 −8.5 8.51 × 10 7 7.04 0.69804
i s 0 u 0 −1.81 1.51 × 10 4 −1.23 2.41 × 10 3 0.833 0.88768 −1.42 4.94 × 10 3 0.833 0.98983
v D C i s R E F d 0.412 29.4 0.368 5.53 2.85 0.99984 0.234 1.73 5.8 0.99972
Table 3. Summary of the PI controller dynamical performance indices.
Table 3. Summary of the PI controller dynamical performance indices.
Performance Indices
Control
Loop
Controller
Type
IAEITAEIAU M s
i s d u d PP-PI 0.2968 0.5187 0.3630 2.20
H -PI 0.0756 0.1137 0.1755 0.66
H -uPI 0.0710 0.1071 0.1746 0.98
i s q u q PP-PI 0.0532 0.0792 0.2845 2.01
H -PI 0.0459 0.0714 0.2127 0.00
H -uPI 0.0456 0.0674 0.3786 0.00
i s 0 u 0 PP-PI 0.1095 0.1665 0.2862 1.99
H -PI 0.1051 0.1579 0.1358 0.85
H -uPI 0.1035 0.1561 0.1616 1.25
v D C i s R E F d PP-PI 2.5332 4.1969 1.8025 2.66
H -PI 2.3525 3.7953 1.8095 0.70
H -uPI 3.1735 5.1753 1.8730 0.72
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Urrea-Quintero, J.-H.; Muñoz-Galeano, N.; López-Lezama, J.M. Robust Control of Shunt Active Power Filters: A Dynamical Model-Based Approach with Verified Controllability. Energies 2020, 13, 6253. https://doi.org/10.3390/en13236253

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Urrea-Quintero J-H, Muñoz-Galeano N, López-Lezama JM. Robust Control of Shunt Active Power Filters: A Dynamical Model-Based Approach with Verified Controllability. Energies. 2020; 13(23):6253. https://doi.org/10.3390/en13236253

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Urrea-Quintero, Jorge-Humberto, Nicolás Muñoz-Galeano, and Jesús M. López-Lezama. 2020. "Robust Control of Shunt Active Power Filters: A Dynamical Model-Based Approach with Verified Controllability" Energies 13, no. 23: 6253. https://doi.org/10.3390/en13236253

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