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Article

Impedance Matching-Based Power Flow Analysis for UPQC in Three-Phase Four-Wire Systems

School of Electrical Engineering, Yanshan University, Qinhuangdao 066004, China
*
Author to whom correspondence should be addressed.
Energies 2021, 14(9), 2702; https://doi.org/10.3390/en14092702
Submission received: 19 April 2021 / Revised: 4 May 2021 / Accepted: 5 May 2021 / Published: 8 May 2021
(This article belongs to the Special Issue Power Quality in the Modeling of Machines and Electrical Devices)

Abstract

:
Different from the extant power flow analysis methods, this paper discusses the power flows for the unified power quality conditioner (UPQC) in three-phase four-wire systems from the point of view of impedance matching. To this end, combined with the designed control strategies, the establishing method of the UPQC impedance model is presented, and on this basis, the UPQC system can be equivalent to an adjustable impedance model. After that, a concept of impedance matching is introduced into this impedance model to study the operation principle for the UPQC system, i.e., how the system changes its operation states and power flow under the grid voltage variations through discussing the matching relationships among node impedances. In this way, the nodes of the series and parallel converter are matched into two sets of impedances in opposite directions, which mean that one converter operates in rectifier state to draw the energy and the other one operates in inverter state to transmit the energy. Consequently, no matter what grid voltages change, the system node impedances are dynamically matched to ensure that output equivalent impedances are always equal to load impedances, so as to realize impedance and power balances of the UPQC system. Finally, the correctness of the impedance matching-based power flow analysis is validated by the experimental results.

1. Introduction

Nowadays, the three-phase four-wire (3P4W) power supply system has been widely used in low-voltage distribution networks (LVDNs) because of its more flexible voltage supply mode [1], that is, it can provide consumers with 220 V phase voltage and 380 V line voltage. However, due to issues such as the start-up of impact load equipment, the randomness of the grid-connected output power of renewable energy, and the short-circuit failure of power systems [2], the 3P4W distribution networks mainly face the problem of grid voltage fluctuations (i.e., sag/swell), which may cause data loss or even damage to critical loads [3], such as financial industry computers, network servers, etc.
In order to protect the LVDNs and critical loads, the unified power quality conditioner (UPQC) [4] is increasingly used to improve the power quality problems in LVDNs. Usually, the UPQC, consisting of a series converter (SC) and a parallel converter (PC), can solve both voltage and current power quality problems, such as voltage variations, unbalance and harmonics as well as current power factors, unbalance and harmonics.
When the grid voltages change, to balance the active powers between grid side and load side, the UPQC system will switch the operation states of the SC and PC, that is, the SC/PC will be changed from a rectifier to an inverter or vice versa. Correspondingly, the amplitudes and directions of the power flows will be changed with the SC/PC’s operation state changes. According to the phase angle difference between system output voltage (i.e., load voltage) and grid voltage, the common analysis methods of the UPQC’s operation principle are as follows: (1) UPQC-P: the difference is 0 or π, the SC only transmits active powers in the forward or reverse direction [5,6]; (2) UPQC-Q: the difference is π/2, the SC only transmits reactive powers for loads [7,8]; (3) UPQC-VAmin: the difference range is 0–π/2, the SC transmits active and reactive powers at the same time. This method attempts to minimize the volt-ampere (VA) loading, thereby reducing the design cost of UPQC [9,10]; (4) UPQC-S: it has the same range of the angle difference as UPQC-VAmin, but the difference is that the SC operates at maximum capacity to enhance the UPQC’s utilization [11,12].
Hitherto the UPQC’s operation principle has been rarely analyzed from the perspectives of the impedance model and impedance matching in previously published UPQC studies. For this objective, the concept of impedance matching was involved in the UPQC system in this paper, and the internal power flows of the system were analyzed by discussing the matching relationships among node impedances. However, the major challenges faced by this paper are how to establish the UPQC system’s impedance model and how to use this model to analyze the power flows.
The impedance model has been widely used in system stability analysis, power sharing, power transmission and so on. In [13], the grid-connected converter is equivalent to a current source in parallel with an output impedance, and then the stability of the grid-connected converter is discussed by analyzing the impedance relationship between the converter and the gird. In [14], considering the influence of distributed capacitances of the transmission line and the transformer, the impedance model was utilized to analyze the harmonic resonance problem of the series-parallel hybrid active power filter (HAPF). In [15], the impedance model of thyristor-controlled LC-coupling HAPF is established, and the firing angles of thyristors are calculated to balance and compensate active and reactive power. In [16], the influence of line impedance between multiple distributed generations (DGs) and the point of common coupling (PCC) on the power distribution is analyzed, and then a power-sharing control method based on the virtual complex impedance is investigated to achieve accurate power-sharing between DGs. In [17], the equivalent impedance circuit of a unified power flow controller (UPFC) is established, and the active and reactive powers between the two power grids are adjusted by matching the impedance of UPFC and the transmission line.
Inspired by Refs. [13,14,15,16,17], Ref. [18] introduces the impedance matching into the UPQC and analyzes the impedance regulation process with three-phase unbalanced loads. However, the establishing method of the impedance model that plays a key role in impedance matching analysis is not given in Ref. [18]. In addition, in view of the fact that the establishing method of the UPQC impedance model is presented for the first time in this paper, the three-phase balanced loads are used as a research condition to verify the correctness of this method, and the corresponding relationships between node impedances and power flows are more clearly demonstrated.
In this paper, considering the operating characteristics of the two converters in terms of voltage- and current-source control methods, the SC can be equivalent to a controllable sinusoidal current source in parallel with its impedance, and the PC can be equivalent to a controllable sinusoidal voltage source in series with its impedance. In this way, the UPQC system is equivalent to an adjustable impedance model with five nodes (i.e., input node, SC node, node behind transformer, PC node and output node), in which the amplitude and direction of the node impedance, respectively, reflect the amplitude and direction of the power flow at the corresponding node. Once the grid voltages change, the original matching state of these node impedances will be broken, and then they will be re-adjusted to change the amplitudes and/or directions of power flows inside the system, so as to balance the active powers between input side (i.e., the grid side) and output side (i.e., the load side). As a result, no matter what grid voltages change, the system node impedances are dynamically matched to ensure that the output equivalent impedances are always equal to load impedances. Not only that, these node impedances will indicate two main characteristics as follows: (1) all node impedances are associated with load impedances; (2) except for the equivalent output impedance, four other impedances are associated with the variation degree of grid voltages. Therefore, it is helpful to intuitively observe the factors that affect the system’s power flows by means of this impedance model. In other words, the UPQC impedance model established in this paper can directly reflect the changing degrees of the grid voltage and load impedance to the system power flows.
The rest of this paper is organized as follows: Section 2, the control strategies of the UPQC system are designed and the equivalent impedance model is established. Section 3, the operation principle of the system is exhaustively analyzed from the power flow and impedance matching perspective. Section 4, theoretical calculation results of the voltages, currents, active powers and node impedances are obtained according to the impedance matching method. Finally, the correctness of the impedance matching-based power flow analysis is validated by the experimental results in Section 5.

2. Control Strategy and Impedance Model

To discuss the impedance matching, the UPQC’s impedance model is an essential prerequisite. For this purpose, the control strategy of the UPQC system is designed in this section, and on this basis, the establishment process of the system’s equivalent impedance model with five nodes is given in detail. Figure 1 shows the 3P4W UPQC’s circuit topology, and its electrical quantities are shown in Table 1. In which, the antiparallel thyristors Sabc are used to disconnect the UPQC from the grid in the case of a grid short-circuit, power outage or other failures.

2.1. Series Converter Control Strategy and Impedance Model

The SC operates as a controllable sinusoidal current source, and Figure 2 shows its control block diagram in the dq0-frame, where ωs can be obtained by a phase-locked loop (PLL) [19]. The dc-link voltage control and the active power balance (APB) principle [20] are employed to the generate grid current reference i Sd * , where the dc-link voltage control quantity i Sd 1 * is used to stabilize the dc-link voltage, also to compensate for system loss, while the APB generation quantity i Sd 2 * is responsible for generating the grid active current. The function of the dc-link unbalance control is to balance the voltages udc± across capacitors Cdc±. The function of the current control is to adjust the SC output currents iSCabc (i.e., grid currents iSabc) to be sinusoidal and balanced. Moreover, kpwm, ddq0 and USdpk represent the modulator gain, the SC’s duty ratio and the maximum value of the grid voltage, respectively.
In the dq0-frame, the grid voltages uSabc, load voltages uLabc and currents iLabc can be expressed as follows:
u Sd = u ¯ Sd + u ˜ Sd u Ld = u ¯ Ld + u ˜ Ld i Ld = i ¯ Ld + i ˜ Ld
where u ¯ Sd , u ¯ Ld and i ¯ Ld are the dc components that represent the fundamental components, whereas u ˜ Sd , u ˜ Ld and i ˜ Ld are the oscillating components that represent the harmonic components.
Since these oscillation components deteriorate the current reference generation, a second-order low-pass filter (LPF) with the cut-off frequency of 12 Hz is employed to eliminate these components [21], in order to obtain u ¯ Sd , u ¯ Ld and i ¯ Ld . According to the instantaneous power theory, ignoring the system loss, the relationship between fundamental active powers of the grid side and load side is as follows:
P ¯ Sd = u ¯ Sd i ¯ Sd = u ¯ Ld i ¯ Ld = P ¯ Ld
From Equation (2), the fundamental active current generated by the APB at the input side of the UPQC can be expressed as follows:
i Sd 2 = u ¯ Ld i ¯ Ld / u ¯ Sd
From Equation (3), since i Sd 2 * is related to fundamental components (i.e., u ¯ Sd , u ¯ Ld and i ¯ Ld ), the grid only provides active powers for loads.
The total reference i Sd * is obtained by adding i Sd 1 * and i Sd 2 * , as follows:
i Sd = i Sd 1 + i Sd 2
where i Sd ( s ) = G SCV ( s ) [ u Sd ( s ) u dc + ( s ) u dc ( s ) ] .
Since the grid currents are required to be sinusoidal and balanced waveforms, the current references of the q- and 0-axis are set to i SCq * = 0 and i SC 0 * = 0 , respectively. Moreover, the dc-link voltage loop is designed as a typical type II control system to obtain the better anti-interference performance. As a result, a type II controller GSCV (s) = kdc(1 + s/ωz)/(s(1 + s/ωp)) is employed in the dc-link voltage control loop [22], where kdc, ωz and ωp are the controller gain, pole frequency and zero frequency, respectively.
In Figure 2, the reference i Sd * needs to be multiplied by the transformer Tr turn ratio n to control the SC output currents iSCabc, and thus the grid current iSd(s) can be obtained as follows:
i Sd ( s ) = i SCd ( s ) / n = [ H SCd ( s ) i SCd ( s ) u Cnd ( s ) / Z SCs ( s ) ] / n = H SCd ( s ) i Sd ( s ) u Cd ( s ) / Z SCp ( s )
where HSCd(s) = GSCI(s)kpwm/[LSC s + RSC + GSCI(s)kpwm], ZSCs(s) = [LSC s + RSC + GSCI(s)kpwm].
HSCd(s) is the closed-loop transfer function of the current control loop, ZSCs(s) and ZSCp(s) = n2ZSCs(s) are the SC’s equivalent impedances on the primary and secondary side of Tr, respectively. GSCI(s) = kSCip + kSCii/s is a proportional-integral (PI) controller, where kSCip and kSCii are the PI controller gains. RSC is the equivalent resistance of the inductor LSC, and uCnd(s) = uCd(s)/n is the secondary voltage of Tr. The PI controller parameters for the SC can be obtained from the procedure detailed in [23].
From Equation (5), the first term H SCd ( s ) i Sd * ( s ) represents the tracking ability of iSd(s) to the reference i Sd * , and the second term uCd(s)/ZSCp(s) represents the disturbance of uCd(s) to iSd(s). Therefore, the controller GSCI(s) is required to have a larger gain to reduce the effect of uCd(s) on iSd(s). According to Equation (5), the SC’s Norton impedance model can be obtained in the d-axis, as shown in Figure 3. For analysis simplicity, the impedance model on the secondary side of Tr in Figure 3a is equivalent to the primary side in Figure 3b. As a result, the SC is equivalent to a controllable sinusoidal current source H SCd ( s ) i Sd * ( s ) in parallel with the equivalent impedance ZSCp(s). Asides from that, the impedance modeling methods of the q- and 0-axis are similar to that of the d-axis.
Based on the relationship between uCd(s) and iSd(s) in Figure 3b, the SC can be equivalent to an output impedance ZSCout(s), as shown by the dashed line, and its expression is as follows:
Z SCout ( s ) = u Cd ( s ) i Sd ( s ) = u Cd ( s ) H SCd ( s ) i Sd ( s ) u Cd ( s ) / Z SCp ( s )
From Equation (6), ZSCout(s) is related to HSCd(s), i Sd * ( s ) , uCd(s) and ZSCp(s). Since uCd(s) and i Sd * ( s ) vary with uSd(s) and PLd, ZSCout(s) will be adjusted to control the active power PSC drew or emitted by the SC.

2.2. Parallel Converter Control Strategy and Impedance Model

The PC operates as a controllable sinusoidal voltage source, which is used to control load voltages to be sinusoidal, regulated and balanced. For this purpose, the control strategy of PC is designed, as shown in Figure 4, where the voltage references in the dq0-frame are u Ld * = 311   V and u Lq * = u L 0   * = 0   V , respectively. Considering unbalanced and non-linear loads, the voltage loop controllers GPCV(s) employ the PI + quasi-resonant (QR) controllers, while the current loop controllers GPCI(s) employ the PI controllers.
From Figure 4, taking the d-axis as an example, the load voltage uLd(s) can be obtained as follows:
u Ld ( s ) = H PCd ( s ) u Ld ( s ) Z PC ( s ) i PCd ( s )
where
H PCd ( s ) = G PCVd ( s ) G PCI ( s ) k PWM C PC s ( L PC s + R PC ) + C PC G PCI ( s ) k PWM s + G PCVd ( s ) G PCI ( s ) k PWM + 1
Z PC ( s ) = L PC s + R PC + G PCI ( s ) k PWM C PC s ( L PC s + R PC ) + C PC G PCI ( s ) k PWM s + G PCVd ( s ) G PCI ( s ) k PWM + 1
HPCd(s) and ZPC(s) are the closed-loop transfer function and equivalent impedance of the PC, respectively.
To improve the voltage quality of uL, low-order harmonics need to be suppressed. Specifically, with the increase in the order of harmonics, the harmonic contents will decrease significantly, thus the 3rd, 5th, 7th, 9th, 11th and 13th harmonics will be suppressed as undesirable components. After the dq0 coordinate transformation, the 5th and 7th harmonics as well as the 11th and 13th harmonics are transformed into the 6th and 12th harmonics, respectively, which are reflected on the d- and q-axis. While, the 3rd and 9th harmonics are directly reflected on the 0-axis. Based on the above analysis, the voltage loop controllers GPCVd,q,0(s) adopt the PI + QR structure, and they can be expressed as follows:
{ G PCVd , q ( s ) = k PCvp + k PCvi s + h = 6 , 12 2 k r ω c s s 2 + 2 ω c s + ( h ω o ) 2 G PCV 0 ( s ) = k PCvp + k PCvi s + h = 3 , 9 2 k r ω c s s 2 + 2 ω c s + ( h ω o ) 2
where kPCvp and kPCvi are the gains of PI controller, and h, kr, ωo and ωc are the harmonic order, resonance coefficient, resonance frequency and cut-off frequency of the QR controller.
It can be noted that the voltage loop PI controllers kPCvp + kPCvi/s are employed to control the dc component of the load voltage generated by the transformation of the ac fundamental components to the dq0-frame, while the current loop PI controllers GPCI(s) = kPCip + kPCii/s are employed to control the currents i2dq0. Furthermore, the current and voltage loops are designed as the typical type I and type II control systems, respectively, to achieve the fast dynamic response and good anti-interference performance, and the parameter designs of PI and QR controllers for the PC can be found in [23,24], respectively.
The PC’s Thevenin impedance model can be obtained from Equation (7), as shown in Figure 5, that is, the PC is equivalent to a controllable sinusoidal voltage source and an impedance in series. Based on the relationship between load voltage uLd(s) and the PC’s output current iPCd(s), the PC can be equivalent to an output impedance ZPCout(s), as shown by the dashed line, and its expression is as follows:
Z PCout ( s ) = u Ld ( s ) i PCd ( s ) = H PCd ( s ) u Ld ( s ) i PCd ( s ) Z PC ( s )
From Equation (9), ZPCout(s) is not only related to HPCd(s) and ZPC(s), but also related to iPCd(s) that is equal to the difference between iLd(s) and iSd(s). When uSd(s) fluctuates, to balance the active powers between grid side and load side, iSd(s) will vary with uSd(s), thus iPCd(s) is determined by uSd(s). As a result, the changes of uSd(s) will lead to the changes of ZPCout(s), so as to control the active power PPC(s) drew or emitted by the PC.

2.3. Equivalent Impedance Model for UPQC

The UPQC equivalent impedance model can be obtained from Equations (5) and (7), as shown in Figure 6a. To simplify the analysis, a simplified impedance model can be obtained from Equations (6) and (9), as shown in Figure 6b, where ZS(s) and Zout(s) are the input and output equivalent impedances, and can be expressed as follows:
Z S ( s ) = u S ( s ) / i S ( s )
Z out ( s ) = [ Z S ( s ) + Z SCout ( s ) ] / / Z PCout ( s )
After the impedance model is established, the matching relationships among node impedances will be studied to analyze the operation principle of UPQC power flow, and the system control parameters are shown in Table 2.

3. Power Flow and Impedance Matching

The concept of impedance matching is involved in the UPQC’s impedance model to discuss the operation principle of power flows in this section. To simplify the analysis for the power flow and impedance matching, supposing that: (a) uSabc are pure sinusoidal, and their root-mean-square (RMS) values USabc are equal to US; (b) the dc-link voltage is stable and the UPQC’s loss is zero.
The RMS values of load voltages ULabc are equal to UL under the control of PC, and the variation degree of grid voltage ku can be defined as follows:
k u = ( U S U L ) / U L
From Equation (12), this value of ku is determined by US. On the basis of the variation degree ku, the theoretical analysis process can be carried out from the following three cases: (1) Case A: US = UL, ku = 0; (2) Case B: US > UL, ku > 0; (3) Case C: US < UL, ku < 0.

3.1. Impedance Matching-Based Power Flow Analysis in Case A

In Case A (i.e., US = UL, ku = 0), the grid provides all the active power for the load through path 1 (defined as: from the grid to the load through the transformer), and Figure 7 shows the operation principle of the UPQC in Case A.

3.1.1. Power Flow

In Figure 7a, ZL is a resistive-inductive (R-L) load impedance consisting of ZLp and ZLq, and thus the load current iL consists of the active and reactive currents iLp and iLq. Thus, the active and reactive powers of load impedance PL and QL can be expressed as follows:
{ P L = U L I L cos φ L = U L I Lp Q L = U L I L sin φ L = U L I Lq
where the subscripts p and q represent the active and reactive components, respectively, φL is the load power factor angle.
In Case A, the electrical quantities of UPQC system meet the following relationships:
{ I S = I Lp , I PCp = 0 , I PCq = I Lq , U C = 0 P S = P L , Q PC = Q L , P SC = P PC = 0 , Q SC = 0
From Equation (14), both UC and IPCp are zero, thus PSC = PPC = 0, meaning that there is no active power transmission between SC and PC. Additionally, the grid and the PC provide all active and reactive power for the load, respectively.

3.1.2. Impedance Matching

In Figure 7b, the input equivalent impedance ZS can be calculated as follows:
Z S = U S / I S = U L / I Lp = Z Lp
From Equation (15), due to ZS = ZLp, the input active power PS is equal to the load active power PL.
Not only that, due to UC = 0 and IPCp = 0, the SC’s output impedance ZSCout is equal to zero, while the PC’s output resistive impedance ZPCp is infinite. This means that the SC and PC do not get involved in the resistive impedance matching.
Since the PC compensates the all reactive power for the load, the PC’s inductive impedance ZPCq can be expressed as follows:
Z PCq = U L / I PCq = U L / I Lq = Z Lq
The output equivalent impedance Zout can be expressed as follows:
Z out = Z S / / Z PCq = Z Lp / / Z Lq = Z L
From the above analysis, in Case A, only the PC is involved in the inductive impedance matching. Furthermore, ZS, ZPCq and Zout contain the factor ZL (ZLp or ZLq), which indicates that these node impedances are adjusted only depending on the load.

3.2. Impedance Matching-Based Power Flow Analysis in Case B

In Case B (i.e., US > UL, ku > 0), in addition to path 1, the grid provides the active power for the load through path 2 (defined as: from the SC to the PC or from the PC to the SC). To this end, the node impedances will be matched again, owing to US > UL, aiming to balance the power flows. To analyze the operation principle more clearly, an M point is marked behind the transformer, and the operation principle is shown in Figure 8.

3.2.1. Power Flow

As US increases (i.e., US = (1 + ku)UL), IS will be reduced to ensure PS = PL, according to Equations (3) and (12), IS can be expressed as follows:
I S = I Lp / ( 1 + k u )
From Equation (18), IS is reduced by (1 + ku) times.
The increase in US results in a voltage difference between grid side and load side, which is added the transformer Tr. Thus, the voltage UC across Tr can be expressed as follows:
U C = U L U S = k u U L
Combining Equations (18) and (19), the SC’s active power PSC can be obtained as follows:
P SC = U C I S = k u P L / ( 1 + k u )
From Equation (20), PSC is negative due to UC, which indicates that the SC draws the active power from the grid.
After the transformer compensation (i.e., M point), the voltage of path 1 is UL, while the IS remains the same, so the active power of path 1 can be expressed as follows:
P M = U L I S = P L / ( 1 + k u )
It can be seen from Equation (21) that PM is less than PL, meaning that path 1 cannot meet the power requirements of the load. For this reason, the PC provides the load with the active power drew by the SC, as can be seen in path 2.
The PC compensates both the active and reactive powers and its output current IPC can be expressed as follows:
I PC = I PCp + I PCq = ( I Lp I S ) + I PCq = k u 1 + k u I Lp + I Lq
Combining UL and IPCp, the PC’s output active power PPC can be obtained as follows:
P PC = U L I PCp = k u P L / ( 1 + k u )
It can be seen from Equation (23) that PPC is positive, which indicates that the PC emits the active power.
The energy ∆P transferred between SC and PC is as follows:
Δ P = | P SC | = P PC
In terms of reactive power, the phase angle difference between voltage UC across the transformer and grid current IS is π, which results in the reactive power QSC of SC as zero. While the PC provides all the reactive current and power for the load, so the reactive power QPC output by the PC is equal to QL.

3.2.2. Impedance Matching

Compared with Case A, node impedances ZS, ZSCout and ZPCout are matched to make Zout equal to ZL in Case B.
According to Equations (10) and (18), ZS can be calculated as follows:
Z S = U S / I S = ( 1 + k u ) 2 Z Lp
From Equation (25), ZS is (1 + ku)2 times ZLp due to US > UL.
The SC’s output impedance ZSCout can be calculated as follows:
Z SCout = U C / I S = k u ( 1 + k u ) Z Lp
From Equation (26), the direction of ZSCout is determined by UC, resulting in ZSCout being negative, which indicates that the SC operates in a rectified state to draw the active power.
The impedance ZM at M-point can be calculated as follows:
Z M = Z S + Z SCout = U L / I S = ( 1 + k u ) Z Lp
From Equation (27), due to ZMZLP, the active powers of UPQC system cannot be balanced if the impedance matching behavior is performed by the SC alone. For this reason, the PC is required to participate in the impedance matching, and the PC’s output impedance ZPCout can be calculated as follows:
Z PCout = U L I PC = Z PCp / / Z PCq = ( 1 + k u k u Z Lp ) / / Z Lq
From Equation (28), the direction of the resistive impedance ZPCp is determined by IPCp, resulting in ZPCp being positive, which indicates that the PC operates in an inverter state to provide the load with the active power drawn by the SC. Moreover, the inductive load impedance ZLq is only compensated by the PC (i.e., ZPCq = ZLq).
Comparing Equations (20) and (23) with Equations (26) and (28), it can be found that the active power transmitted by two converters is the same, but their output impedances are different, and the difference between ZSCout and ZPCout is k u 2 times. This indicates that the range of impedance regulated by the PC is wider than that regulated by the SC under the condition of the same transmission power.
According to Equations (25), (26) and (28), Zout can be expressed as follows:
Z out = Z M / / Z PCout = Z L
From Equation (29), after the node impedances are dynamically matched, Zout is equal to ZL, which achieves the impedance balance of the UPQC.
In Case B, all node impedances have two factors ku and ZLp, which means that these impedances are adjusted depending on the grid voltage and the load, and thus achieving Zout= ZL. In consequence, when the node impedances reach an equilibrium state again, the power flows of the system will be accompanied by stability and balance.

3.3. Impedance Matching-Based Power Flow Analysis in Case C

Figure 9 shows the operation principle in Case C (i.e., US < UL, ku < 0), the analysis process in Case C is like that in Case B, and will not be repeated here. The difference is that path 1 will generate the excess active power due to the increase in grid current. To balance the system energy, the SC and PC output a positive and negative impedance, respectively, which causes the PC to draw this excess energy and the SC to return it to path 1 via path 2.
It should be noted that due to the definition of ku in Equation (14), the expressions of voltage (UC), currents (IS, IPC), active powers (PSC, PM, PPC, ∆P), reactive powers (QSC, QPC) and node impedances (ZS, ZSCout, ZM, ZPCout, Zout) in Case C are the same as those in Case B. However, due to ku < 0 in Case C, the directions of UC, IPCp, PSC, PPC, ∆P, ZSCout and ZPCp are opposite to that in Case B.

4. Case Analysis

To investigate the correctness and adaptability of the above theoretical analysis, this section will quantitatively conduct some case analysis on the matching relationships between active power flows and node impedances.
The case analysis conditions are as follows:
(1) The 9.8 kW × 3 three-phase balanced resistive loads are taken as an example to analyze the power flow and impedance matching.
(2) For purposes of analysis, it is supposed that the UPQC is lossless and the dc-link voltage is controlled to be stable.
(3) Referring to IEC 60038-2009, the variation ranges of US are not more than ±10%. To prove the operation ability of the UPQC to grid voltage fluctuations, the fluctuation range is set to ±15% in this paper. The upper and lower limits of US are taken as the analysis conditions, the three cases in the previous section are redefined as follows:
Case A: US = 220 V, ku = 0;
Case B: US = 253 V, ku = +15%;
Case C: US = 187 V, ku = −15%.
According to Section 3, Figure 10 shows the quantitative matching relationships among the active powers, node impedances and grid voltages in the three redefined cases. From Figure 10a,b, PSabc are always equal to PLabc, while ZSabc and ZLabc are only equal at 220 V. Furthermore, PMabc and PSCabc keep decreasing, while PPCabc keep increasing, where PSCabc and PPCabc always remain the same amplitude and the opposite direction, indicating that one converter operates in rectifier state and the other one operates in inverter state. ZSabc and ZMabc always keep increasing, while Zoutabc and ZLabc remain unchanged and always equal. Additionally, ZSCoutabc continuously decreases, and they are zero only at USabc = 220 V, which is in line with the series characteristics of the SC.
From Figure 10c, ZPCoutabc are divided into two parts. The closer the two parts are to 220 V, the greater ZPCoutabc, and their impedances are infinite at USabc = 220 V, which is in line with the parallel characteristics of the PC.
For comparison with the experimental results in the next section, the theoretical calculation results of voltages, currents, active powers and node impedances in Case A–C are shown in Table 3.
From Table 3, the difference ΔP between PMabc and PLabc is compensated by the two converters, i.e., |ΔP|=|PMabcPLabc|=|PSCabc|=|PPCabc|. Aside from that, the fluctuation rates of USabc are +15% and −15% in Case B and C, respectively, whereas the variation rates of ISabc, PSCabc and PPCabc are 13.04% and 17.65% from Equations (18), (20) and (23).

5. Experimental Validation

In order to verify the correctness of power flow analysis based on impedance matching, the UPQC hardware prototype system has been developed to perform the relevant experiments, as shown in Figure 11. The developed control algorithms have been embedded into two DSPs (TMS320F28335), and parameters used for the experimentation are shown in Table 1 and Table 2.
It is important to note that the UPQC draws loss currents from the grid to compensate for its system losses during the implementation of experiments. Hence, the influence of loss currents needs to be addressed for the evaluation of node impedances. These losses are consumed in three-phase transformers, a 240 W auxiliary power supply, four 24 W air fans and other losses. Figure 12 shows loss currents iSabc drawn by the UPQC from the grid with Case A and no-load, in which their RMS values are 2.09 A, 2.18 A and 1.97 A, respectively.
Figure 13 shows the experimental results of the power flow and impedance matching in Case A. The grid voltages uSabc (221 V, 221 V, 221 V) and the load voltages uLabc (221 V, 221 V, 220 V) are in phase and equal to each other, indicating that the voltages uCabc across Trabc do not contain the differences between uSabc and uLabc, as shown in Figure 13a,d. The grid currents iSabc (46.6 A, 46.8 A, 46.7 A) are in phase with uSabc, thus gaining unity power factor at the grid side. As iSabc contain loss currents, they are larger than the load currents iLabc (44.4 A, 44.5 A, 44.7 A), as shown in Figure 13b,e. In fact, because of the presence of Ls and transformer leakage inductance, the smaller compensation voltages (6.22 V, 5.96 V, 6.15 V) are added to Trabc in Figure 13c. The PC draws the loss currents (3.21 A, 3.29 A, 3.23 A) to maintain the stability of the dc-link voltage in Figure 13f.
Figure 14 shows the experimental results of the power flow and impedance matching in Case B. uSabc swell 15% (253 V, 254 V, 252 V) in Figure 14a, but uLabc are not affected by uSabc under the PC’s control, as shown in Figure 14d. To balance the active power between grid side and load side, iSabc (40.4 A, 40.8 A, 40.2 A) are reduced accordingly, even below iLabc, as shown in Figure 14b,e. From Figure 14a,b, iSabc and uSabc are still in phase. Unlike Case A, uCabc withstand the reverse voltages (i.e., the voltage differences between uSabc and uLabc) to compensate for the swell part of uSabc in Figure 14c. As a result, the directions of uCabc are opposite to that of iSabc, which indicates that the SC operates in a rectifier state to draw the active powers from the grid. In Figure 14f, the PC’s output currents iPCabc are in phase with uLabc, indicating that the PC operates in an inverter state to transmit the active powers to the loads.
Figure 15 shows the experimental results of Case C, and its analysis process is similar to that of Case B, thus will not be repeated.
Based on the experimental results from Figure 13, Figure 14 and Figure 15, the actual values of the voltages, currents, active powers, and node impedances are listed in Table 4. As mentioned earlier, the influences of the loss currents in Figure 12 on iSabc and iPCabc should be considered for experimental results in Table 4. To be more specific, taking Case B as an example to calculate the loss currents and grid currents is as follows: in terms of loss currents, A-phase is 1.82 A (221 × 2.09/253), B-phase is 1.91 A (221 × 2.18/252), and C-phase is 1.71 A (220 × 1.97/254). In terms of grid currents, combined with the calculated loss currents, the actual RMS values of iSabc are 38.58 A, 38.89 A and 38.49 A, respectively. From Table 4, experimental results are relatively close to the theoretical calculation results in Table 3, which endorse the correctness of power flow analysis based on the impedance matching method.

6. Conclusions

In this paper, the impedance matching method is introduced to discuss the operation principle for the UPQC in three-phase four-wire systems. On the basis of the designed control strategies, the UPQC is equivalent to an adjustable impedance model with five nodes, and then the corresponding relationships between power flows and node impedances changing with grid voltages are analyzed from this model. When grid voltages change, the original matching state of node impedances is broken, and then all node impedances are dynamically matched to achieve the impedance and power balances of the UPQC. Experimental results from the hardware prototype system have validated the correctness of power flow analysis based on the impedance matching method, and some conclusions can be drawn as follows:
(1)
In Case A, the input equivalent impedances are equal to the load impedances, while the SC’s output impedances are almost zero, and the PC’s output resistive impedances are large, so both converters do not participate in the power transmission.
(2)
In Case B, both the input equivalent impedances and the impedances at M-point are increased; moreover the SC outputs the negative impedances and draws the active powers, while the PC outputs the positive impedances and emits the active powers.
(3)
The impedance matching relationships in Case C are opposite to that in Case B.
(4)
No matter what grid voltages change, system node impedances are dynamically matched to ensure that the output equivalent impedances are always equal to the load impedances.

Author Contributions

Conceptualization, X.Z. and X.C.; methodology, X.Z. and X.G.; software, A.W. and X.C.; validation, X.Z., X.C. and X.G.; formal analysis, A.W. and X.W.; investigation, X.C. and X.W.; resources, X.Z. and C.Z.; data curation, A.W. and X.C.; writing—original draft preparation, X.Z.; writing—review and editing, X.Z., A.W. and X.G.; visualization, X.Z.; supervision, X.G. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported in part by the National Natural Science Foundation of China under Grant 62003297 and 52077191, and in part by the Natural Science Foundation of Hebei Province of China under Grant E2020203192 and E2018203152.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Three-phase four-wire UPQC configuration.
Figure 1. Three-phase four-wire UPQC configuration.
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Figure 2. Control block diagram of SC.
Figure 2. Control block diagram of SC.
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Figure 3. Norton impedance model of SC: (a) impedance model at the secondary side; (b) impedance model at the primary side.
Figure 3. Norton impedance model of SC: (a) impedance model at the secondary side; (b) impedance model at the primary side.
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Figure 4. Control block diagram of PC.
Figure 4. Control block diagram of PC.
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Figure 5. Impedance model of PC.
Figure 5. Impedance model of PC.
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Figure 6. UPQC impedance model: (a) equivalent model; (b) simplified model.
Figure 6. UPQC impedance model: (a) equivalent model; (b) simplified model.
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Figure 7. Operation principle in Case A: (a) power flows principle; (b) impedance matching principle.
Figure 7. Operation principle in Case A: (a) power flows principle; (b) impedance matching principle.
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Figure 8. Operation principle in Case B: (a) power flows principle; (b) impedance matching principle.
Figure 8. Operation principle in Case B: (a) power flows principle; (b) impedance matching principle.
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Figure 9. Operation principle in Case C: (a) power flows principle; (b) impedance matching principle.
Figure 9. Operation principle in Case C: (a) power flows principle; (b) impedance matching principle.
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Figure 10. Power flows and node impedances in Case A–C: (a) PSabc, PSCabc, PMabc, PPCabc and PLabc; (b) ZSabc, ZSCoutabc, ZMabc and ZLabc; (c) ZPCoutabc.
Figure 10. Power flows and node impedances in Case A–C: (a) PSabc, PSCabc, PMabc, PPCabc and PLabc; (b) ZSabc, ZSCoutabc, ZMabc and ZLabc; (c) ZPCoutabc.
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Figure 11. UPQC laboratory prototype.
Figure 11. UPQC laboratory prototype.
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Figure 12. Loss currents iSabc with Case A and no-load (10 A/div).
Figure 12. Loss currents iSabc with Case A and no-load (10 A/div).
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Figure 13. Experimental results of the power flow and impedance matching in Case A (time: 4 ms/div): (a) uSabc (200 V/div); (b) iSabc (50 A/div); (c) uCabc (20 V/div, 100 V/div); (d) uLabc (200 V/div); (e) iLabc (50 A/div); (f) iPCabc (10 A/div).
Figure 13. Experimental results of the power flow and impedance matching in Case A (time: 4 ms/div): (a) uSabc (200 V/div); (b) iSabc (50 A/div); (c) uCabc (20 V/div, 100 V/div); (d) uLabc (200 V/div); (e) iLabc (50 A/div); (f) iPCabc (10 A/div).
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Figure 14. Experimental results of the power flow and impedance matching in Case B (time: 4 ms/div): (a) uSabc (200 V/div); (b) iSabc (50 A/div); (c) uCabc (50 V/div, 100 V/div); (d) uLabc (200 V/div); (e) iLabc (50 A/div); (f) iPCabc (10 A/div, 100 V/div).
Figure 14. Experimental results of the power flow and impedance matching in Case B (time: 4 ms/div): (a) uSabc (200 V/div); (b) iSabc (50 A/div); (c) uCabc (50 V/div, 100 V/div); (d) uLabc (200 V/div); (e) iLabc (50 A/div); (f) iPCabc (10 A/div, 100 V/div).
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Figure 15. Experimental results of the power flow and impedance matching in Case C (time: 4 ms/div): (a) uSabc (200 V/div); (b) iSabc (50 A/div); (c) uCabc (50 V/div, 100 V/div); (d) uLabc (200 V/div); (e) iLabc (50 A/div); (f) iPCabc (20 A/div, 100 V/div).
Figure 15. Experimental results of the power flow and impedance matching in Case C (time: 4 ms/div): (a) uSabc (200 V/div); (b) iSabc (50 A/div); (c) uCabc (50 V/div, 100 V/div); (d) uLabc (200 V/div); (e) iLabc (50 A/div); (f) iPCabc (20 A/div, 100 V/div).
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Table 1. Electrical quantities and specifications.
Table 1. Electrical quantities and specifications.
QuantitySpecificationQuantitySpecification
ThyristorsSabcPC IGBT switchesS7~S12
Grid voltagesuSabcPC leg voltagesu2abc
Grid currentsiSabcCurrents of LPCi2abc
SC IGBT switchesS1~S6PC output currentsiPCabc
SC leg voltagesu1abcLoad voltagesuLabc
SC output currentsiSCabcLoad currentsiLabc
Series transformersTrabcNeutral lineN
Primary voltages of TrabcuCabcLoad impedancesZLabc
Secondary voltages of TrabcuCnabcGrid side filter inductancesLs = 6 μH
Grid side filter capacitorsCs= 40 μFSC side filter inductancesLSC= 7 mH
Voltage ratio of Trabcn = 1:5PC side filter inductancesLPC= 0.3 mH
Switching frequency of SC and PCfsw = 15 kHzPC side filter capacitorsCPC= 40 μF
Positive and negative dc-link capacitorsCdc±= 8800 μFPositive and negative dc-link voltagesudc± = ±400 V
Grid frequencyωs= 2π50 rad/s
Table 2. UPQC control parameters.
Table 2. UPQC control parameters.
SCCurrent controller GSCI(s)kSCip = 6.43  kSCii = 8.19×103
Voltage controller GSCV(s)kdc = 265  ωz = 8.42 rad/s  ωp = 117 rad/s
PCCurrent controller GPCI(s)kPCip = 0.96  kPCii = 319
Voltage controller GPCV(s)kPCvp = 0.16  kPCvi = 77.51
kr = 50  ωc = 5 rad/s  ωo = 100 rad/s
Table 3. Theoretical calculation results of voltages (RMS), currents (RMS), active powers and node impedances.
Table 3. Theoretical calculation results of voltages (RMS), currents (RMS), active powers and node impedances.
QuantityCase ACase BCase CQuantityCase ACase BCase C
USabc/V220253187PPCabc/kW01.28−1.73
ULabc/V220220220PLabc/kW9.89.89.8
UCabc/V0−3333ZSabc4.946.533.57
ILabc/V44.5444.5444.54ZSCoutabc0−0.850.63
ISabc/V44.5438.7352.41ZMabc4.945.684.20
IPCabc/V05.81−7.86ZPCoutabc37.86−27.99
PSabc/kW9.89.89.8Zoutabc4.944.944.94
PSCabc/kW0−1.281.73ZLabc4.944.944.94
PMabc/kW9.88.5211.53
Table 4. Experimental results of voltages (RMS), currents (RMS), active powers and node impedances.
Table 4. Experimental results of voltages (RMS), currents (RMS), active powers and node impedances.
QuantityCase ACase BCase CQuantityCase ACase BCase C
USa/V221253188PMc/kW9.848.4711.65
USb/V221252187PPCa/kW0.251.27−1.71
USc/V221254186PPCb/kW0.251.32−1.77
ISa/A44.5138.5852.84PPCc/kW0.281.25−1.78
ISb/A44.6238.8952.92PLa/kW9.819.819.81
ISc/A44.7338.4952.97PLb/kW9.839.839.83
UCa/V6.22−32.434.1PLc/kW9.839.839.83
UCb/V5.96−31.934.4ZSa4.976.563.56
UCc/V6.15−32.234.3ZSb4.956.483.53
IPCa/A1.125.73−7.74ZSc4.946.603.51
IPCb/A1.115.98−8.02ZSCouta0.14−0.840.65
IPCc/A1.265.68−8.07ZSCoutb0.13−0.820.65
ULa/V221221221ZSCoutc0.14−0.830.64
ULb/V221221221ZMa4.975.734.18
ULc/V220220220ZMb4.955.684.18
ILa/A44.444.444.4ZMc4.925.714.15
ILb/A44.544.544.5ZPCouta416.9838.57−28.55
ILc/A44.744.744.7ZPCoutb394.6436.97−27.56
PSa/kW9.849.769.93ZPCoutc338.4638.73−27.26
PSb/kW9.869.809.89Zouta4.984.984.94
PSc/kW9.899.789.85Zoutb4.954.914.93
PSCa/kW0.28−1.251.80Zoutc4.935.024.89
PSCb/kW0.27−1.241.82ZLa4.984.984.98
PSCc/kW0.28−1.241.82ZLb4.974.974.97
PMa/kW9.848.5311.68ZLc4.924.924.92
PMb/kW9.868.5911.70
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Zhao, X.; Chai, X.; Guo, X.; Waseem, A.; Wang, X.; Zhang, C. Impedance Matching-Based Power Flow Analysis for UPQC in Three-Phase Four-Wire Systems. Energies 2021, 14, 2702. https://doi.org/10.3390/en14092702

AMA Style

Zhao X, Chai X, Guo X, Waseem A, Wang X, Zhang C. Impedance Matching-Based Power Flow Analysis for UPQC in Three-Phase Four-Wire Systems. Energies. 2021; 14(9):2702. https://doi.org/10.3390/en14092702

Chicago/Turabian Style

Zhao, Xiaojun, Xiuhui Chai, Xiaoqiang Guo, Ahmad Waseem, Xiaohuan Wang, and Chunjiang Zhang. 2021. "Impedance Matching-Based Power Flow Analysis for UPQC in Three-Phase Four-Wire Systems" Energies 14, no. 9: 2702. https://doi.org/10.3390/en14092702

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