1. Introduction
High voltage direct current (HVDC) transmission has received substantial attention and has gone through notable developments in the last few decades, particularly due to its suitability for renewable energy integration. Line-commutated converters (LCCs) used to be the predominant technology in HVDC systems, but voltage-sourced converters (VSCs) have recently gained popularity due to their smaller footprint, as well as decoupled active and reactive power control, voltage support provision, and black-start capabilities [
1]. The modular multilevel converter (MMC) is the most recent addition to the VSC family [
2]. MMCs are now being widely implemented in both medium and high voltage transmission systems since they address many of the limitations encountered in conventional VSCs, such as scalability to higher voltages by the addition of more levels, provision of smooth output voltage waveforms at a lower switching frequency, and elimination of low-order harmonics which typically require large filters [
3,
4].
Designing appropriate protection for HVDC systems is more challenging when compared to HVAC systems due to the lack of zero-crossing in the DC current and limitations in overload capability of semiconductor devices used in the converters. The latter is particularly true in the case of VSC-based HVDC systems where IGBTs replace thyristors that are prevalent in LCCs. Like the conventional VSC, MMCs are vulnerable to DC side faults. DC faults in the HVDC transmission system can be categorized into pole-to-ground and pole-to-pole faults [
5,
6]. During pole-to-ground faults, the voltage of the un-faulted pole would rise to twice the rated value [
7]. For unearthed or high impedance grounding systems on the DC side, pole-to-ground faults will not lead to overcurrent but will cause significant voltage stresses. Pole-to-pole faults on the other hand will give rise to very high DC side fault currents, especially in low impedance grounding systems.
MMCs consist of stacks of cells or submodules (SMs). The simplest and most economical SM topology is half-bridge SM (HBSM). Due to the presence of freewheeling diodes in HBSMs, they are unable to prevent AC side contribution to DC faults. DC circuit breakers (DCCBs) may be used to clear DC faults when HBSMs are used [
8]. DCCBs can be classified into three main types: mechanical, solid-state, and hybrid. Mechanical DCCBs [
9,
10] are typically slow in clearing DC faults and this may lead to damage to the semiconductor devices. Solid-state CBs [
11,
12,
13] have a much faster response to faults, but they are significantly more expensive and have high on-state losses. Hybrid DCCBs are a combination of semiconductor devices and mechanical switches, featuring lower conduction losses. However, they are expensive and have a large footprint [
14]. The use of alternating current CBs (ACCBs) on the AC side is another option to clear DC faults. However, ACCBs take a few cycles to trip and are not adequately fast for HVDC systems protection [
15].
Recent research has focused on taking advantage of the inherent fault blocking capability of SMs with modified designs. Such modifications can provide a reverse voltage in the path of fault current, thus driving the current down to zero. Furthermore, certain fault blocking SMs may also be utilized as wave-shaping circuits to control the AC currents and provide reactive power support to the grid. The full-bridge submodule (FBSM) was developed by adding two switches to the HBSM structure to provide DC fault blocking capability. However, it has nearly double the conduction losses and device count when compared to HBSM. Several SM configurations have been developed over the years that provide DC fault blocking capability with lower losses and device count than those of FBSM, giving rise to a class of DC fault blocking converters. Therefore, there is a crucial need for a comparative evaluation of various proposed SM configurations, rather than comparing them only against FBSM, to identify the suitable configuration for any given application. Moreover, one of the most challenging tasks in an MMC is the energy balancing of the floating capacitors in the SMs. For proper operation, MMC control needs to regulate the total energy stored in the SM capacitors. This can be done either by controlling the voltages of the capacitors in the SMs [
16] or by taking an energy-based approach where the total energy of the SMs in the converter arms and legs are regulated. The energy-based approach, first introduced in [
17], has gained popularity in recent years since it achieves balancing by manipulating circulating currents without affecting output currents [
18].
Several reviews, with MMCs as the focus, have been published in recent years. In [
4], the development and future trends of MMC topologies were presented along with the technical challenges associated with notable MMC control methods. However, the DC fault tolerance of certain MMC SMs was not discussed in detail. Similarly, MMC modulation and control strategies were reviewed in [
16]. Two modified SM configurations were proposed as well, but details of fault ride-through mechanisms were not discussed. The authors in [
19] provided a general overview of the MMC with regards to modeling, control, notable topologies, and applications. DC side fault mitigation by utilizing fault blocking SMs was mentioned but not elaborated on. In [
20], notable approaches related to fault diagnosis, fault tolerance techniques, and MMC control during fault conditions were reviewed. Once again, an extensive analysis of DC fault blocking SMs and DC fault-ride through techniques were not provided. In [
21], SM configurations were discussed in terms of component requirements, conduction losses, and fault blocking ability. However, only a few SM configurations were discussed, and hybrid configurations were left out altogether. In [
22], a more comprehensive review of fault blocking SMs as well as fault ride-through by utilization of the STATCOM mode of operation were provided. Even though the mechanism of fault ride through mode for different topologies was discussed, the energy balancing strategies utilized during STATCOM operation were not addressed. Similarly, the focus of [
23] was on the STATCOM operation of fault blocking configurations. However, only a small number of SM configurations were discussed, and the energy balancing issue was left untouched.
This paper attempts to provide a comprehensive, critical, and comparative review of notable DC fault blocking SM and MMC configurations and fill in the gaps in the existing review papers on the topic. The comparisons of SM topologies include component requirements, conduction losses, and DC fault blocking capability, while investigations of MMC configurations focus on the ability to ride through DC faults and operate as STATCOM, with attention to arm and leg energy balancing strategies employed during DC faults. Dynamic analysis of DC faults falls outside the scope of this paper.
Section 2 of this paper describes the operation of HBSM- and FBSM-based MMCs during normal operation and under fault conditions; it also explains how overmodulation in MMC requires the use of bipolar SMs.
Section 3 reviews noteworthy fault blocking SMs and compares them based on features, such as the number of switches in the conduction path, device count, overmodulation capability, and fault blocking symmetry. Comparisons with regard to the voltage ratings of IGBT switches and voltage sensor requirements are also made where appropriate.
Section 4 presents a discussion of the findings in
Section 3. A review of hybrid MMCs in terms of structure, device count, and DC fault handling ability is provided in
Section 5, followed by the corresponding discussions in
Section 6.
Section 7 provides a discussion on the MMC fault ride-through mode of operation in certain topologies as well as the control strategies required for STATCOM operation and energy-based arm/leg voltage balancing. Finally,
Section 8 draws some conclusions.
2. MMC Structure and Operation
The generic structure of a three-phase double star MMC is shown in
Figure 1a. Single star/delta MMCs are typically used in STATCOM applications while the double star configuration is prevalent in HVDC transmission systems [
24,
25]. Each arm of the converter is comprised of
series-connected SMs along with an inductor. The purpose of the arm inductor is two-fold: filtering high-frequency components in the circulating current and limiting the fault current. The SMs are made up of semiconductor devices and capacitors and are capable of producing two or more voltage levels. Each MMC arm is capable of generating the full DC link voltage,
. The number of inserted SMs in the upper and lower arms is varied to generate a multilevel waveform at the AC terminals. The phase
terminal voltage,
(
x ∈
a,
b,
c) in
Figure 1a, may be expressed in either one of the following ways:
where
and
denote the total upper and lower arm SM voltages, and
and
are the upper and lower arm currents in each phase. The modulation index,
, is defined as the ratio of the peak value of the AC side phase-to-neutral voltage to half of the DC link pole-to-pole voltage,
According to (3), operating in the overmodulation region (
> 1) is possible if the SMs can generate both negative and positive voltages. Operation in the overmodulation region is beneficial in cases of DC link voltage reduction, as explained in [
26]. If a certain portion of SMs in the arm is allowed to generate the negative voltage state following a DC side voltage drop, the peak voltage obtained on the AC side can be kept nearly constant, leading to
becoming greater than 1. This would ensure continued converter operation even in cases of a significant reduction in DC side voltage. Furthermore, in [
27,
28], it has been shown that the normal operation of FBSM-MMC and mixed FBSM/HBSM-MMC systems in the overmodulation region reduces the energy storage requirement of the SM capacitors. This facilitates the reduction of converter size and cost.
The arm currents (
and
) in each phase of the MMC, shown in
Figure 1a, can be expressed as a combination of the AC output current
and a common-mode current
,
where the common-mode current represents a combination of the DC bus current (
) and AC circulating current components. The DC part of the common-mode current is responsible for active power flow through the converter while the AC part, which is a negative sequence current, causes power loss in the converter and needs to be suppressed [
29]. Traditional vector control methods [
30,
31,
32] are commonly implemented in MMC-HVDC systems. Various modulation methods, such as the nearest level modulation [
33,
34] and high-frequency carrier-based sinusoidal pulse width modulation techniques [
35,
36,
37,
38], can be employed for the generation of the AC side waveforms. Since MMC SMs contain capacitors, voltage balancing [
39,
40,
41] and sorting algorithms are also implemented to keep the capacitor voltages close to their nominal values.
The HBSM structure is depicted in
Figure 1b. It is capable of generating two voltage levels during normal operation as shown in
Table 1. The absence of a negative voltage state means that the modulation index is limited to a maximum value of 1 or 1.15 with selective harmonic elimination. During the blocking state, the SM capacitor is inserted in the current path for only one direction of current as illustrated in
Figure 2. On the other hand, the FBSM, shown in
Figure 1c, can generate three voltage levels: 0,
, and
, during normal operation, as shown in
Table 2. The presence of the two additional IGBTs along with their antiparallel diodes ensures that regardless of the arm current direction, the capacitor in each SM is inserted with the opposite polarity into the fault current path when a DC side fault occurs and all IGBTs in the SMs are blocked (
Figure 3). Hence, the FBSM is a bipolar SM that can generate negative voltage states [
42] not only during fault blocking, but also during normal operation, which is an essential feature when the overmodulation capability is required in the converter.
A DC side fault event in MMCs can be divided into three stages [
43,
44,
45,
46]. In the first stage, the MMC is still able to generate the AC side voltages and therefore the AC side currents remain controlled. So, the fault current in this first stage consists mainly of a DC component due to the discharge of the SM capacitors. The discharge of the capacitors means that the MMC can no longer generate the AC side voltages and starts to lose control of the AC side currents. So, in the second stage, the AC side starts contributing to the fault. Thus, there is an AC component in the fault current in addition to the DC component. In the third stage, all IGBT switches in the SMs are blocked, which prevents the further discharge of capacitors. However, depending on the type of SM used, the AC side may still feed the DC side fault [
47] due to the freewheeling diodes in the SMs. The fault stages 1 and 3 are illustrated in
Figure 4; stage 2 is omitted since it is merely a combination of stages 1 and 3.
During a DC side fault in the HBSM-MMC, the IGBTs are blocked. For a positive SM current (
> 0) in
Figure 2a, diode D1 and the capacitor in each of the SMs are in the fault current path. Therefore, the total capacitor voltage of the HBSMs in each MMC arm would equal
. If the fault on the DC side is a pole-to-ground fault, then the peak AC side voltage would be equal to
from (1) and (2). Since the reverse voltage generated by the MMC arm would be greater than the peak AC grid phase voltage, diodes D1 in the HBSMs will be reverse biased, and the fault current would be suppressed. However, for
< 0, as shown in
Figure 2b, the SM capacitors are bypassed entirely, and no reverse voltage would be inserted by the SM capacitors in the current path. Therefore, the AC side source will feed the pole-to-ground fault on the DC side. In the case of a pole-to-pole fault on the DC side, as shown in
Figure 5, the peak line-to-line AC side voltage would be
. For
> 0, the arms of the MMC will insert a total reverse voltage of
in each phase while the arms will be bypassed for
< 0. The fault current path in the HBSM-MMC for a pole-to-pole fault is shown in
Figure 5. Regardless of the type of fault, the HBSM is incapable of blocking the AC grid contribution to the DC fault current.
The increased power losses and device cost of additional components have led some researchers to focus on the modification of the HBSM to protect the MMC from overcurrent. The single thyristor switch scheme [
48,
49] (
Figure 6a adds a thyristor across the AC terminals of the traditional HBSM. This thyristor is fired once a DC side fault is detected (
Figure 6b). The fault current path shown in
Figure 6b is similar to that of
Figure 5 except the thyristors are conducting rather than the SM diodes. Since the thyristor current carrying capability is higher than that of diodes, this design helps to protect the diodes from overcurrent during a DC fault. The authors in [
50] proposed the double thyristor switch scheme (
Figure 6c). When both thyristors are fired after the occurrence of a DC fault, the MMC arms are converted into six RL branches, as shown in
Figure 6d. This effectively converts the DC side short circuit into an AC short circuit since the AC side currents sum to zero at the DC poles. The DC fault current decays to zero, but the AC short circuit currents continue to flow in the arms of the MMC, and therefore such a design is only suitable for non-permanent faults.
7. STATCOM Operation and DC Fault Ride-Through
During a DC fault, the HVDC link voltage collapses, and active power cannot be transferred between the AC and DC sides. The MMC can be operated as a STATCOM to provide reactive power support to the AC system during this period. In the STATCOM operation mode, certain changes are required to be made with respect to control and arm/leg energy balancing in the MMC.
During the normal operation of MMC, the reference voltages used for modulation of the upper and lower arms (
and
) are expressed as,
where
denotes the leg internal voltage which is generated due to the flow of circulating current. If all the SMs are blocked, the MMC cannot supply reactive power to the AC grid. Instead, if the converter is allowed to operate with the
term in the arm reference voltage synthesized as zero [
92,
93], then the DC fault will be cleared. Positive and negative excursions of the MMC arm voltages will enable them to operate as wave-shaping circuits and control the AC currents. As long as the SMs have bipolar voltage generation capability, the MMC can ride through the fault and operate as a STATCOM to provide reactive power support to the AC grid. The following subsections review some DC FRT strategies and the STATCOM operation mode of a selected subset of MMC configurations discussed thus far. The modifications of the arm/leg energy balancing controllers during STATCOM operation mode are discussed briefly as well.
7.1. Hybrid Arm Based Bipolar MMC
The hybrid-arm-based bipolar MMC [
94] is a hybrid configuration where the arms connected to the ground pole are comprised of HBSMs while the arms connected to the positive and negative poles can be any type of fault blocking SM. The positive and negative poles are at
and
, respectively, with respect to the ground pole. During both pole-to-pole and pole-to-ground faults, the fault blocking modules connected to the positive and the negative poles are blocked, enabling the HBSMs to operate as a STATCOM.
Figure 29 shows such a bipolar MMC comprised of UFBSMs and HBSMs. This is a very simple and cost-effective way of achieving DC FRT ability since the fault blocking SMs required do not need to have bipolar capability for the converter to work as a STATCOM during DC faults.
7.2. STATCOM Operation Mode of the AAC
The bipolar voltage generation capability of the AAC enables it to operate in STATCOM mode during DC faults. Two different modes of operation are presented in [
95] depending on the conduction of the arms. The first mode of operation is similar to the normal operation mode of the AAC. The upper and lower arms of each phase conduct alternately. This mode will result in the current flowing through the DC side fault, which is not desirable. In the second mode of operation, either all the upper arms or all the lower arms are utilized during the STATCOM operation. This implies that the upper or the lower arms can function as star-connected STATCOMs. The current will be constrained to flow within the arms and will not flow into the DC side.
7.3. STATCOM Operation of Unipolar SM Configurations
The CDSM is incapable of bipolar voltage generation rendering it unsuitable for STATCOM operation during DC faults. However, the authors of [
96] identify switching states for bipolar operation of the CDSM, but only when the SM current direction is negative. This implies that the CDSM can operate as a STATCOM during DC faults if the arms are made to conduct alternately. The switching states for the STATCOM mode of the CDSM are shown in
Table 6, where the “Positive” and “Negative” states denote the bipolar SM voltages for
< 0. These switching states are utilized only when there is a DC side fault. The converter is then able to clear the fault and work as a STATCOM. A disadvantage of such a STATCOM mode of operation is that it will have half the reactive power capability compared to MMCs containing bipolar SMs.
As discussed in the previous paragraph, if alternate switching states exist for bipolar SM voltage generation for a certain direction of SM current, then the STATCOM operation of such unipolar SM configurations during DC faults may be realized by the alternate conduction of the arms. The UFBSM is one such fault blocking module that cannot generate bipolar voltages for both directions of SM current. However, alternate switching states with bipolar voltage output for
< 0 exist and are illustrated in
Table 7. Therefore, DC fault blocking and STATCOM operation are made possible by the alternate conduction of arms. Similar to the CDSM, a downside is that it will have half the reactive power capability compared to MMCs containing bipolar SMs.
In [
97], the authors propose the STATCOM operation of a hybrid HBSM-SDSM with a mix of 30% of SDSM per arm. As mentioned earlier, the SDSM (
Figure 30) is a unipolar module that cannot be operated as a STATCOM during DC faults if the switching states for normal operation are employed. Therefore, just as was the case with the CDSM and UFBSM, the arms are alternately blocked based on the current direction and an alternate set of bipolar voltage states is realized for
< 0. The switching states for the STATCOM operation mode of the SDSM are provided in
Table 8. The line-line voltage generated by the alternate blocking and conduction of the arms during STATCOM mode is higher compared to the CDSM-based STATCOM, resulting in superior reactive power capabilities.
7.4. Energy Balancing during STATCOM Mode of Operation
Capacitor energy balance in an MMC is essential to ensure proper operation of the converter and applies to both leg and arm. Voltage/energy balancing of the SM capacitors can be achieved either through non-energy- or energy-based methods. The non-energy-based algorithms are usually simpler to implement and do not require any modifications during DC faults in the MMC.
In the case of the UFBSM/HBSM-based bipolar MMC [
94], the outer control loop was modified to facilitate converter energy control. The
d-axis current reference was not obtained from the active power in the outer loop during STATCOM operation. Rather, a PI controller was utilized to generate the d-axis current reference such that the average capacitor voltage of the HBSMs was maintained near their nominal ratings. This enabled control over the total energy flowing into the MMC during the STATCOM mode of operation. The conventional sorting algorithm was used to keep the capacitor voltages balanced within the arms.
In [
17], an energy-based voltage balancing method was proposed whereby arm and leg energy in the MMC can be controlled by the injection of circulating currents. Expressions for the sum and difference of power flowing into the arms of an MMC are given by (8) and (9), respectively,
The first term on the right-hand side of (8) can be controlled by injection of a DC component in the circulating current (
), allowing leg energy balancing to be carried out during normal MMC operation [
17,
92,
98]. Meanwhile, the second term on the right-hand side of (9) can be utilized for arm energy balancing by the injection of a fundamental frequency component in the circulating current. However, in the event of a DC fault,
is synthesized as zero to clear the fault and operate the MMC in STATCOM mode. Therefore, the
term in (8) becomes zero and leg energy control is no longer possible. In [
93], a common-mode voltage (CMV) injection in the FBSM-MMC was proposed to carry out leg energy balancing during DC faults in the MMC. The CMV (
) is defined as the potential difference that exists between the neutral points of the AC and DC sides. Expressions for the CMV and the AC side current are,
The power generated in the MMC legs due to the injected common-mode voltage is given by,
The three-phase powers are converted to the
dq frame components and the reference for the CMV is obtained as,
where
and
represent the reference values of the leg powers in the
dq frame, while
and
are the AC side
d- and
q-axis current components, respectively. By controlling the phase and amplitude of the CMV, it would then be possible to vary the power flowing into the legs of the MMC and continue to carry out leg energy balancing during the STATCOM operation mode.
When the CDSM-MMC is working in STATCOM mode during a DC side fault [
96], the arms of the CDSM-MMC are conducting and being blocked alternately. Thus, the equivalent circuit of the DC faulted CDSM-MMC during STATCOM mode is different from when it is operating under normal conditions. The circulating current injection method for energy balancing is no longer feasible since no circulating current exists within the same phase due to the alternate conduction of the CDSM arms. Although the CMV injection method from [
92] can be employed for leg energy balancing, a simpler strategy was presented in [
96] where
dq transformation is not required. As the RMS value of the capacitor voltages in an arm is indicative of the arm’s energy level, in this strategy, the sum and difference of the arm power expressions for the conducting lower and upper arms, in terms of the RMS voltages of the SM capacitors, were split into two parts to denote powers flowing from the DC and AC sides into the conducting arms. The expression for the power flowing from the DC side into the conducting arms includes the CMV term. An increase in CMV leads to a decrease in the power flow in the conducting upper arm(s) and an increase in the power flow in the conducting lower arm(s), respectively. Consequently, the difference in the energy levels between the conducting upper and lower arms will decrease. Similarly, a decrease in the CMV leads to an increase in the power flow in the conducting upper arm(s) and a decrease in the power flow in the conducting lower arm(s), respectively. The reference value of the CMV is obtained from a PI controller based on the difference in RMS voltages of the SM capacitors in conducting upper and lower arms. Therefore, the CMV reference can be adjusted based on the RMS voltage of SM capacitors, and no circulating current injection is necessary for arm energy balancing. In addition, the outer controllers are adjusted to control the total converter energy in the same way as in [
94].
Authors in [
99,
100] proposed an energy balancing approach based on either AC or DC power. The variation of energy in the SMs is dependent on the instantaneous AC power and the power exchanged with the DC bus. Based on the energy balance equation, a controller can be designed using the AC power or the DC power in the outer loop. The references generated by the outer loop are the AC grid currents and the circulating currents. When the outer controller is based on AC power, it is not possible to implement three separate loops for the grid currents. Therefore, only the control of total MMC energy is possible as opposed to individual arm/leg energy balancing. In [
101], this idea was expanded and implemented to achieve energy balancing during a DC fault. During normal operation, energy balancing was performed using DC power. After the occurrence of a DC fault, the energy balancing was shifted to AC power mode since the loss of the DC voltage made DC power-based control impossible. However, in the AC power-based control, leg/arm energy balancing is not feasible since any circulating current injection intended for balancing may not add up to zero and flow into the DC fault. Therefore, the authors suggest the use of coupling matrices to ensure that the AC components of circulating currents sum to zero and do not flow through the DC fault. This method has the added advantage of achieving low transient overvoltage in the arms during the fault in addition to DC fault clearance and reactive power injection into the AC grid.
To summarize, the CMV injection method for leg energy balancing can be applied to any SM configuration with continuous conduction of both arms in a phase. The capacitor energy-based method, which was originally developed for the CDSM-STATCOM, can also be utilized for arm energy balancing during the STATCOM mode of operation of MMCs with other types of unipolar SMs. The AC power-based energy balancing method is more complex but can be used if better transient response/stability is desired.
8. Conclusions
In this paper, a variety of noteworthy SM and hybrid MMC configurations with DC fault blocking capability were reviewed and compared from different viewpoints, including the number of switches in the conduction path, fault blocking symmetry, voltage stress per device, device count, number of voltage sensors, overmodulation, soft switching, voltage balancing capability, and control complexity. Based on the comparisons made, several configurations, such as asymmetrical full-bridge submodule and mixed submodule, were identified, which hold an advantage in terms of lower conduction losses or total semiconductor device count, while SM configurations such as semi full-bridge submodule and switched capacitor were associated with better performance in terms of voltage balancing capability and control simplicity. When overmodulation is a requirement, mixed and asymmetrical full-bridge submodules are suitable choices. Meanwhile, the semi full-bridge submodule was identified as the proper candidate when a lower number of voltage sensors along with reduced control complexity is desired. Among hybrid topologies, the alternate arm converter was found to be the most efficient with a low device count, while the hybrid converter with cascaded DC side cells was recognized as a suitable configuration for short-distance HVDC transmission.
The STATCOM operation mode of the full-bridge MMC, alternative arm converter, hybrid MMCs, as well as MMCs based on unipolar SMs, such as clamped-double and unipolar full-bridge submodule, were discussed and compared in this paper. This shows that the adjustment of the arm voltage reference enables bipolar SMs to work as wave-shaping circuits, allowing the provision of reactive power support to the AC grid during a DC fault. Furthermore, MMCs with unipolar SMs can also work as STATCOMs during DC faults, if alternate switching states that enable bipolar operation exist for a certain direction of SM current. However, due to the alternate arm conduction during STATCOM mode, such unipolar SMs have half the reactive power capability of the bipolar SMs.
This paper also provides a review of different methods used to provide arm and leg energy balancing in MMCs when they are operated as STATCOMs during DC faults. One of the most notable methods is common-mode voltage injection, which can be applied to any SM configuration provided there is continuous conduction of both arms in a phase. The capacitor energy-based method for arm energy balancing during STATCOM operation of the clamped-double submodule can be applied to other unipolar SMs as well.