1. Introduction
Due to the development of renewable energy, more and more high-power and high-density inverters are being manufactured for PVs, wind power systems and fuel cells, etc. Therefore, the system testing for high-power and high-density inverters becomes very important, especially in the limited power-rating testing field. Although the International Electrotechnical Commission (IEC) has established some testing standards for distributed systems, such as IEC 60364-7-712:2017 [
1] and IEC 61000-3-3:2013+AMD1:2017+AMD2:2021 [
2], and IEC/TS 61000-3-4 [
3], etc., there still exist some issues in the testing field. If the power capacity of the testing field is smaller than that of the equipment under test (EUT), the high-power EUT cannot be tested under a full-scale power rating. Hence, some evaluation circuits and/or evaluation methods [
4,
5,
6,
7,
8,
9,
10,
11] for high-power converters were proposed. They are intended to reproduce the same encountered stresses for any components of high-power converters. However, the main constraint of the power density and lifespan of power converters is the DC-link capacitor. Generally, the life cycle of capacitors is usually shorter than that of the magnetic components and semiconductor devices. Therefore, evaluating the load life of capacitors working in severely adverse circumstances plays an important role in the design stages of the next-generation power converters, especially in the evaluation of the capacitors in terms of the power loss, ageing, and failure rate.
Nevertheless, in the past decades, only a single sinusoidal current was used to evaluate the quality of capacitors, such as 120 Hz and 1 kHz [
4]. In addition, a ripple current tester and a DC bias are used to test the capacitors [
5,
12]. However, the current that flows from the converter to the capacitors (EUT) contains multiple frequency components. Although the frequency components can be correctly analyzed, it should be noted that the power loss of capacitors with respect to frequencies is a non-linear characteristic [
6,
7,
8,
13]. In order to understand the aging characteristics, it is necessary to monitor the aging parameters of the capacitor under test in the actual scenario. Generally, there are three kinds of estimation methods, i.e., offline, quasi-online, and online methods. A quasi-online method was proposed in [
14], where a specific switch is used to stop the inverter and an LC resonant network is introduced. The DC-link capacitor value is estimated by analyzing the collected current data. However, this method requires additional control design, which limits its application. In [
9], a variable electrical network monitoring method was proposed. During the inverter shutdown period, the capacitors are discharged through the controlled variable electrical network, and the capacitance value and equivalent series resistance (ESR) are estimated, based on the observed discharge curve. Considering that the accelerated aging test is a long process, frequent shutdowns of the system will increase the burden of the system, and online estimation can avoid this shortcoming. In [
13], a small AC voltage is injected into the DC link, and the input impedance model of the inverter is adopted to simplify the measured approaches and calculate the capacitance value to realize online monitoring, which is suitable for a long-term accelerated life test. However, with the increasing power rating of inverters used in renewable energy, it will be more difficult to create a standard field to evaluate the capacitors on-line in full-scale converters and give a certification. Therefore, a down-scale capacitor evaluation testing circuit for high-power three-phase inverters was proposed in [
11]. By providing a high-voltage DC source to emulate the voltage across the capacitors in a full-scale voltage rating inverter, a down-scale voltage rating inverter is used to supply the current rating, which is the same as that of a full-scale voltage rating inverter. However, in the literature [
11], the inductor ripple current flowing through the capacitor is different from that in a full-scale voltage rating inverter. In addition, in practical applications, an unbalanced load in a three-phase system is a more common condition and this condition is not considered in [
11], which will cause an error estimation for the capacitor operated in a high-power inverter system.
In this paper, an improved down-scale power rating evaluation system is proposed by modifying the inductor value and adding a filter in a series with a low-voltage DC supply to precisely evaluate the current of the capacitor under the test. Moreover, AC and DC analyses of the proposed improved down-scale power rating evaluation system are conducted, and the equivalent circuit and transfer function are derived. Finally, some simulation and experimental results are provided to verify the validity of the proposed down-scale evaluation system.
The remainder of this paper is organized as follows. In
Section 2, the conventional down-scale evaluation system is described. Then, an improved down-scale evaluation system for the DC-link capacitors used in high-power three-phase inverter systems under balanced and unbalanced load conditions is proposed in
Section 3. In
Section 4, some simulation and experimental results are given to verify the validity of the proposed evaluation system. Finally, some conclusions are offered in
Section 5.
3. Proposed System Configuration
In [
11], since the current rating of the small inverter is controlled to be same as that of the full-scale inverter, the relationship between the power rating of the small inverter
Psmall and the full-scale inverter
PFS is given by
where
VDClink-S and
VDClink-FS are the DC-link voltages of the down-scale inverter and the full-scale inverter, respectively. However, the different DC-link voltages will change the actual inductor current ripples of the three-phase currents
ia,
ib and
ic. The voltage across the output inductors in the down-scale voltage rating inverter is different from that in the full-scale voltage rating inverter. Therefore, the DC-link capacitor current in the down-scale voltage rating inverter is also different from that in the full-scale voltage rating inverter. In this paper, an improved evaluation circuit is proposed in
Figure 3. To reach the same encountered amplitude of the current ripple in the line currents
ia,
ib and
ic in the full-scale inverter, the inductor value should be modified according to the down-scale voltage rating as follows.
where the
is the inductor terminal voltage, and
is the inductor current. For example, if the low-voltage DC supply
VL is half of the high-voltage DC supply
VH, the inductance of the down-scale voltage rating inverter must be half the inductance of the full-scale voltage rating inverter. Otherwise, the amplitude of the current ripples in the three-phase currents in the down-scale voltage rating inverter will be half of that in the full-scale voltage rating inverter. It should be noticed that the more we lower the voltage rating of the small inverter, the smaller inductance of the output inductors we should select.
Therefore, an improved down-scale voltage rating evaluation system for DC-link capacitor is proposed in
Figure 3. Compared with
Figure 2, the three-phase inductors are changed and a notch filter is adopted in the low-voltage DC supply path. It should be noticed that, in order to block the high-frequency ripple current produced by the PWM inverter to flow through the high-voltage DC supply
VH and low-voltage DC supply
VL, the reactance of the two choke inductors must be much larger than that of
Ctest and
Cbypass, as follows
where
,
is the switching frequency of the inverter.
LHchoke and
LLchoke are the choke inductors of the high- and low-voltage DC supplies, respectively. However, under the unbalanced load condition, there exists a double-line frequency in the DC-link capacitor. The choke inductor cannot block the double-line frequency caused by the unbalanced load condition. Hence, the
LN and
CN must satisfy the following
where
,
is the line frequency.
In order to analyze the proposed evaluation system shown in
Figure 3, an equivalent circuit focusing on the inverter current
iinv and DC side currents is introduced in
Figure 4, where the low-voltage DC supply
VH and high-voltage DC supply
VL are set to zero. The current
iinv can be seen as the current source and expressed as the sum of the DC component
Idc and the AC component
iac. The AC current
iac includes high- and low-frequency components. The
LLchoke and
LHchoke are the choke inductors in the low-voltage DC side and high-voltage DC side, respectively. The
RLV and
RHV are the equivalent series resistance corresponding to the low-voltage DC side and the high-voltage DC side circuit branches, respectively. Note that the damping resistor
Rdamp is added into the
RHV. For the convenience of discussion, we assume
Z1 and
Z4 are the total impedance in the low-voltage DC side and the high-voltage DC side circuit branches, respectively. The
Z2 and
Z3 are the impedance of the bypassing capacitor
Cbypass and capacitor
Ctest under test, respectively. Therefore, the impedances
Z1 to
Z4 can be written as follows:
Then the transfer functions G
1(s) from
iinv to
iLdc, and G
2(s) from
iinv to
iCT can be expressed as follows
Under the load-unbalanced condition, the AC component
iac in the current
iinv contains a second-order harmonic current and a high-frequency switching current, which are greater than or equal to 120 Hz. It should be noted that, when the current frequency is 120 Hz or above, the impedance of
Z3 is much smaller than
Z4. For instance, if the current frequency is 120 Hz and the capacitor
Ctest, choke inductor
LHchoke, and equivalent series resistance
RHV are selected as 2.2 mF, 1.6 mH and 10 ohm, respectively, the impedance
Z3 is 0.6 ohm and
Z4 is 11.2 ohm. In this condition,
Z3 is much less than
Z4. Thus, for AC components above 120 Hz in current
iinv,
Z4 can be approximated as an open circuit. Thus, the transfer functions from
iac to
iLdc, and from
iac to
iCT can be written as follows, respectively.
In order to discuss the properties of the conventional and proposed evaluation systems for capacitors utilized in high-power three-phase inverters, G
3(s) and G
4(s) in the evaluation system [
11] can be written as Equations (13) and (14)
where
CS is the equivalent series capacitor in the
Z2 and
Z3 circuit branch. In the following, the choke inductor
LLchoke is discussed under three different inductor values, namely 1 mH, 1.6 mH, and 2.2 mH. The bode plots of G
3 and G
4 in the conventional evaluation system are shown in
Figure 5a,b, respectively. Note that, in the system,
CS and
LLchoke will form an LC resonant circuit. For the worst case, when the inductance value of the choke inductor
LLchoke is 1.6 mH, the second-order harmonic current, i.e., 120 Hz, will exactly fall on the peak resonance, where the gain of the transfer function is at the maximum. In this case, it will seriously influence the current
iCT under test because the second-order current will not only flow into
iLdc, but also be amplified due to the LC resonance. To solve this problem, a filter is adopted and added to the low DC voltage side circuit branch, shown in
Figure 3, to block the second-order harmonic current and change the resonance situation. For the improved system in this paper, G
3(s) and G
4(s) are given as Equations (15) and (16), respectively. The bode plots of G
3(s) and G
4(s) in the improved evaluation system are shown in
Figure 6. Different from that shown in
Figure 5, the gain of the transfer function G
3(s) at 120 Hz is much smaller. Thus, it can be seen from
Figure 5 and
Figure 6 that, for the 120 Hz ripple current, the impedance of
Z1 is high enough to block it. Moreover, the peak resonance point is set to 66 Hz, as shown in
Figure 6a. Note that, under the load-unbalanced condition,
iac does not contain the ripple currents whose frequencies are below 120 Hz.
Figure 6b shows the bode plot of the transfer function G
4(s). No matter what inductance value of
LLchoke is selected, the gain of G
4(s) stays at 0 dB at 120 Hz and at the switching frequency, which indicates that the AC component of the capacitor current
iCT is equal to the ripple current flowing from the down-scale and full-scale voltage rating inverter under the unbalanced load condition.
4. Simulation and Experimental Results
To verify the effectiveness of the proposed evaluation system, some simulation results are executed. Simultaneously, a full-scale voltage rating inverter and a down-scale voltage rating evaluation system are also constructed.
Table 1 and
Table 2 list the circuit parameters of the full-scale voltage rating inverter and the down-scale voltage rating evaluation systems used in the simulation and experiment, respectively.
Figure 7a–c and
Figure 7d–f shows the simulation and experimental results of the output voltages
Va,
Vb,
Vc, and the output inductor current
ia, respectively. Due to the power rating of the down-scale voltage rating VSI being half that of the full-scale voltage rating VSI, it can be seen from
Figure 7 that the output inductor values of the down-scale voltage rating VSI must be modified to half that of the full-scale voltage rating VSI, so that the amplitude of the line current ripple in the down-scale voltage rating inverter is very close to that in the full-scale inverter.
Table 3 and
Table 4 show the simulated and measured peak-to-peak current ripples at the maximum phase voltage, respectively. As can be observed from
Table 3 and
Table 4, one can see that the amplitude of the current ripple in the proposed down-scale voltage rating evaluation system has a value closer to that of the full-scale voltage rating VSI, when compared with the conventional down-scale voltage rating evaluation system.
Figure 8 shows the voltage and current simulated waveforms of the capacitor under test in the full-scale voltage rating inverter, conventional down-scale voltage rating evaluation system, and proposed down-scale voltage rating evaluation system.
Figure 8a,b illustrates the simulated waveforms of the full-scale voltage rating inverter under the load-balanced and load-unbalanced conditions, respectively. As shown in
Figure 8c,d, although the testing capacitor current
iCT of the conventional down-scale voltage rating evaluation system can be very close to that of the full-scale voltage rating inverter in the load-balanced condition, it does not perform well in the load-unbalanced condition. By comparison, the proposed down-scale voltage rating evaluation system can have a similar testing capacitor current
iCT compared with the conventional down-scale voltage rating evaluation system in both the load-balanced and load-unbalanced conditions, as shown in
Figure 8e,f.
In order to clarify the difference in the capacitor evaluation results, the corresponding enlarged view of the simulated current
iCT of the DC-link capacitor under test is illustrated in
Figure 9. It follows from
Figure 9 that, under the balanced load condition, the conventional and proposed down-scale evaluation systems can obtain a similar DC-link capacitor current under test compared with the full-scale voltage rating VSI, but it is different under the unbalanced load condition. In addition, the corresponding close-to-120 Hz FFT results of the simulated
iCT of the DC-link capacitor under test are shown in
Figure 10. As can be seen from
Figure 10, under the balanced load condition, the amplitude of the double-line frequency in the full-scale voltage rating VSI, conventional down-scale voltage rating evaluation system, and proposed down-scale voltage rating evaluation system is very close to zero. However, under the unbalanced load condition, the amplitude of the double-line frequency in the conventional down-scale voltage rating evaluation system is much different from that in the full-scale voltage rating VSI.
Next, by analyzing the
iLdc and
iCT, one can observe the problem of the previous system [
11] in
Figure 11.
Figure 11b shows that, when the three phase loads are unbalanced, the double-line frequency or second-order harmonic current will flow into
iLdc and be amplified by an LC resonant circuit loop. As shown in
Figure 11d, the proposed down-scale voltage rating evaluation system can block the second-order harmonic current in the low-voltage DC-side
iLdc circuit branch and change the LC resonant circuit loop.
Figure 12 and
Figure 13 are the experimental results corresponding to the simulation results in
Figure 8 and
Figure 11, respectively. As can be observed from
Figure 8,
Figure 11,
Figure 12 and
Figure 13, the experimental results are in very close agreement with the simulation results. Both the simulation and experimental results verify the validity of the proposed down-scale voltage rating evaluation system.