A Self-Powered Dual-Stage Boost Converter Circuit for Piezoelectric Energy Harvesting Systems

Abstract

Miniaturised piezoelectric devices are emerging energy harvesting sources that are appropriate for various implantable and wearable applications. However, these piezoelectric devices exhibit considerable internal resistance due to their internal impedance, which leads to self-start and low-energy conversion failures. This paper describes a dual-stage boost converter circuit by facilitating self-powering features and boosting the low voltage harvested by the piezoelectric devices into dc. The proposed circuit comprises conversion stages of ac-dc and dc-dc in Stages I and II, respectively. In addition, the proposed circuit does not require employing the auxiliary circuits to generate the train pulses by triggering the bidirectional switches to envelop the current being stored in Stage II and kick-start the self-powered circuit for piezoelectric energy harvesting systems. Theoretical assumptions and control strategies were tested and verified with ideal and impedance input sources. The proposed circuit could convert a low voltage of 3 V_ac into 19 V_dc. The maximum attained output power by the proposed circuit was 3.61 mW. The outcome depicted that the proposed circuit boosted the low voltage and outperformed the existing literature circuits in terms of output voltage and power.

1. Introduction

The global energy demand has increased substantially in the past few decades, primarily due to the growing world population and the economic development of world-leading countries. Thus, researchers consistently develop renewable energy sources to limit the dependency on conventional energy sources. A comprehensive range of renewable energy sources is available in the environment, comprising solar [1], wind energy [2], thermal energy [3], and mechanical energy [4,5]. However, suitable energy harvesting and conversion systems are required to effectively utilise these available energy sources. One such system is piezoelectric energy harvesting, which is a mechanical vibration-based energy harvesting methodology used for harvesting electrical energy as alternating current/voltage (ac) from the ambient vibrations, which are readily available in the environment. A piezoelectric device is used to convert from mechanical energy to ac.

Apart from the device itself, a conventional piezoelectric energy harvesting system comprises three fundamental aspects: a mechanical system an electrical interface circuit [6], and a storage battery [7]. A flow diagram illustrating the piezoelectric energy harvesting system procedures is shown in Figure 1.

As the piezoelectric device is placed on a mechanical system, it harvests ac when it is subjected to excitation, while the storage devices (i.e., batteries, capacitors) require direct current/voltage (dc). Thus, the piezoelectric energy harvesting process necessitates the conversion process of ac-dc (i.e., rectification). Such conversion requires a power electronics circuit, namely, a rectifier circuit. Thus, the rectifier circuit is placed among the piezoelectric device and storage devices for rectification.

In the literature, researchers have proposed various types of rectifier circuits, including active- and passive-based power conversion circuits [8] and power conditioning circuits for piezoelectric energy harvesting [9]. These include linear, non-linear and impedance matching circuits for overcoming the shortcomings of the conversion (i.e., ac-dc) process (such as switching losses and power conversion losses), which resulted due to the piezoelectric device’s low voltage and its internal characteristics. However, the primary method is the full-bridge rectifier circuit [10], which comprises four diodes [11]. Despite its simplicity and flexibility, the full-bridge rectifier circuit possesses a significant drawback: forward voltage [12]. Thus, the output voltage (V_dc) and power through the full-bridge rectifier circuit were limited [13]. However, most power electronic devices require 3.3 V_dc. Thus, there is a necessity for a power electronic circuit that enables two features [14], namely, ac-dc and boosting low voltage into high voltage.

To address the drawbacks (i.e., the limited output voltage and power), ref. [10] proposed an H-Bridge rectifier circuit. The H-Bridge rectifier circuit comprised bidirectional switches and was proposed to transform the ac harvested by the piezoelectric device into dc by minimising forward voltage drop losses of conventional diodes in the full-bridge rectifier circuit. The intended circuit was tested successfully at high- and low-frequency vibrations. Nevertheless, the resulting outcome of the H-Bridge rectifier circuit was limited, and the boundary conditions were not well defined.

Later, to overcome this low-output voltage (V_dc), [15] modified a single-stage H-Bridge rectifier circuit into a dual-stage H-Bridge rectifier circuit. The proposed circuit successfully converted the low ac harvested by the piezoelectric device into high dc voltage (V_dc) by employing the switching process in its Stage II operation. The practical credibility of the proposed circuit was tested in two scenarios: the shaker and human motion tests. The results showed that the proposed circuit successfully charged a 1.2 V_dc, 4 mA solar battery in less than 30 min. However, the circuit experienced higher power losses due to its complexity in Stage II. In addition, the proposed circuit employed auxiliary components such as Zener diodes and ICs, which led to high conversion losses.

Another study on bridgeless rectifier circuits was conducted by [16] to minimise the diode’s forward voltage losses in the conventional bridge rectifier circuit. The proposed circuit employed a limited number of components to reduce the circuit’s power dissipation. It was tested using a series of simulations and experimental scenarios. The outcome showed that the proposed circuit achieved 1.4 times more output power than the bridge rectifier. Nevertheless, the circuit employed an auxiliary power supply to enable the switching phenomena, which made this design impractical in real-life applications.

Another methodology for achieving maximum output power is employing a non-linear system with external switches as an MOSFET (metal-oxide-field-effect-transistor), duty cycles, switching frequency, and passive electronic components, such as capacitors and inductors. A variety of non-linear approaches were proposed, including synchronous charge extraction [17], synchronized switching harvesting on inductors [18], a self-powered sequential switching harvesting on inductors [19], a single-pulse integrated circuits-based energy harvester [20], synchronous electric charge extraction [21], parallel sequencing switching harvesting on inductors, inductor-less dc-dc converter circuits [22], the sequential switching and synchronous charge extraction-based technique [23] and the synchronous charge extraction technique [24]. However, the prior proposed circuits embodied auxiliary circuits, such as diodes, transformers and bulky inductors, which are unsuitable for piezoelectric energy harvesting applications due to their high energy losses. Another approach, synchronised switching harvesting techniques, was proposed by [18,25,26]. Compared to the full-bridge rectifier circuit, the proposed circuit improved and enhanced the ac to high dc (i.e., output voltage). However, the proposed methodology adopted additional components: a polarity detector, an oscillator, diodes, a controller, logic gates and transformers. Due to this, the ac-dc conversion losses and power consumption across circuit elements are higher compared to the power generated by the piezoelectric device. In addition, the circuit required a high voltage to initiate the conversion process.

Later, [27] proposed a rectifier-less ac-dc conversion circuit by employing the synchronous process by using an inductor. A cold startup feature is introduced to the proposed circuit to achieve the optimised output from the proposed circuit. The circuit achieved a gleaning output power of 254 μW at a 0.65 mV_ac input voltage. However, the proposed circuitry is unsuitable, as it demands auxiliary components, such as three piezoelectric devices, three capacitors, a logic controller, an inductor and a polarity detector. Thus, the proposed circuit utilised high power and inflexibility in the PEH applications.

While the piezoelectric device generates low voltage, and the conventional full-bridge rectifier includes forward voltage issues. Most power electronic applications require 3.3 V_dc. The previously published literature highlighted that most researchers focused on rectification and boosting in their proposed circuits, which results in high power consumption and stress between the switches and parasitic components. In addition, most literature circuits require auxiliary electronic components such as polarity indicators, duty cycles, logic gates and controllers [28] to operate the circuit effectively. Therefore, a more suitable electronic circuit needs to fill the previously stated literature gap linked to boosting the low ac voltage harvested by the piezoelectric device into high dc, which results in less power consumption, less stress between the switches and no utilisation of parasitic components during the switching process.

Therefore, to avoid these drawbacks, the authors developed the two-stage conversion process circuit by garnering the combinations of the conventional voltage doubler [18,26,28,29] and the literature switching circuits [27,29,30].

The proposed dual-stage boost converter circuit employs minimal components to reduce conversion losses through a two-stage operation system. Stage I involves a voltage doubler [18,26,28,29] circuit for ac-dc conversion, while Stage II involves a dc-dc step-up voltage converter for voltage amplification. Other key benefits of the dual-stage boost converter circuit are highlighted below:

• The proposed circuit implemented a single MOSFET switch. This reduced stress in the switching process, thus achieving a higher output voltage (V_dc) and power.
• As highlighted in the literature, it is developed without employing complex, extraneous circuits and polarity indicators, which leads to lower conversion losses and complexity.

A comprehensive description of the dual-stage boost converter circuit is discussed in the subsequent sections.

2. Piezoelectric Energy Harvesting Circuits

This segment describes the inner features of the mechanically vibrated piezoelectric device employed in the piezoelectric energy harvesting system. Subsequently, the theoretical analysis and operations of both the voltage doubler and proposed dual-stage boost converter circuits are also explained.

2.1. Internal Circuit of a Piezoelectric Device

When a piezoelectric device is mechanically excited, it harvests AC voltage (V_ac), comprising positive and negative half-cycles, across its electrodes. This piezoelectric device can be considered a sinusoidal current source parallel to its internal capacitor (C_P) and resistor (R_P). This is graphically represented in Figure 2a. Alternatively, it can also be demonstrated as a voltage source with the internal capacitor (C_P) and resistor (R_P) in the series configuration [31,32].

As it is considered a current source, it has to charge and discharge its internal capacitor before the piezoelectric device power flows through the electrodes. The representation of the current source and associated waveforms when the piezoelectric device is mechanically excited is represented in Figure 2. During the charging duration of the internal capacitor, no output is expected across piezoelectric device electrodes. This region is called a non-harvesting region, while the remaining period is called a harvesting period. Since the ac includes both half-cycles, the abovementioned charging and discharging procedures occur in both half-cycles. The non-harvesting region is denoted in the intervals of 1 and 3 in the time periods of t_0–1 and t_2–3, whereas the harvesting period is denoted in the intervals of 2 and 4 in the periods of t_1–2 and t_3–4 in both half-cycles, respectively [15,18,32,33]. The complete working operation of the piezoelectric device in both half-cycles is explained in

Table 1. Working intervals of a piezoelectric device and voltage doubler.

Electronic Circuits	Mode 1: Positive Half-Cycle		Mode 2: Negative Half-Cycle
	Interval 1	Interval 2	Interval 3	Interval 4
Piezoelectric device	When to < t ≤ t1 CP: Charging CL: Not charging	When t1 < t ≤ t2 CP: Discharging CL: Charging	When t2 < t ≤ t3 CP: Charging CL: Not charging	When t3 < t ≤ t4 CP: Discharging CL: Charging
Voltage doubler	When to < t ≤ t1 CP: Charging D1: OFF D2: OFF CL: Not charging	When t1 < t ≤ t2 CP: Discharging D1: ON D2: OFF CL: Charging	When t2 < t ≤ t3 CP: Charging D1: OFF D2: OFF CL: Not charging	When t3 < t ≤ t4 CP: Discharging D1: OFF D2: ON CL: Charging

.

The harvested piezoelectric device’s current (i_ac (t)) due to mechanical excitations can be expressed as:

$${\mathrm{i}}_{\mathrm{ac}}(\mathrm{t})=\widehat{{\mathrm{I}}_{\mathrm{ac}}}\sin (\mathsf{\omega }\mathrm{t})$$

(1)

where Î_ac is the magnitude of the harvested current, ω is the angular frequency, while t represents the time period.

2.2. Voltage Doubler Circuit

A voltage doubler circuit [18,18,26,28,29] and its associated current and voltage waveforms are illustrated in Figure 3. During intervals 1 and 3, the internal capacitance of the piezoelectric device gets charged in each half-cycle (positive and negative), and no current is conducted towards the load capacitor (C_L). Hence, the voltage doubler circuit is OFF, which can be observed as the shaded region (Figure 3b).

However, once the internal capacitance is fully charged, the current i_ac (t) starts flowing towards the load capacitor (C_L) and starts charging it. During this interval, the voltage doubler starts conducting, which can be observed as the non-shaded region in intervals 2 and 4 (Figure 3b).

As a result of the voltage doubler’s operation, the capacitor (C_L) gets charged. The working operation of the voltage doubler circuit in both half-cycles can be observed in Table 1.

2.3. Operation Modes of the Dual-Stage Boost Convereter Circuit

In this research, a dual-stage boost converter circuit is proposed to alleviate the drawbacks of traditional circuits. The proposed circuit in Figure 4a is designed to function in two stages (I & II) and includes four modes. Stage I involves the operation of the voltage doubler circuit for ac-dc conversion, while Stage II comprises a dc-dc step-up voltage converter to boost the stored dc voltage (V_dc) in C₃ in Stage I. As the dual-stage boost converter circuit is the continuation of the voltage doubler circuit, Modes 1 and 2 (Stage I) of the dual-stage boost converter and the voltage doubler circuits are expected to be the same. As a result, the working operation of Modes 3 and 4 (Stage II) is only described in this section. It should be noted that the operations of Modes 3 and 4 (Stage II) start when Stage I’s operation fully charges the capacitor (C₃).

Stage II comprises two modes of operation, 3 and 4. Mode 3 starts working when the MOSFET switch (M₁) is switched ON, while Mode 4 begins when the MOSFET switch (M₁) is switched OFF. The complete working operation in both modes is depicted as Figure 4b,c, respectively.

• Mode 3: (When the MOSFET switch (M₁) is ON)

Initially, the stored voltage in the capacitor (C₃) passes through the inductor (L₁) and flows towards the base (B) of the transistor (Q₁) via the coupling capacitor (C₄). It is worth noting that the transistor Q₁ behaves as a voltage amplifier that amplifies a low voltage at the base (B) terminal to a higher output voltage at the collector (C) terminal.

This collector output triggers the gate (G) terminal of the MOSFET (M₁) and consequently turns on M₁. At this point, the accumulated voltage in the capacitor (C₃) flows through the inductor (L₁), leading to a gradual increase in the inductor (L₁) current from zero to peak because the inductor resists a rapid change in current. The diode (D₄) is reverse-biased during this time, and no current flows to the load capacitor (C_L). Figure 4b illustrates the current flow during Mode 3, when the M₁ is in the ON state.

• Mode 4: (When the MOSFET switch (M₁) is OFF)

When the L₁ is fully saturated in this Mode, it stops the current flow towards the transistor (Q₁) and turns the M₁ OFF. Thus, the stored current in the L₁ is freewheeled via the diode (D₄) and starts charging the load capacitor (C_L). Because the capacitor resists a rapid change in voltage, it charges slowly from zero to peak value. Figure 4c demonstrates the current flow during Mode 4, when the M₁ is in the OFF state. A brief operation of Modes 3 and 4 is shown in

Table 2. Working modes of Stage II.

Dual-Stage Boost Converter Circuit	Mode 3	Mode 4
Stage II	M1: ON L1: Charging D4: OFF CL: Discharging	M1: OFF L1: Discharging D4: ON CL: Charging

.

It is worth emphasising that Stage II does not necessitate an auxiliary power source to trigger the dc-dc step-up voltage converter. Thus, switching pulses, logic gates, and integrated circuits [28] are not required to operate the proposed circuit’s MOSFET switch (M₁).

As the proposed research emphasises, the piezoelectric energy harvesting systems, regarding the rectification process, the output voltage (V_dc) and the power through the proposed circuit, are chosen to validate its practical credibility. Additionally, the calculated output power of the proposed circuit is compared with an existing published literature circuit. It should be noted that the prime objective of the proposed and previously published energy harvesting circuits is to extract a higher output voltage (V_dc) and power. As a result, the output voltage (V_dc) and power are only shown in this study. The average input power (P_ac) harvested by the vibrating piezoelectric device was calculated as [18,27,28]:

$${\mathrm{P}}_{\mathrm{ac}}=\frac{{\mathrm{V}}_{\mathrm{Pk}}}{\sqrt{2}}·\frac{{\mathrm{I}}_{\mathrm{Pk}}}{\sqrt{2}}\cos \mathsf{\phi }$$

(2)

where ${\mathrm{I}}_{\mathrm{Pk}}$ and ${\mathrm{V}}_{\mathrm{Pk}}$ are the peak current and voltage, while $\mathsf{\phi }$ is the phase angle between the current and voltage in the piezoelectric device.

Moreover, the output power (P_OUT) of the dual-stage boost converter circuit was calculated by multiplying the value of current (I_L) through the load resistor (R_L) and voltage (V_L) across the load capacitor (C_L):

P_OUT = V_L × I_L

(3)

3. Simulation Study

This simulation study was conducted to investigate the theoretical validation of the dual-stage boost converter circuit. LTSpice [15,18,18,22,34] software was employed in this study. Using LTSpice, an ideal ac voltage source is selected as an input and applied to the boost circuit. This input is chosen to emulate the piezoelectric device’s output for testing the proposed circuit. However, later, the ideal ac voltage source was exchanged with the piezoelectric device in the experiments.

Additionally, to validate the performance capability of the proposed circuit, both ideal and piezoelectric device inputs were chosen. The acquired results from LTSpice using an ideal ac voltage source were considered proof of the concept. In LTSpice, a 5 V, 50 Hz sinusoidal waveform was chosen as the input ideal ac voltage source. The simulation model of the proposed circuit at 5 V_ac and a 50 Hz frequency is depicted in Figure 5.

The adopted electronic components and their parameters for the proposed circuit are described in

Table 3. Components Table.

Part	Description
	Type	Reference
Vac	Voltage source	5 V, 50 Hz
R1	Resistor	75 KΩ
R2	Resistor	200 Ω
RL	Load Resistor	100 Ω
C1–C2	Capacitor	2.2 uF
C3	Capacitor	330 pF
CL	Load Capacitor	500 uF
D1–D4	Schottky diode	1N5819
M1	N-MOSFET	BSZ0920NS
Q1	NPN-Transistor	2N3904
L1	Inductor	4.7 uH

.

Figure 6 demonstrates the adopted ideal ac voltage source. A comprehensive zoom-in view of the ON and OFF periods of the MOSFET switch (M₁), as discussed in section II, is illustrated in Figure 7. As a result of MOSFET switching, the inductor gets energised and de-energised, which is depicted in Figure 8. In addition, the charging and discharging of load capacitors (C_L) are illustrated within the context of Figure 9.

4. Experimental Study

In both testing scenarios (at a constant voltage (Test 1) and a constant frequency (Test 2)), an MFC-M2814-P2 patch (37 mm × 17 mm × 0.180 mm, internal capacitance: 30.79 nF) was used as a piezoelectric device. The piezoelectric device patch was glued on the surface of an aluminium cantilevered beam (Dimensions: 205 mm × 20 mm × 1 mm) at the fixed end, while two permanent magnets were coupled on the free end, acting as a proof mass. A voltmeter and ammeter [CD 771] were used to measure the output voltage (V_dc) and current, respectively.

To generate an input ac voltage (V_ac) from the piezoelectric device, a function generator (Agilent 33210A) was utilised, which was attached to the power amplifier (2706, B&K Agilent). This combination boosted the ac voltage (V_ac) from the piezoelectric device before applying it to the mechanical shaker (APS-113). This mechanical shaker induced harmonic vibrations based on the given input amplitude and frequency to shake the cantilevered beam incorporated with a piezoelectric device. The frequency and amplitude at which the piezoelectric device harvested mechanical vibrations were collectively adjusted through the function generator and power amplifier. When the harvested ac voltage (V_ac) from the vibrating piezoelectric device was supplied to the dual-stage boost converter circuit, it conducted Stage I (ac-dc) and Stage II (dc-dc) operations.

In Tests 1 and 2, the harvested AC voltage (V_ac) from the piezoelectric device through the proposed circuit was investigated using varying input parameters, as highlighted in

Table 4. Testing Sources.

Sources of Excitation	Test Scenarios	Frequency (Hz)	Input Voltage (Vac)	Type of Piezoelectric Device	Load Resistors (KΩ)
Mechanical Shaker	Test 1	1, 2, 3, 4, 5 10, 20, 30, 40, 50	5 3	MFC	R1 = 100 R2 = 300 R3 = 620 R4 = 910
	Test 2	1, 2	1, 2, 3, 4, 5

. In Test 1, the proposed circuit was tested at a constant input voltage under varying frequencies. In Test 2, the proposed circuit was analysed at a constant frequency under a variable input voltage. The generated output voltage (V_dc) through the dual-stage boost converter circuit was stored in C_L in both testing scenarios. In addition, each load resistor (R_L) was connected in parallel, and the output was measured using a multimeter. An experimental setup of the proposed circuit is depicted in Figure 10.

4.1. Test 1: Varying Excitation Frequency under a Constant Input Voltage

The output voltage (V_dc) and power obtained from Test 1 are highlighted in Figure 11a,b, respectively. The dotted line represents the voltage doubler circuit, while the solid line indicates the dual-stage boost converter circuit. The output voltage (V_dc) and power from both the proposed and voltage doubler circuits are compared under varied input frequencies (10–50 Hz) and load resistances (R_L).

By analysing Figure 11a, it can be regarded that the output voltage (V_dc) increases substantially by increasing the value of load resistances from 100 KΩ to 910 KΩ. Irrespective of the excitation frequency, the proposed circuit yielded a higher output voltage (V_dc) than the voltage doubler circuit under a constant input voltage (3 V_ac). It is to be noted that the proposed circuit achieved a higher output voltage (V_dc) at a higher load resistance (R_L).

Initially, a 3 V_ac input voltage was given to the proposed circuit at an excitation frequency of 10 Hz. Consequently, Stage I conducted ac-dc conversion, and the output voltage (V_dc) was stored in the capacitor (C₃) (Figure 4a). It should be noted that Stage II does not operate unless Stage I fully charges the capacitor (C₃). When it is fully charged, it stimulates the current flow in Stage II.

The stored charge in the C₃ passed through the L₁ and flowed towards the base of the transistor (Q₁) through the coupling capacitor (C₄). This transistor (Q₁) behaved as a Common Emitter voltage amplifier, amplifying any input voltage at the base terminal to a higher output voltage at the collector terminal. This output at the collector terminal triggered the MOSFET’s switch (M₁) gate terminal, allowing for the current flow source from the drain and energising the inductor (L₁).

Once the inductor (L₁) is fully saturated, it stops the current flow to the transistor (Q₁)_. Consequently, the MOSFET switch (M₁) turned OFF. Thus, the stored charge in the inductor (L₁) forward-biased the diode (D₄) and started charging the load capacitor (C_L). Afterwards, each load resistor from R₁ to R₄ was connected in parallel with the load capacitor (C_L), and the respective output voltages (V_dc) were measured.

Later, the remaining excitation frequencies (20–40 Hz) were applied under a similar input voltage (3 V_ac), and the resulting output voltage (V_dc) for each load resistor (R_L) (R₁–R₄) was measured (Figure 11a). In addition, the output power was calculated using Equation (3) by measuring the voltage (V_L) across the load capacitor (C_L) and the current through the load resistor (R_L). Figure 11b shows the output power under various excitation frequencies and a fixed input voltage. It is noted that the output power shows a different trend as compared to the output voltage (V_dc) at various load resistances (R_L). This is because the harvested current through each load resistor (R_L) was different. Thus, the calculated output power was dissimilar.

By further examining Figure 11, it can be observed that the excitation frequency substantially impacts the proposed circuit’s overall performance. The output voltage (V_dc) and power were elevated at higher frequencies. The output voltage (V_dc) and power at different excitation frequencies (10–50 Hz) with a constant input ac voltage (V_ac) are depicted in Figure 12a,b, respectively. It should be noted that the proposed circuit yielded a higher output voltage (V_dc) and power under higher excitation frequencies. This is due to the reason that, at higher frequencies, the capacitive reactance of the piezoelectric device decreases. As a result, the piezoelectric device generates a higher ac voltage (V_ac), leading to a higher output voltage (V_dc) and power.

It should be noted that the prime goal of this research is to validate the performance of the proposed circuit to track the optimal points and power dependency on the frequency under varying load resistances and the attainment of the maximum output voltage (V_dc) and power at a frequency of 50 Hz at 3 V_ac.

4.2. Test 2: Varying Input Voltage under a Constant Excitation Frequency

In this testing scenario, the dual-stage boost converter and the voltage doubler circuits were further analysed under varying input voltages (V_ac). The frequency was kept constant at 1 Hz. The vibrating piezoelectric device’s ac voltage (V_ac) was chosen from 1 V_ac to 5 V_ac. A voltmeter was utilised to measure the harvested V_ac from the vibrating piezoelectric device before applying it to the proposed circuit. A detailed summary of the different investigated parameters is reported in Table 4. Figure 13a,b represent the results of the output voltage (V_dc) and power from Test 2. The dotted line represents the voltage doubler circuit, while the solid line signifies the proposed circuit.

Initially, 1 V_ac from a vibrating piezoelectric device was applied across the proposed circuit. As the input ac voltage (V_ac) was more significant than the threshold voltage of the transistor (Q₁) and MOSFET (M₁) switches, the proposed circuit started functioning, as explained in section IV-B. This resulted in achieving 0.36 V_dc, which was stored in the load capacitor (C_L). Similarly, when 3 V_ac and 4 V_ac were applied to the proposed circuit, 3.64 V_dc and 5.35 V_dc were achieved and stored in the load capacitor (C_L). It should be noted that a higher output voltage (V_dc) was achieved at a higher ac voltage (V_ac) because when the applied ac voltage (V_ac) increased, the drain to the source resistance path in the mosfet switch decreased [15,15,20,28,30]. Figure 11a illustrates the output voltages (V_dc) from both circuits under various input ac voltages (V_ac). It can be observed that the proposed circuit yielded a higher output voltage (V_dc) compared to the voltage doubler circuit at similarly applied ac voltages (V_ac).

Next, the output power was measured at the load capacitor (C_L) using Equation (3). The relation between the input ac voltage (V_ac) and the output power at a 1 Hz excitation frequency is depicted in Figure 13b. A higher output power was accumulated at the load capacitor (C_L) with an input voltage of 4V_ac, while the least power was detected at 2 V_ac at the load capacitor (C_L) using the proposed circuit. It can be noticed that, at higher input ac voltages (V_ac), the resistance in the drain to the source path of the MOSFET switch (M₁) was decreased. As a result, a higher output voltage (V_dc) is gathered in the load capacitor (C_L), thus increasing the output power.

It was observed that the output voltage (V_dc) increased with the enhancing load resistance (100–910 KΩ). The highest output voltage (V_dc) is obtained at 910 KΩ, while the lowest was observed at 100 KΩ. The behaviour was persistent for all input AC voltages (V_ac) and complied with Ohm’s law (Figure 13a). On the contrary, the behaviour of the output power with the increasing load resistance was different (Figure 13b). This might be due to the reason that the current flowing at different load resistors is different. Thus, the calculated output power was not consistent.

By further examining Figure 13, it is highlighted that the extent of the applied input ac voltage (V_ac) substantially impacts the proposed circuit’s overall performance. At a higher V_ac, the output voltage (V_dc) and power became higher as well. The output voltage (V_dc) and power at different input voltages (1 V_ac–5 V_ac) over a 1 Hz excitation frequency and at a 100 KΩ load resistor are depicted in Figure 14a,b, respectively.

It is worth mentioning that the proposed circuit outperformed the voltage doubler circuit, where the output voltage (V_dc) and power generated by the proposed circuit are higher than the voltage doubler circuit in all scenarios. Considering that the principal objective of this study is to enhance the output voltage (V_dc) and power, this is accomplished by using the proposed circuit.

Table 5. Comparison of outputs of the circuits available in the previously published literature.

Circuit Sources	No. of Piezoelectric Devices	Input Voltage (Vac)	DC Voltage (Vdc)	Output Power (µ/mW)	External Power Supply
[35]	1	1.2	-	30 µW	YES
[36]	3	20	-	33 µW	YES
[15]	1	5	-	22 µW	NO
[27]	3	3.5	-	254 µW	YES
Proposed circuit	1	3	19	3.61 mW	NO

lists the generated output power of similar circuits published in the previous literature.

It was found that the proposed circuit outperformed various previously published literature circuits regarding the output voltage and power.

5. Conclusions

In this research, a self-powered dual-stage boost converter circuit was proposed and thoroughly studied to boost the low ac voltage generated by the piezoelectric device into dc in piezoelectric energy harvesting systems. The dual-stage boost converter circuit integrated a voltage doubler and a dc-dc boost converter as two stages (I & II) to function in both ac-dc and dc-dc conversion processes. In addition, it avoided the need for an expensive auxiliary circuit for effective operations. Due to using a single MOSFET, it reduced the stress across the switching process. In addition, the practical capability of the dual-stage boost converter circuit was verified using simulation and laboratory-based experiments. The proposed prototype converted a 3 V_ac and 50 Hz input ac voltage (V_ac) to 19 V_dc and achieved an output power of 3.61 mW under Test 1. Moreover, it converted a 5 V_ac and 1 Hz input ac voltage (V_ac) to 10.9 V_dc and achieved an output power of 0.396 mW under Test 2. The proposed circuit is proven to be exceptional compared to the existing literature circuits. The proposed circuit is suitable for the efficient energy conversion of vibrating piezoelectric devices for low-power portable/wireless devices. It is noted that the proposed circuit is limited to low-voltage applications only. For ultra-low voltages, the proposed prototype is not suitable, as the input voltage will be dissipated across circuit components, and there will be no output at the load. For future work, the modification of the dual-stage boost converter circuit to incorporate the non-linear process is recommended.