Impact of Transformer Topology on Short-Circuit Analysis in Distribution Systems with Inverter-Based Distributed Generations

Abstract

Distributed energy resources (DERs), recently introduced into distribution systems, are mainly inverter-based distributed generations (IBDGs), which have different short-circuit behaviors from conventional synchronous-based distributed generations (SBDGs). Hence, this study presents a comprehensive analysis of the short-circuit behaviors of distribution systems with IBDGs, based on sequence networks and superposition, from the perspectives of interconnected transformers, and observes the flow of zero-sequence fault currents with different transformer topologies. Moreover, two- and three-winding transformers with various bank connection types and groundings are investigated. It was concluded that the transformer topology and its grounding influence the fault current contribution in zero-sequence networks, and the high penetration of IBDGs alters the fault current magnitude and phase angles.

1. Introduction

Owing to the international efforts expended to cope with the climate crisis and the demand for non-carbon energy, the importance of renewable energy sources has increased, and the era of the global energy transition has begun. The energy transition is changing conventional energy systems, which have relied on fossil fuels such as coal and oil, into systems based on renewable energy, such as solar and wind [1,2,3,4,5]. While existing energy systems are centralized in power plants, renewable energy is installed in a distributed manner [6,7]. In other words, as renewable energy increases, distributed energy resources (DERs) have been increasingly used in distribution systems. For example, in Germany, 57% of all the solar energy plants installed in 2015 were connected to low-voltage distribution systems [8]. As a result, the effects of DERs are no longer negligible and thus cause various problems in distribution system planning and operation.

Traditional distribution systems have radial structures, thus maintaining unidirectional protection coordination, whereby fault sections are blocked by relays that monitor the magnitudes of fault currents. However, in view of their restructured forms, due to the transition to alternative energy sources, distribution systems comprise a growing number of DERs and thus contribute to reverse fault currents that eventually adversely affect the protection coordination response [9,10]. To solve this problem, distribution system operators must replace existing protective relays based on overcurrent with directional or adaptive ones. However, this upgrade would lead to high costs that would hinder the introduction of additional renewable energy technologies. Accordingly, a fault analysis that can accurately predict and assess the DER effect is essential.

Like a diesel generator, a conventional DER is a synchronous-based distributed generation (SBDG), which has a rotating component (i.e., a rotor) that transfers mechanical energy into the electrical one or vice versa. This SBDG maintains the terminal voltage, thereby working as a voltage source even in fault conditions. However, most renewable energy resources, such as photovoltaics and wind turbine generators, are inverter-based distributed generations (IBDGs), which are power-electronics-based devices that convert direct currents to alternating currents and operate as current sources at a steady state [11,12,13,14]. Therefore, the fault current magnitudes of IBDGs are equal to one or two times their rated currents and are very small compared with those of typical SBDGs [15,16,17]. Kou et al. [18] showed that the solar farm might work as a negative-sequence source during faults, pointing out that the fault response of solar farms can interfere with conventional relays.

Recently, the IBDG has improved based on grid-support functions or control methods. A wind turbine control scheme may suppress the negative-sequence component of short-circuit currents and thus requires the injecting of the negative-sequence current [19]. Similarly, Liu [20] changed the phase angle of the fault current to minimize the system’s fault current. However, as many inverters in the field have no such functional capabilities, the distribution system operator still needs to adequately perform fault analysis, which calculates short-circuit currents under various fault conditions.

Many fault analysis methods that reflect the characteristics of IBDGs have been studied [21,22,23,24,25]. In [21], the authors calculated the fault current contributions due to IBDGs using the forward–backward sweep method for the steady-state analysis and differential equations for the transient analysis. Kim [22] presented a calculation method for the fault current contribution of IBDGs at balanced conditions, whereby the IBDGs were considered to be limited or unlimited current sources. Mathur et al. [23] considered various voltage-dependent control modes of IBDGs for the short-circuit analysis of radial and meshed distribution systems. Additionally, in [24], it was highlighted that the fault current contribution due to unbalanced IBDG sources should be considered to achieve accurate short-circuit analysis. Li and Wang [25] reduced the fault current computation time in systems with IBDGs.

Table 1. Literature survey of short-circuit analysis.

Previous Studies	Summary
[19]	Observed that the wind turbine controller may reduce the negative-sequence component of fault currents; injected negative-sequence currents
[20]	Presented the method that changed the fault current phase angle to minimize the system fault current
[21]	Quantified the fault current contributions due to IBDGs using steady-state and transient analyses
[22]	Conducted fault analysis due to IBDGs under balanced conditions
[23]	Considered IBDG’s voltage-dependent control modes for short-circuit analysis of radial and meshed networks
[24]	Considered fault contributions from unbalanced IBDGs
[25]	Improved computational speed for fault analysis with IBDGs

summarizes the literature survey results of short-circuit analyses. Several researchers [19,20,21,22,23,24,25] have not considered the interconnection transformer topology, which determines how to link three-phase windings among terminals (e.g., in delta or wye). This transformer topology is a critical factor affecting zero-sequence fault current flows into the fault point. Therefore, for accurate fault analysis of systems with IBDGs, it is necessary to treat DERs as current sources and to consider the interconnection transformer topology. In this sense, this study proposes a comprehensive short-circuit analysis for power grids with IBDGs that considers the interconnection transformer topology. Based on this analysis, increased fault analysis accuracy can be achieved for various interconnection transformer topologies, which can help to revise the grid codes and protective schemes.

Many researchers and field operators have developed methods that can calculate the fault currents of transmission systems with synchronous-based generations, as described in [26]. However, the methodology used to deal with the systems with IBDGs has not matured yet. In this study, a fault analysis was conducted on the modified system of [26] by replacing synchronous generations with IBDGs. It is important to emphasize that the fault analysis method presented in this study can also be applied to distribution systems. A fault analysis based on the imbalanced operation and unsymmetric structure of distribution systems was conducted by Cho et al. [27].

This paper presented a calculation method of the fault currents of unbalanced distribution systems. Overall, the novelties and contributions of this study are as follows:

• A detailed approach that can conduct fault analyses with IBDGs is presented while considering the interconnection transformer topology that can impact the symmetric components of fault currents. This thorough approach helps engineers or researchers to study any types of distribution systems with SBDGs or IBDGs.
• Different fault behaviors caused by various transformer topologies are studied, including D-Yg, Yg-D, Yg-D-Yg, D-D-Yg, and Y-D-Yg.
• The transformer grounding impact on the zero-sequence fault current contributions of DERs and the total fault current are analyzed.
• Ultimately, this study can give insights on how to practically design a transformer topology and its grounding in distribution systems.

The rest of this paper is organized as follows. Section 2 first describes a typical distribution system model and the sequence networks of various transformer bank connections, and then, Section 3 investigates the relationships between the transformer topology and the fault current contribution. In Section 4, this approach studies how the fault behaviors of IBDGs differ from those of the conventional SBDGs and then analyzes the impacts of the interconnection transformer topology on short-circuit flows in Section 5, drawing key findings at the ends of Section 4 and Section 5. Finally, the conclusions are presented in Section 6.

2. Materials and Methods

This section describes the basic model and explains the relationship between transformer topology and short-circuit analysis. Figure 1 shows a general power system to be studied in this work. G₂ represents a distributed generator (DG), which can be an SBDG or an IBDG in this work, while [27] tested an SBDG only.

The voltage rating of the bus on which the G2 is connected is 230 kV, which is not a reasonable magnitude for DERs. However, this system, an example of [26], is more familiar to field operators; hence, it is used in this study. Additionally, this study performs a fault analysis with a different interconnection transformer topology. Indeed, the shape of the zero-sequence network changes according to the bank connection. In the case of the two-winding transformers, there are eight bank connection types, as shown in

Table 2. Bank connection types of a two-winding transformer. The symbols H and L denote the high- and low-voltage sides, respectively. The symbol N indicates a neutral line. The numbers 1, 2, and 0 represent the positive-, negative-, and zero-sequence networks, respectively.

Transformer Bank Connection	Positive/Negative Sequence	Zero Sequence
	Same as above
	Same as above
	Same as above
	Same as above
	Same as above
	Same as above
	Same as above

.

Note that all the bank connection shapes in the positive/negative sequences are the same. Only the zero sequences differ in their connection type. In the case of the grounded fault, the zero-sequence connection of a transformer can become a path for fault currents. Hence, the transformer topology can affect the fault current contribution of DGs.

Similarly, the bank connection types of a three-winding transformer are shown in

Table 3. Bank connection types of a three-winding transformer.

Transformer Bank Connection	Positive/Negative Sequence	Zero Sequence
	Same as above
	Same as above

The symbols H, M, and L denote the high-, medium-, and low-voltage sides, respectively. These can also be expressed as P, S, and T, which indicate the primary, secondary, and tertiary sides. In general, the tertiary side is the lowest voltage side.

. As in the two-winding transformers, only the zero sequence differs according to the bank connection type. The relationship between the transformer topology and the zero-sequence connection discussed in this section affects the fault current contribution, as described in Section 3.

3. Impact of Interconnection Transformer Topology on Fault Current Contribution

This section investigates how the interconnection transformer topology impacts the symmetric components of fault currents, especially zero-sequence fault currents. If the grid-side winding is not grounded, the zero-sequence fault currents cannot flow through the transformer to the fault location. Whether this zero-sequence component flows into the grid is closely related to the protection coordination, such as grounding coordination and relay settings. Hence, the interconnection transformer topology in power grids with DERs is critical from the protection perspective. The behaviors of the zero-sequence fault currents for the different transformer topologies are visualized in

Table 4. Zero-sequence fault current behaviors according to the transformer topology.

Transformer Type	Topology	Fault Current Behavior in the Zero-Sequence Network
Two-winding transformer	D-Yg
	Yg-D
Three-winding transformer	Y-D-Yg
	D-D-Yg
	Yg-D-Yg

.

As described in Table 4, the transformers with the D-Yg, Y-D-Yg, or D-D-Yg topologies, which are not grounded at the grid side, prevent the zero-sequence fault currents of DER from flowing into the fault locations. This way, the interconnection transformer topology affects the zero-sequence fault current contribution of the DERs. Considering that IBDGs have a small fault current contribution, variations in the zero-sequence fault currents may confuse the operation of the protective relays.

Moreover, it can be analyzed similarly when a load is connected to the line. Most loads are connected to the system through the wye connection, but some loads are through the delta one. Note that in the sequence network, a wye-connected load is represented by positive-, negative-, and zero-sequence impedances. In contrast, a delta-connected load only has positive- and negative-sequence impedances, which affects fault analysis and relay operations. Despite the impact of the load topology, this study focuses on the transformer topology.

4. Investigation of Fault Behaviors of the IBDG

This section analyzes the differences in the fault analysis for each SBDG and IBDG. Although [26] describes the fault analysis with an SBDG only, this study analyzes a system with an IBDG and compares the two cases. The superposition principle is used for the fault analysis, and the IBDG has the same capacity as the SBDG for rigorous comparison.

4.1. Short-Circuit Analysis of the SBDG-Based System

The test system analyzed in this study is shown in Figure 1. This study assumes that a fault occurs in the transmission line to observe how the DER contributes to the fault current. There exists a step-up transformer with a delta/Yg connection between buses 1 and 2. The high-voltage side carries 115 kV, and the low-voltage side on which a generator is connected carries 13.8 kV. There is also an interconnection transformer between buses 4 and 5, and its winding shape is Yg/Delta/Yg. Its high-voltage side, at which a DG is connected, is 230 kV, and the low-voltage side is 115 kV. Figure 2 represents the sequence networks of Figure 1, and

Table 5. Model parameters of the test system in per unit (pu).

Sequence	Impedance of G1	Impedance of T1	Impedance of Line	Secondary Impedance of T2	Primary Impedance of T2	Tertiary Impedance of T2	Impedance of G2
Positive (symbol)	$\mathrm{j}0.2\left(X_{G1}^{\left(1\right)}\right)$	$\mathrm{j}0.1375\left(X_{T1}^{\left(1\right)}\right)$	$\mathrm{j}0.0907\left(X_L^{\left(1\right)}\right)$	$-\mathrm{j}0.0083\left(X_{T2S}^{\left(1\right)}\right)$	$\mathrm{j}0.0450\left(X_{T2P}^{\left(1\right)}\right)$	$\mathrm{j}0.1950\left(X_{T2T}^{\left(1\right)}\right)$	$\mathrm{j}0.03\left(X_{G2}^{\left(1\right)}\right)$
Negative (symbol)	$\mathrm{j}0.2\left(X_{G1}^{\left(2\right)}\right)$	$\mathrm{j}0.1375\left(X_{T1}^{\left(2\right)}\right)$	$\mathrm{j}0.0907\left(X_L^{\left(2\right)}\right)$	$-\mathrm{j}0.0083\left(X_{T2S}^{\left(2\right)}\right)$	$\mathrm{j}0.0450\left(X_{T2P}^{\left(2\right)}\right)$	$\mathrm{j}0.1950\left(X_{T2T}^{\left(2\right)}\right)$	$\mathrm{j}0.03\left(X_{G2}^{\left(2\right)}\right)$
Zero (symbol)	$\mathrm{j}0.2\left(X_{G1}^{\left(0\right)}\right)$	$\mathrm{j}0.1375\left(X_{T1}^{\left(0\right)}\right)$	$\mathrm{j}0.3062\left(X_L^{\left(0\right)}\right)$	$-\mathrm{j}0.0083\left(X_{T2S}^{\left(0\right)}\right)$	$\mathrm{j}0.0450\left(X_{T2P}^{\left(0\right)}\right)$	$\mathrm{j}0.1950\left(X_{T2T}^{\left(0\right)}\right)$	$\mathrm{j}0.04\left(X_{G2}^{\left(0\right)}\right)$

lists the model parameters of the test system.

As the single-line-to-ground (SLG) fault is on bus 2, the impedance observed by bus 2 is required for the short-circuit analysis. Hence, the Z bus matrix of the system needs to be constructed. Although the test system has five buses, as shown in Figure 1, the middle part of the three-winding transformer is, for convenience, viewed as a pseudo bus and becomes the sixth bus. The fifth column and row of the matrix components are assigned to the pseudo bus, and the sixth column and row refer to bus 5.

In general, the required impedance matrix can be obtained from Equations (1) and (2), and the fault impedance observed from bus 2, i.e., element (2, 2) of the matrix, is required for the analysis. Alternatively, the fault impedance can also be calculated, as shown in Equations (3) and (4).

$$Z_{\left(Bus\right)}^{\left(1\right)}=Z_{\left(Bus\right)}^{\left(2\right)}=\left[\begin{array}{cccccc}0.1317i& 0.0847i& 0.0537i& 0.0228i& 0.0256i& 0.0102i\\ 0.0847i& 0.1430i& 0.0907i& 0.0384i& 0.0432i& 0.0173i\\ 0.0537i& 0.0907i& 0.1151i& 0.0488i& 0.0548i& 0.0219i\\ 0.0228i& 0.0384i& 0.0488i& 0.0591i& 0.0665i& 0.0266i\\ 0.0256i& 0.0432i& 0.0548i& 0.0665i& 0.0654i& 0.0262i\\ 0.0102i& 0.0173i& 0.0219i& 0.0266i& 0.0262i& 0.0285i\end{array}\right]$$

(1)

$$Z_{\left(Bus\right)}^{\left(0\right)}=\left[\begin{array}{cccccc}0.2000i& 0.0000i& 0.0000i& 0.0000i& 0.0000i& 0.0000i\\ 0.0000i& 0.1139i& 0.0613i& 0.0087i& 0.0102i& 0.0048i\\ 0.0000i& 0.0613i& 0.1978i& 0.0282i& 0.0328i& 0.0154i\\ 0.0000i& 0.0087i& 0.0282i& 0.0476i& 0.0554i& 0.0261i\\ 0.0000i& 0.0102i& 0.0328i& 0.0554i& 0.0548i& 0.0258i\\ 0.0000i& 0.0048i& 0.0154i& 0.0261i& 0.0258i& 0.0333i\end{array}\right]$$

(2)

$${\mathrm{Z}}_{22}^{\left(0\right)}={\mathrm{X}}_{\mathrm{T}1}^{\left(0\right)}//\left\{{\mathrm{X}}_{\mathrm{T}2\mathrm{T}}^{\left(0\right)}//\left({\mathrm{X}}_{\mathrm{T}2\mathrm{P}}^{\left(0\right)}+{\mathrm{X}}_{\mathrm{G}2}^{\left(0\right)}\right)+2\times {\mathrm{X}}_{\mathrm{L}}^{\left(0\right)}+{\mathrm{X}}_{\mathrm{T}2\mathrm{S}}^{\left(0\right)}\right\}=0.1139\angle {90.00}^{°}pu$$

(3)

$${\mathrm{Z}}_{22}^{\left(1\right)}={\mathrm{Z}}_{22}^{\left(2\right)}=\left({\mathrm{X}}_{\mathrm{G}1}^{\left(1\right)}+{\mathrm{X}}_{\mathrm{T}1}^{\left(1\right)}\right)//\left(2\times X_L^{\left(1\right)}+X_{T2S}^{\left(1\right)}+X_{T2P}^{\left(1\right)}+X_{G2}^{\left(1\right)}\right)=0.1430\angle {90.00}^{°}pu,$$

(4)

where $Z_{\left(Bus\right)}^{\left(1\right)}$, $Z_{\left(Bus\right)}^{\left(2\right)}$, and $Z_{\left(Bus\right)}^{\left(0\right)}$ are the impedance matrices of the positive, negative, and zero sequences, respectively. $Z_{\left(22\right)}^{\left(1\right)}$, $Z_{\left(22\right)}^{\left(2\right)}$, and $Z_{\left(22\right)}^{\left(0\right)}$ are the positive-, negative-, and zero-sequence impedances observed from bus 2, respectively.

Using Equations (1)–(4), the fault current could be obtained as follows,

$$\frac{1}{3}{\mathrm{I}}_f=\left(V_{G1}^{\left(1\right)}+V_{G2}^{\left(1\right)}\right)/\left(Z_{22}^{\left(1\right)}+Z_{22}^{\left(2\right)}+Z_{22}^{\left(0\right)}\right)=2.4993\angle -{59.97}^{°}pu$$

(5)

where I_f is the total fault current, and $V_{G1}^{\left(1\right)}$ and $V_{G2}^{\left(1\right)}$ are the positive-sequence voltage sources of G1 and G2, respectively. The symmetrical components of the fault current from bus 1 to bus 2 can be calculated based on the current division rule, thus yielding ${\mathrm{I}}_{12}^{\left(0\right)}=2.0742\angle -{59.96}^{°}pu$ and ${\mathrm{I}}_{12}^{\left(1\right)}={\mathrm{I}}_{12}^{\left(2\right)}=1.0590\angle -{59.96}^{°}pu$, where ${\mathrm{I}}_{12}^{\left(1\right)}$, ${\mathrm{I}}_{12}^{\left(2\right)}$, and ${\mathrm{I}}_{12}^{\left(0\right)}$ are the positive-, negative-, and zero-sequence fault currents from bus 1 to 2, respectively. Similarly, the positive-, negative-, and zero-sequence fault currents from bus 3 to 2, which are denoted by ${\mathrm{I}}_{32}^{\left(1\right)}$, ${\mathrm{I}}_{32}^{\left(2\right)}$, and ${\mathrm{I}}_{32}^{\left(0\right)}$, respectively, can be computed, yielding ${\mathrm{I}}_{32}^{\left(0\right)}=0.4251\angle -{60.00}^{°}pu$ and ${\mathrm{I}}_{32}^{\left(1\right)}={\mathrm{I}}_{32}^{\left(2\right)}=1.4403\angle -{59.97}^{°}pu$. All these results are represented in Figure 3.

4.2. Short-Circuit Analysis of the IBDG-Based System

This section presents the fault analysis of the test system with an IBDG. The system model in Figure 4 is identical to that in Figure 2, where an IBDG is used instead of the SBDG. The rated power of the IBDG is 100 MVA, which is the same as that of the SBDG. The other system parameters are all the same, as shown in Figure 2.

Table 6. Model parameters of the simulations in pu.

Sequence	Impedance of G1	Impedance of T1	Impedance of Line	Secondary Impedance of T2	Primary Impedance of T2	Tertiary Impedance of T2	Norton Impedance of G2
Positive (symbol)	$\mathrm{j}0.2\left(X_{G1}^{\left(1\right)}\right)$	$\mathrm{j}0.1375\left(X_{T1}^{\left(1\right)}\right)$	$\mathrm{j}0.0907\left(X_L^{\left(1\right)}\right)$	$-\mathrm{j}0.0083\left(X_{T2S}^{\left(1\right)}\right)$	$\mathrm{j}0.0450\left(X_{T2P}^{\left(1\right)}\right)$	$\mathrm{j}0.1950\left(X_{T2T}^{\left(1\right)}\right)$	$\mathrm{10,000}\left(Z_{G2}^{\left(1\right)}\right)$
Negative (symbol)	$\mathrm{j}0.2\left(X_{G1}^{\left(2\right)}\right)$	$\mathrm{j}0.1375\left(X_{T1}^{\left(2\right)}\right)$	$\mathrm{j}0.0907\left(X_L^{\left(2\right)}\right)$	$-\mathrm{j}0.0083\left(X_{T2S}^{\left(2\right)}\right)$	$\mathrm{j}0.0450\left(X_{T2P}^{\left(2\right)}\right)$	$\mathrm{j}0.1950\left(X_{T2T}^{\left(2\right)}\right)$	$\mathrm{10,000}\left(Z_{G2}^{\left(2\right)}\right)$
Zero (symbol)	$\mathrm{j}0.2\left(X_{G1}^{\left(0\right)}\right)$	$\mathrm{j}0.1375\left(X_{T1}^{\left(0\right)}\right)$	$\mathrm{j}0.3062\left(X_L^{\left(0\right)}\right)$	$-\mathrm{j}0.0083\left(X_{T2S}^{\left(0\right)}\right)$	$\mathrm{j}0.0450\left(X_{T2P}^{\left(0\right)}\right)$	$\mathrm{j}0.1950\left(X_{T2T}^{\left(0\right)}\right)$	$\mathrm{10,000}\left(Z_{G2}^{\left(0\right)}\right)$

lists the model parameters of the test system with the IBDG.

4.2.1. Decomposition and Short-Circuit Analysis: Voltage Source

This section explains the superposition principle applied for the short-circuit analysis of the test system. Figure 4b can be decomposed into two circuits, wherein each circuit is excited by a voltage or a current source. Figure 5 represents a decomposed circuit with a voltage source observed only at the positive-sequence network. Note that there is a Norton equivalent impedance at each sequence network for the IBDG because IBDGs operate similarly to current sources in the steady state.

The procedure to compute the fault current is similar to that used for the cases with the SBDG. First, the Z bus matrix should be obtained. The Norton equivalent resistance is located between bus 5 and the ground, and its magnitude is set to 10 kΩ.

$$Z_{\left(Bus\right)}^{\left(1\right)}=Z_{\left(Bus\right)}^{\left(2\right)}=\left[\begin{array}{cccccc}0.2000i& 0.2000i& 0.2000i& 0.2000i& 0.2000i& 0.2000i\\ 0.2000i& 0.3375i& 0.3375i& 0.3375i& 0.3375i& 0.3375i\\ 0.2000i& 0.3375i& 0.4282i& 0.4282i& 0.4282i& 0.4282i\\ 0.2000i& 0.3375i& 0.4282i& 0.5189i& 0.5189i& 0.5189i\\ 0.2000i& 0.3375i& 0.4282i& 0.5189i& 0.5106i& 0.5106i\\ 0.2000i& 0.3375i& 0.4282i& 0.5189i& 0.5106i& 0.5556i\end{array}\right]$$

(6)

$$Z_{\left(Bus\right)}^{\left(0\right)}=\left[\begin{array}{cccccc}0.2000i& 0.0000i& 0.0000i& 0.0000i& 0.0000i& 0.0000i\\ 0.0000i& 0.1173i& 0.0724i& 0.0274i& 0.0286i& 0.0286i\\ 0.0000i& 0.0724i& 0.2335i& 0.0884i& 0.0924i& 0.0924i\\ 0.0000i& 0.0274i& 0.0884i& 0.1495i& 0.1561i& 0.1561i\\ 0.0000i& 0.0286i& 0.0924i& 0.1561i& 0.1544i& 0.1544i\\ 0.0000i& 0.0286i& 0.0924i& 0.1561i& 0.1544i& 0.1994i\end{array}\right]$$

(7)

$${\mathrm{Z}}_{22}^{\left(0\right)}={\mathrm{X}}_{\mathrm{T}1}^{\left(0\right)}//\left\{{\mathrm{X}}_{\mathrm{T}2\mathrm{T}}^{\left(0\right)}//\left({\mathrm{X}}_{\mathrm{T}2\mathrm{P}}^{\left(0\right)}+Z_{\mathrm{G}2}^{\left(0\right)}\right)+2\times {\mathrm{X}}_{\mathrm{L}}^{\left(0\right)}+{\mathrm{X}}_{\mathrm{T}2\mathrm{S}}^{\left(0\right)}\right\}=0.1173\angle {90.00}^{°}pu$$

(8)

$${\mathrm{Z}}_{22}^{\left(1\right)}={\mathrm{Z}}_{22}^{\left(2\right)}=\left({\mathrm{X}}_{\mathrm{G}1}^{\left(1\right)}+{\mathrm{X}}_{\mathrm{T}1}^{\left(1\right)}\right)//\left(2\times X_L^{\left(1\right)}+X_{T2S}^{\left(1\right)}+X_{T2P}^{\left(1\right)}+Z_{G2}^{\left(1\right)}\right)=0.3375\angle {90.00}^{°}pu$$

(9)

where $Z_{\left(Bus\right)}^{\left(1\right)}$, $Z_{\left(Bus\right)}^{\left(2\right)}$, and $Z_{\left(Bus\right)}^{\left(0\right)}$ are the impedance matrices of the positive, negative, and zero sequences, respectively. $Z_{\left(22\right)}^{\left(1\right)}$, $Z_{\left(22\right)}^{\left(2\right)}$, and $Z_{\left(22\right)}^{\left(0\right)}$ are the positive-, negative-, and zero-sequence impedances observed from bus 2, respectively.

Using Equations (6)–(9), the fault current could be obtained as follows,

$$\frac{1}{3}{\mathrm{I}}_f=V_{G1}^{\left(1\right)}/\left(Z_{22}^{\left(1\right)}+Z_{22}^{\left(2\right)}+Z_{22}^{\left(0\right)}\right)=1.2621\angle -{60.00}^{°}pu$$

(10)

where I_f is the total fault current, and $V_{G1}^{\left(1\right)}$ and $V_{G2}^{\left(1\right)}$ are the positive-sequence voltage sources of G1 and G2, respectively. The symmetrical components of the fault current from bus 1 to bus 2 can be calculated based on the current division rule, thus yielding ${\mathrm{I}}_{12}^{\left(0\right)}=1.0781\angle -{59.96}^{°} pu$ and ${\mathrm{I}}_{12}^{\left(1\right)}={\mathrm{I}}_{12}^{\left(2\right)}=1.2619\angle -{59.97}^{°} pu$, where ${\mathrm{I}}_{12}^{\left(1\right)}$, ${\mathrm{I}}_{12}^{\left(2\right)}$, and ${\mathrm{I}}_{12}^{\left(0\right)}$ are the positive-, negative-, and zero-sequence fault currents from bus 1 to 2, respectively.

Similarly, the current from bus 3 to 2 can be calculated, as shown in Figure 6. It can be observed from Figure 6 that there is a minor fault current contribution from the IBDG side.

4.2.2. Decomposition and Short-Circuit Analysis: Current Source

Figure 7 shows the sequence equivalent circuit of the decomposed circuit based on the current source, an IBDG. The current source can be observed in the positive sequence, and the other parameters are the same as in Figure 5.

The fault current of the current source is divided into two sides: one flows to bus 2, the fault location, and the other flows to the zero/negative-sequence circuit. The positive-sequence fault current from bus 1 is calculated. By subtracting the result from the total fault current, the zero/negative-sequence current can be obtained. As the rated power of the IBDG is 100 MVA, the current in the positive-sequence equivalent circuit is 1.0 pu. As the current source is the only source in the sequence equivalent circuit, it can be assumed that the fault current from the IBDG has the same magnitude as the rated current. As a result, the fault current supplied to the fault point is obtained by subtracting the current flowing from bus 1 to 2, $I_{12}^{\left(1\right)}$, from the total current, $I_{total}$.

$$I_{12}^{\left(1\right)}=\left(Z_{22}^{\left(2\right)}+Z_{22}^{\left(0\right)}\right)/\left(X_{G1}^{\left(1\right)}+X_{T1}^{\left(1\right)}+Z_{22}^{\left(2\right)}+Z_{22}^{\left(0\right)}\right)\times 1\angle -{150.00}^{°}=0.5740\angle -{150.00}^{°}pu$$

(11)

$$I_{total}-I_{12}^{\left(1\right)}=1.0\angle -{150.00}^{°}-0.5740\angle -{150.00}^{°}=0.4259\angle {30.00}^{°}pu$$

(12)

The fault currents of the zero- and negative-sequence networks can be obtained using the current division rule, and the results are shown in Figure 8.

4.2.3. Superposition

As shown in Figure 6 and Figure 8, the results of each source are superposed according to the superposition principle. As a result, Figure 9 describes the superposed fault current.

For a more detailed analysis, the detailed voltage and current values of the system model with an IBDG are considered.

Table 7. Voltage values at each bus in the superposed circuit.

Bus No.	Va		Vb		Vc		3V0		V0		V1		V2
	Magnitude (Mag) (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
1	0.7105	−11.89	0.6201	−92.03	1.0199	131.31	0.0000	0	0.0000	0	0.7565	8.73	0.2664	−101.35
2	0.0000	0	0.9438	−55.75	0.9439	153.05	0.4695	−131.35	0.1565	−131.35	0.6061	48.65	0.4496	−131.35
3	0.1239	92.61	0.9890	−48.01	0.9343	155.03	0.2890	−131.36	0.0963	−131.36	0.6409	56.36	0.4496	−131.35
4	0.2477	92.61	1.0504	−41.06	0.9259	157.05	0.1086	−131.38	0.0362	−131.38	0.6860	63.16	0.4496	−131.36
5	0.2797	96.30	1.0783	−39.86	0.9317	159.39	0.1135	−131.38	0.0378	−131.38	0.7067	65.65	0.4496	−131.36

lists all the voltages in the superposed circuit.

Given the SLG on phase A, the phase-A voltage at bus 2 is zero. Note that more attention should be paid to the current magnitude in terms of the system fault and its protection coordination. In this manner, the currents flowing between the buses and transmitted to the fault point are listed in

Table 8. Current values through the lines in the superposed circuit.

From	To	Ia		Ib		Ic		3I0		I0		I1		I2
Bus No.	Bus No.	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
1	2	3.6084	−56.54	1.1375	97.35	0.8107	−27.30	3.4142	−41.31	1.1381	−41.31	1.3860	−84.44	1.3321	−41.32
2	F	3.9962	−41.32	0.0000	0.00	0.0000	0.00	3.9962	−41.32	1.3321	−41.32	1.3321	−41.32	1.3321	−41.32
3	2	1.0779	20.18	1.1375	−82.65	0.8107	152.70	0.5820	−41.35	0.1940	−41.35	1.0000	30.00	0.0000	48.64
4	3	1.0779	20.18	1.1375	−82.65	0.8107	152.70	0.5820	−41.35	0.1940	−41.35	1.0000	30.00	0.0000	48.64
5	4	1.0001	30.00	1.0000	−90.00	1.0000	150.00	0.0000	48.62	0.0000	48.62	1.0000	30.00	0.0000	48.64

.

The current flowing from bus 2 to the point of failure is the total fault current. The phase-A current has a relatively large value, whereas the phase-B and -C currents have almost zero values. The IBDG impact analysis must consider the magnitude of the current flowing from bus 3 to 2, which indicates the IBDG’s fault current contribution. It can be observed that the values are either zero or very small, especially for the zero and negative sequences. These zero or small values are attributed to the fact that the Norton equivalent resistance in the IBDG model, which has a very large value compared with the line impedance, is inserted in the sequence equivalent circuit. This fact has two implications for us. First, according to the interconnection transformer of the IBDG winding method, the effect of the fault current may vary because the zero-sequence equivalent circuit of the transformer has a different shape depending on the winding method. Depending on whether the fault current flows through the zero-sequence network, the fault effect may vary. Second, the IBDG’s negative-sequence fault current has a small value owing to the high value of Norton’s equivalent resistance, thus indicating that changes are needed in the setting values of the protective relays; these currently rely on negative-sequence fault currents. In this study, the test system and the DG are connected through a three-winding transformer with a winding of Yg/D/Yg. As a result, the zero-sequence currents from the DG circulate in the delta windings. Overall, the fault effects of DGs may vary depending on the winding method.

4.3. Comparison of the SBDG and IBDG Cases

For the comparison of the fault contributions of the SBDG and IBDG, their results are shown in Figure 10. The direction and number of arrows indicate the current flow and magnitude, respectively.

It can be concluded that the fault current of the IBDG is smaller than that of the SBDG. As mentioned earlier, the IBDG operates similarly to a current source at the steady state. Thus, the magnitude of the fault current is limited. In addition, the negative- and zero-sequence circuits of the IBDG show that the corresponding fault current is zero or very small. It can also be observed that the Norton equivalent resistance is large enough to block the fault current. Figure 11 shows the currents in the ABC networks in pu. For the engineers who deal with practical systems, the results expressed in amperes are also shown in Figure 12. The figures also clearly show the calculations of the fault current of the three-winding transformer.

4.4. Accuracy Test

The previous sections established a fault analysis method in the system, wherein the IBDG was connected, and compared the analyzed results with those of the SBDG case. For the accuracy test, the same simulation was conducted through PSCAD/EMTDC, a commercial electromagnetic transient analysis program. The delta side of G1 lags the Y side, and the fault occurs at 0.5 s. The resulting values are converted to positive-, negative-, and zero-sequence values in PSCAD/EMTDC. The transmission lines are modeled using pi sections, and their resistances and capacitances are not zero but have marginal values, which cause a slight error. However, these errors are insignificant. The accuracy of the short-circuit analysis performed in this study is validated, as indicated in

Table 9. Accuracy test results between MATLAB code and PSCAD/EMTDC. Note that the magnitude of 0.0000 represents a very small number.

		MATLAB Code (Frequency Domain)						PSCAD/EMTDC (Time Domain)
		V0		V1		V2		V0		V1		V2
Voltage	Bus	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
	2	0.1565	−131.35	0.6061	48.65	0.4496	−131.35	0.1576	−132.40	0.6067	48.41	0.4491	−133.27
	3	0.0963	−131.36	0.6409	56.36	0.4496	−131.35	0.0971	−130.96	0.6443	56.00	0.4493	−131.29
	4	0.0362	−131.38	0.6860	63.16	0.4496	−131.35	0.0365	−124.72	0.6912	62.67	0.4489	−131.28
		MATLAB code (Frequency Domain)						PSCAD/EMTDC (Time Domain)
		I0		I1		I2		I0		I1		I2
Current	Bus	Mag (pu)	Phase angle (°)	Mag (pu)	Phase angle (°)	Mag (pu)	Phase angle (°)	Mag (pu)	Phase angle (°)	Mag (pu)	Phase angle (°)	Mag (pu)	Phase angle (°)
	1→2(F)	3.4142	−41.31	1.3860	−84.44	1.3321	−41.32	3.4322	−42.37	1.3841	−84.36	1.3404	−41.27
	3→2(F)	0.5820	−41.35	1.0000	30.00	0.0000	48.64	0.5847	−34.71	0.9980	30.11	0.0015	−41.36
	4→3	0.5820	−41.35	1.0000	30.00	0.0000	48.64	0.5862	−34.72	0.9942	30.50	0.0067	−41.27

.

Table 10. Accuracy of the proposed short-circuit analysis.

Bus Location	Fault Current Magnitude in MATLAB Code	Bus Location	Fault Current Magnitude in MATLAB Code
2	3.4142	3.4322	0.52
3	0.5820	0.5847	0.46
4	0.5820	0.5862	0.76

compares the results of the short-circuit analysis, which is implemented using MATLAB and PSCAD/EMTDC. The differences during the SLG fault are 0.52%, 0.46%, and 0.72% at buses 2, 3, and 4, respectively. The errors are mainly due to the nonzero resistance of the transmission lines in PSCAD/EMTDC. Thus, it is concluded that the approach presented in this study can analyze the contributions of IBDGs with high accuracy.

5. Short-Circuit Analysis with Consideration of the Interconnection Transformer

5.1. Case Study with Different Topologies of the Interconnection Transformer

This section presents short-circuit analyses with the different topologies of the interconnection transformer. In Section 4, an interconnection transformer, expressed by T2, had two grounded Y windings at the primary and secondary sides and a delta winding at the tertiary side (i.e., Yg-D-Yg). This section compares its results with those of the different topologies, D-Yg, Yg-D, Y-D-Yg, and D-D-Yg. As explained in Section 2, transformers with different topologies only differ in the zero-sequence network.

Table 11. Sequence networks of D-Yg, Yg-D, and Y-D-Yg/D-D-Yg.

Transformer Bank Connection	Sequence Network
D-Yg
Yg-D
Y-D-Yg
D-D-Yg

shows the sequence networks of a transformer with Y-D-Yg or D-D-Yg topologies interconnected on the DG side. The two topologies result in the same outcomes. In the case of the two-winding transformers, the same impedances of Generator 1 are used in the analysis. Note that the higher voltage side is the DG side.

The short-circuit can be analyzed through the sequence network equivalent circuits presented above. The zero sequence of the D-Yg transformer provides no path for the fault current from the DG bus, and therefore, the zero-sequence fault current has a very small value. The results of the D-Yg topology are presented in

Table 12. Voltage values at each bus in the case of the D-Yg topology.

Bus No.	Va		Vb		Vc		3V0		V0		V1		V2
	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
1	0.7161	−11.09	1.0198	131.31	1.0198	131.31	0.0000	0	0.0000	0.00	0.7629	8.82	0.2598	−101.35
2	0.0000	0	0.9525	154.99	0.9525	154.99	0.5358	−131.35	0.1786	−131.35	0.6170	48.65	0.4384	−131.35
3	0.0907	120.00	0.9646	160.36	0.9646	160.36	0.5358	−131.35	0.1786	−131.35	0.6517	56.23	0.4384	−131.35
4	0.1815	120.00	0.9850	165.56	0.9850	165.56	0.5358	−131.35	0.1786	−131.35	0.6966	62.94	0.4384	−131.35
5	0.8455	132.41	0.5058	−170.16	0.505	−170.16	0.0000	0.00	0.0000	0.00	0.7800	101.45	0.4384	−161.35

and

Table 13. Current values through the lines in the cases of the D-Yg topology.

From	To	Ia		Ib		Ic		3I0		I0		I1		I2
Bus No.	Bus No.	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
1	2	1.6383	−65.13	2.6358	116.81	1.0000	−60.00	0.0000	0.00	0.0000	0.00	1.3625	−115.41	1.2990	−11.35
2	F	3.8970	−41.35	0.0000	0.00	0.0000	0.00	3.8970	−41.35	1.2990	−41.35	1.2990	−41.35	1.2990	−41.35
3	2	1.0001	−150.00	1.0000	89.99	1.0000	−30.00	0.0000	0.00	0.0000	0.00	1.0000	−150.00	0.0000	−131.35
4	3	1.0001	−150.00	1.0000	89.99	1.0000	−30.00	0.0000	0.00	0.0000	0.00	1.0000	−150.00	0.0000	−131.35
5	4	1.0001	−150.00	1.0000	89.99	1.0000	−30.00	0.0000	0.00	0.0000	0.00	1.0000	−150.00	0.0000	−131.35

. Note that the D-Yg transformer in this section indicates a Dy1 transformer with grounding. The other types of Dy transformers, such as Dy11, show results similar to the D-Yg transformer case except for the phase shifts.

Contrary to the sequence network of the D-Yg transformer, the zero sequence of the Yg-D transformer provides a path for the fault current from the DG bus. Hence, the zero-sequence fault current is larger than the D-Yg transformer. The results of the Yg-D topology are presented in

Table 14. Voltage values at each bus in the case of the Yg-D topology.

Bus No.	Va		Vb		Vc		3V0		V0		V1		V2
	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
1	0.7090	−12.10	0.6177	−91.85	1.0198	131.31	0.0000	0.00	0.0000	0.00	0.7547	8.71	0.2681	−101.35
2	0.0000	0.00	0.9415	−55.23	0.9415	152.53	0.4516	−131.35	0.1505	−131.35	0.6030	48.65	0.6030	48.65
3	0.1352	88.16	0.9863	−46.62	0.9276	153.61	0.2258	−131.36	0.0753	−131.36	0.6378	56.40	0.4525	−131.35
4	0.2703	88.16	1.0512	−38.92	0.9141	154.73	0.0001	138.66	0.0000	138.66	0.6830	63.23	0.4525	−131.35
5	0.8432	134.05	1.1963	−26.72	0.4871	−171.95	0.0000	0.00	0.0000	0.00	0.7671	101.85	0.4525	−161.35

and

Table 15. Current values through the lines in the case of the Yg-D topology.

From	To	Ia		Ib		Ic		3I0		I0		I1		I2
Bus No.	Bus No.	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
1	2	1.7045	−64.15	2.7028	117.38	1.0000	−60.00	0.0000	0.00	0.0000	0.00	1.3927	−114.22	1.3406	−11.35
2	F	4.0218	−41.35	0.0000	0.00	0.0000	0.00	4.0218	−41.35	1.3406	−41.35	1.3406	−41.35	1.3406	−41.35
3	2	1.1036	−162.18	1.1769	99.02	0.7605	−26.36	0.7374	138.66	0.2458	138.66	1.0000	−150.00	0.0000	−131.35
4	3	1.1036	−162.18	1.1769	99.02	0.7605	−26.36	0.7374	138.66	0.2458	138.66	1.0000	−150.00	0.0000	−131.35
5	4	1.0001	−150.00	1.0000	89.99	1.0000	−30.00	0.0000	0.00	0.0000	0.00	1.0000	−150.00	0.0000	−131.35

. Note that the Yg-D transformer in this section implies the Yd1 transformer with grounding. When testing with the Yd11 transformer, which is another type of Yd transformer, the results are almost the same as those of the Yd1 case except for the phase shifts.

The voltages and currents of the transformer with the Y-D-Yg or D-D-Yg topologies are almost identical to those of the Yg-D-Yg transformer. The only difference in the sequence equivalent circuit is that there is only one path in which a zero-sequence current can flow, thus resulting in a smaller fault current magnitude than that in the Yg-D-Yg topology case. Hence, the setting values of protective devices should be set by considering the negative injection owing to the interconnection transformer for protection coordination and relaying. The results of the Y-D-Yg topology and D-D-Yg topologies are listed in

Table 16. Voltage values in pu at each bus in the case of the Y-D-Yg/D-D-Yg topologies.

Bus No.	Va		Vb		Vc		3V0		V0		V1		V2
	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
1	0.7161	−11.09	0.6289	−92.69	1.0198	131.31	0.0000	0.00	0.0000	0.00	0.7629	8.82	0.2598	−101.35
2	0.0000	0.00	0.9525	−57.69	0.9525	154.99	0.5358	−131.35	0.1786	−131.35	0.6170	48.65	0.4384	−131.35
3	0.0907	120.00	1.0039	−53.31	0.9646	160.36	0.5358	−131.35	0.1786	−131.35	0.6517	56.23	0.4384	−131.35
4	0.1815	120.00	1.0607	−49.37	0.9850	165.56	0.5358	−131.35	0.1786	−131.35	0.6966	62.94	0.4384	−131.35
5	0.3231	88.42	1.0792	−38.44	0.9224	157.84	0.0000	0.00	0.0000	0.00	0.7172	65.40	0.4384	−131.35

and

Table 17. Current values in pu through lines in the cases of the Y-D-Yg/D-D-Yg topologies.

From	To	Ia		Ib		Ic		3I0		I0		I1		I2
Bus No.	Bus No.	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)	Mag (pu)	Phase Angle (°)
1	2	1.6383	−65.13	2.6358	116.81	1.0000	−60.00	0.0000	0.00	0.0000	0.00	1.3625	−115.41	1.2990	−11.35
2	F	3.8970	−41.35	0.0000	0.00	0.0000	0.00	3.8970	−41.35	1.2990	−41.35	1.2990	−41.35	1.2990	−41.35
3	2	1.0001	−150.00	1.0000	90.00	1.0000	−30.00	0.0000	0.00	0.0000	0.00	1.0000	−150.00	0.0000	−131.35
4	3	1.0001	−150.00	1.0000	90.00	1.0000	−30.00	0.0000	0.00	0.0000	0.00	1.0000	−150.00	0.0000	−131.35
5	4	1.0001	−150.00	1.0000	90.00	1.0000	−30.00	0.0000	0.00	0.0000	0.00	1.0000	−150.00	0.0000	−131.35

.

Most grid codes for DER interconnection require DER grounding to ensure the magnitude of the fault current and to suppress transient overvoltage. These requirements are called grounding coordination or effective grounding. Thus, to evaluate grounding coordination, it is essential to analyze the transformer topology and the fault current. In particular, if the connected transformer does not provide sufficient grounding, a grounding source may need to be installed through a separate grounding transformer such as a zig-zag transformer.

5.2. Case Study Analyses

It can also be noted that the contributions of the zero-sequence fault currents from the DERs impact the total fault currents. In the case of the two-winding transformers, the Yg-D transformer topology, which is grounded at the grid side, yields a larger total fault current (i.e., 4.0218 ∠−41.35° pu) than the D-Yg transformer (i.e., 3.8970 ∠−41.35° pu), which is not grounded at the grid side. This difference is primarily because the zero-sequence fault current contributes to the total fault current, which can also be observed in the three-winding transformers. That is, the total fault current of the Yg-D-Yg transformer (i.e., 3.9962 ∠−41.32° pu) is slightly larger than that of the Y-D-Yg or D-D-Yg transformers (i.e., 3.8970 ∠−41.35° pu). It should be noted that if the transformer was grounded at the DER side and not at the grid side, the total fault currents of the two- and three-winding transformers would be identical to each other.

In the end, the grounding and topology of the interconnection transformer of the DER should be considered for short-circuit analyses. Therefore, many grid codes state that DER systems must adhere to the same transformer grounding design as the general electric power systems. However, the interconnection transformer grounded at the grid side could increase the zero-sequence current during normal operation, which may compromise the security of the protective relays, such as overcurrent ground relays. In other words, the overcurrent ground relays may trip because of the zero-sequence current contribution from the DERs even when no faults occur. In addition to the malfunctioning of the relay, the zero-sequence current may increase the loss in the neutral line. This issue should be addressed in future research studies.

6. Conclusions

To assess the impact of IBDGs as distribution systems that have yet to be fully prepared for connecting renewable energy sources, this study analyzed the fault current contributions of IBDGs with the extensively used model and explained the failure analysis of IBDGs more intuitively by presenting IBDG fault analysis with a model familiar to engineers or researchers. Moreover, this study will give them a better understanding of the fault analyses of systems with IBDGs. The case study evaluated herein covered a single DER, thus making it clear that the analysis approach can also be applied to multiple DERs if their models and parameters are known. In other words, the circuits of DERs can be modeled and then integrated into the main circuit in parallel. After implementing the short-circuit analysis for each source or DER, the results can be combined using the superposition principle. From this fault analysis, it is observed that the IBDG’s fault current is smaller than that of the SBDG, and the reason is that the IBDG operates as a current source, thereby limiting the magnitude of the fault current of IBDGs. In addition, the analysis also indicated that the topology of interconnection transformers should be considered because negative- and zero-sequence fault currents can be generated.

However, this approach cannot observe dynamic behavior in transience when a fault occurs. This transient analysis requires detailed models of inverters, which differ by manufacturers or control algorithms, and time-domain simulations based on dynamic models. This analysis remains for further study.