Cascaded Multilevel Inverter-Based Asymmetric Static Synchronous Compensator of Reactive Power

Abstract

The topology of the static synchronous compensator of reactive power for a low-voltage three-phase utility grid capable of asymmetric reactive power compensation in grid phases has been proposed and analysed. It is implemented using separate, independent cascaded H-bridge multilevel inverters for each phase. Every inverter includes two H-bridge cascades. The first cascade operating at grid frequency is implemented using thyristors, and the second one—operating at high frequency is based on the high-speed MOSFET transistors. The investigation shows that the proposed compensator is able to compensate the reactive power in a low-voltage three-phase grid when phases are loaded by highly asymmetrical reactive loads and provides up to three times lower power losses in the compensator as compared with the situation when the compensator is based on the conventional three-level inverters implemented using IGBT transistors.

1. Introduction

The amount of electricity generated using decentralized renewable energy sources is constantly growing. Such energy generation is called Distributed Generation. Power electronics-based electronic converters are widely used in distributed energy grids to convert the non-standard electricity produced by the renewable energy sources to the standard one and to improve the quality of delivered energy. One of the problems encountered in distributed energy grids related to energy quality is reactive power compensation [1,2,3]. Electro-mechanically commutated Capacitor Banks or Static Var Compensator (SVC) based on the thyristor-switched capacitors and thyristor-switched reactors can be used to solve this problem [4,5,6]. However, the working conditions of renewable energy sources (photovoltaic and wind power plants) are constantly changing due to changes in weather conditions [7]. For this reason, the energy supply situation in such grids is constantly changing, so reactive energy compensators have to be characterized by a short response time. Therefore, it is appropriate to use a more advanced voltage source inverter-based Static Synchronous Compensator (STATCOM) [8,9,10] that is characterized by a short response time in the distributed energy grids.

Inverter-based reactive power compensators are implemented using an inverter that acts as a voltage source and generates AC voltage using the PWM technique. The amplitude of the inverter voltage is controlled by the changing of the modulation index (by changing the duration of voltage pulses generated by the inverter). According to energy transfer theory, from one voltage source to another through the filter with the impedance X, the quantities of active and reactive power can be obtained by solving equations [11]

$$P=\frac{U_{\mathrm{I}}·U_{\mathrm{G}}·\sin \delta }{X},$$

(1)

$$Q=-\frac{U_{\mathrm{G}}^2-U_{\mathrm{I}}·U_{\mathrm{G}}·\cos \delta }{X},$$

(2)

where $P$ is active power, $Q$ is reactive power, $U_{\mathrm{I}}$ is amplitudes of inverter voltage, $U_{\mathrm{G}}$ is amplitudes of grid voltage, and $\delta$ is the phase angle between voltages $U_{\mathrm{I}}$ and $U_{\mathrm{G}}$. According to Equation (1), in order to keep the active power P = 0 and to generate only reactive power, the phase angle between the voltage sources has to be δ = 0°, i.e., the voltage generated by the reactive power compensator inverter has to be synchronized with the grid voltage. It is seen from Formula (2) that at δ = 0°, the capacitive reactive power (Q has to be positive in (2)) is supplied to the grid if the voltage amplitude of the inverter is higher than the voltage amplitude of the utility grid $(U_{\mathrm{I}}>U_{\mathrm{G}})$. The higher the amplitude of the inverter voltage, the more capacitive reactive power is being supplied to the utility grid. In the case when the voltage amplitude of the inverter is lower in comparison to the voltage amplitude of the utility grid $(U_{\mathrm{I}}<U_{\mathrm{G}})$, the inductive reactive power is consumed (Q has to be negative in (2)). The lower the inverter voltage, the more inductive reactive power is being consumed. If the amplitude of the inverter voltage is equal to the utility grid voltage, the reactive power is not produced or consumed.

The reactive power to be compensated in each phase of the three-phase grid is often different, i.e., asymmetric, so the compensator has to be adapted to asymmetric reactive power compensation [12,13]. In such a case, the three-phase inverter must be able to supply to each phase of the grid the voltage with independently controlled amplitude. Despite that there are publications dedicated to the development of a three-phase inverter control method to compensate for the reactive power asymmetrically [14], the works [15,16,17,18] state that the STATCOM-type compensator, based on a three-phase inverter, which includes three arms, is incapable of asymmetric reactive power compensation. This statement is supported by the fact that there are no STATCOM-type compensators on the market to control reactive power in a three-phase grid asymmetrically. Because of this, the hybrid STATCOM, which includes conventional STATCOM and the thyristor-switched reactor (TSR), or thyristor-switched capacitor (TSC) compensators, can be used for asymmetric compensation. STATCOM compensates for a symmetrical component of reactive power, while the asymmetric component is compensated using TSR or TSC. However, TSR and TSC compensators are slow in comparison to STATCOM compensators; because of this, during the asymmetric compensation the response of the hybrid STATCOM is slow as well.

Based on the above, it can be concluded that accurate asymmetric short response compensation of the reactive power in a three-phase grid can be performed using just the compensator with the separate single-phase inverters for each phase.

The key contribution of this work is that the topology of the static synchronous compensator capable of asymmetric reactive power compensation in a low-voltage three-phase utility grid has been proposed. The compensator is based on the employment of separate, independent cascaded H-bridge multilevel inverters for each phase.

2. Topology of Static Synchronous Reactive Power Compensator Based on Independent Cascaded H-Bridge Multilevel Inverters

A cascaded inverter is a type of multilevel inverter topology where switching devices are connected in series. Cascaded inverters are widely used in renewable energy plants, variable-speed motor drives and reactive power compensators for electric grids [19,20,21]. Cascaded inverter topology in comparison to a conventional three-level inverter allows a decrease in current and voltage harmonics and reduced switching losses of the inverter by distributing power over two inverters. In the proposed reactive power compensator, the hybrid modulation technique [22,23,24] is used for the forming of the compensator output voltage. In order to reduce switching losses, the majority of inverter power is produced using the first cascade operating at low (grid) frequency. It generates the square waveform voltage with the amplitude close to the utility grid voltage amplitude and with a frequency equal to grid voltage frequency. This square waveform voltage includes not just the first harmonic, the frequency of which is equal to grid frequency, but the higher odd harmonics as well. The second cascade of the cascaded inverter performs the elimination of higher harmonics produced by the first cascade using the PWM technique operating at high frequency and low power. The spectrum of ideal square pulse consists of the infinite sum of sine waves of odd harmonic order. The amplitude of each harmonic can be calculated using the following equation [25]:

$$A_{fj}=\frac{2·A}{j·\pi }\left(\sin \left(\frac{j·m·\pi }{2}\right)+\sin \left(j·\left(\pi -\frac{m·\pi }{2}\right)\right)\right),$$

(3)

where j—harmonic number, A_fN—amplitude of N-th order harmonic, A—amplitude of square pulse voltage, and m—modulation index. The lowest order harmonic in the second cascade voltage spectrum has to be the third harmonic, and as it is seen from (3), it has the highest amplitude as compared with other higher-order harmonics. If the amplitude of the square wave voltage generated by the first cascade is 320 V, the amplitude of the third harmonic calculated using (3) is A_f3 = 120 V. Since the second cascade has to generate the pulsed voltage for the cancellation of the higher-order harmonics created by the first cascade, the supply voltage of the second cascade has to be U_DC2 ≥ 120 V.

Usually, the switches of reactive power compensator inverters are implemented using IGBT transistors that have good enough dynamic characteristics but are characterized by a relatively high voltage drop in state ON. In the proposed topology of a static synchronous reactive power compensator based on three independent cascaded H-bridge multilevel inverters, the first cascade operates at low frequency; therefore, the impact of the dynamic characteristics of inverter switches on power losses is not sufficient. Because of this, the thyristors that have slow dynamics but are characterized by low voltage drop in the state ON, i.e., guarantee low conducting losses, could be used instead of IGBT transistors to minimize the power losses in the first cascade. Since the amplitude of the PWM voltage produced by the second cascade is relatively low, the switches of this cascade can be realized using low-voltage MOSFET transistors that are characterized by very high speed and low voltage drop in state ON, and allow achieving lower power losses as compared with the IGBT transistors as well.

The topology of the proposed three-phase asymmetric static synchronous compensator based on independent cascaded H-bridge multilevel inverters for a four-wire grid is presented in Figure 1. Every cascaded inverter provides seven levels of output voltage. The first cascade of every cascaded inverter is implemented using thyristors (T1.1–T1.4), the second—using MOSFET transistors (Q1.1–Q1.4). Each cascade is supplied by a separate isolated voltage source (DC1.1 and DC1.2), i.e., six galvanically isolated DC voltage sources were used, which could be implemented using distributed renewable energy. The cascaded inverter of every phase includes an LCL output filter for connection to the utility grid and for the filtering of current harmonics as well. The parameters of the filter components were as follows: $L1.1=1.5\times {10}^{-8} \mathrm{H};$ $L1.2=1.5\times {10}^{-3} \mathrm{H};$ $\mathrm{C}=6.2\times {10}^{-9} \mathrm{F}$.

It is necessary to stress that the proposed topology is more complex than the classic one based on the three-arm three-phase inverter. However, it has an important advantage—it allows asymmetric compensation of the reactive power in the three-phase grid to be performed.

3. Investigation of Reactive Power Compensator Output Voltage and Current Spectrums

Matlab/Simulink model of static synchronous reactive power compensator based on three independent cascaded H-bridge multilevel inverters was built. The model of cascaded inverter for one of the phases is presented in Figure 2. The signals for the control of thyristors of the first cascade that produces the square waveform voltage are generated using the block PWM 1, which creates the signals by comparing the grid frequency (f_sq = f_gr) square signal with low-frequency triangle signal (f_tri = 2f_gr). The amplitude of the square signal, and as a consequence, the amplitude of the inverter output voltage, is set up by the variation in modulation index m.

Since the purpose of the second cascade of the cascaded inverter is the elimination of the higher harmonics produced by the first cascade, the spectrum of the waveform generated by the second cascade has to include the same higher harmonics with the same amplitudes but with the opposite phases as compared with the spectrum of the square waveform. This waveform is generated using the PWM technique. The control signals for the MOSFET transistors of the second cascade are formed using the same principle as it is used in the sinusoidal PWM method [26]. The only difference is that instead of the comparison of the sinus signal with the high-frequency triangle signal, the comparison of the waveform that has to generate the second cascade has to be provided. The spectrum of this waveform has to include the third and higher odd harmonics. The sinus waveforms with the frequencies that correspond to odd harmonic frequencies up to the 21st harmonic with the amplitudes calculated using (3) are generated employing the blocks Harmonic j, where j = 1, 3, 5, …, 21. These blocks generate odd harmonic sinus waves from the 3rd to 21st harmonic and allow control of the modulation index m and delay T. All harmonics are summed using block Summ. The resulting waveform is presented in Figure 3. Control signals for the second cascade MOSFET transistors are obtained in the second cascade PWM generator PWM 2 using a voltage comparator by applying a high-frequency (equal to PWM carrier frequency) triangular signal to one input and a waveform with the sum of harmonics to another input of the comparator. The direct and inverted PWM signals obtained at the outputs of the comparator are fed to an inverter for the control of MOSFET transistors.

The output voltage of the cascaded inverter has to be in phase with the grid voltage for control of the reactive power. However, the voltage phase is shifted by the output filter of the inverter, and this shift depends on the inverter load, i.e., it is not constant. Therefore, it is necessary to control the phase of the cascaded inverter output voltage. The PI controller is used for this purpose. Since the direct measurement of the grid phase is complicated, the zero value of active power provided to the grid, which corresponds to the zero-phase difference (see Equation (1)), is used as the set point for the PI controller. The active power measurement for the feedback of the phase control system is performed using current and voltage measurement blocks Amp and Voltm (Figure 2). The PI controller controls the shift of all generated signals introducing the shift in time T for the control of the inverter output voltage phase.

The analysis of the reactive power compensator based on three independent cascaded H-bridge multilevel inverters was performed for the reactive load that varies in every phase of the compensator in a range from $-4000$ to $+4000 \mathrm{VAr}$.

Waveforms and spectrums of the output voltage and current of the first cascade of the cascaded inverter are presented in Figure 4. The second cascade of the cascaded inverter has to generate the waveforms with the spectrum, which would allow cancelling the harmonics produced by the first cascade in order to provide quality reactive power. The second cascaded inverter in the proposed compensator provides harmonic cancellation up to the 21st harmonic, i.e., up to frequency $f_{21}=1050 \mathrm{Hz}$. Waveforms and spectrums of cascaded inverter output voltage and current with harmonic cancellation are presented in Figure 5. The cancellation of harmonics up to the 21st harmonic using the second cascade of the cascaded inverter allows reaching the 1.74% THD of output current.

The waveforms of the current of DC1 and DC2 voltage sources of the cascaded inverter are presented in Figure 6. They are obtained for a +4000 VAr reactive load. As it is seen, the current pulsates in both directions between the load and the DC sources of the compensator because of the reactive nature of the load. Active power is used only to compensate for the losses in the circuits between the DC sources and the reactive load.

4. Investigation of Asymmetric Reactive Power Compensation Capability Using Compensator Based on Independent Cascaded H-Bridge Multilevel Inverters

The investigation of the operation of the proposed reactive power compensator was performed using Matlab/Simulink software. The analysis was carried out according to the following scheme: first, there was now reactive power in the utility grid. Later, different reactive loads were connected to each phase: at time moment 0.025 s—minus 4.4 kVAr load to the first phase; at time moment 0.075 s—2.0 kVAr load to the second phase; and at time moment 0.125 s—3.0 kVAr to the third phase. The asymmetric loads were implemented by connecting inductances and capacitors with different values of parameters to the four-wire utility grid. Each phase load was connected between the appropriate phase and neutral. In order to properly distinguish transients, the compensator was set to start the reactive power compensation in every phase 0.04 s after the reactive load to this phase was connected. The same experiment was carried out for the case when a conventional three-phase STATCOM type compensator was used. The topology of conventional STATCOM is presented in Figure 7 [27]. It is based on the conventional three-phase inverter containing three arms implemented using IGBT transistor switches Q1–Q6. The same arm at the same time is used to form voltages of two phases in the conventional three-phase inverter. Therefore, it is not possible to form the phase voltages independently; because of this, the conventional device does not allow the asymmetric compensation of reactive power. The obtained reactive power transients for each phase in the three-phase grid are presented in Figure 8.

The obtained results show that using the proposed compensator based on independent cascaded H-bridge multilevel inverters, the reactive power was compensated approximately during 0.1 s after the compensation was started, i.e., the proposed compensator is able to compensate the reactive power in the three-phase four-wire grid even when phases are loaded highly asymmetrically: one phase by inductive and the other two phases by different capacitive loads. This concludes that such an approach is capable of quality asymmetric reactive power compensation in the three-phase grid. However, the transients presented in Figure 8b show that the conventional three-phase STATCOM compensator is not capable of compensating for the asymmetric reactive power loads. It is seen that after the transition, the reactive power in the phases is not compensated. It happens because it is impossible to control the voltages of the individual phases independently using the classical three-phase three-arm inverter. This can be observed in Figure 9, where the simulated response of output voltages of conventional STATCOM to the change in voltage in one of the phases is presented. It is seen that the change in the voltage in one phase causes voltage changes in other phases.

The dependences of reactive power and the THD of output current on output voltage amplitude for the proposed compensator were obtained. The results for one of the phases are presented in Figure 10. It is seen that the THD of the compensator current is highly dependent on produced reactive power and reaches the highest values at low reactive load. This is because at low reactive load the amplitude of the fundamental harmonic decreases more strongly than the amplitudes of the higher harmonics. Meanwhile, at higher loads, the THD value is only a few percent.

5. Investigation of Efficiency of Reactive Power Compensator Based on Independent Cascaded H-Bridge Multilevel Inverters

The efficiency of the reactive power compensator is important because higher efficiency allows not just a reduction in the energy losses but the simplification of the means for the cooling of inverter switches, and a reduction in the size of the compensator as well. Since the transistors of the inverter switches have to be shunted by the reverse diodes, the losses in the inverter depend not only on the characteristics of transistors but on parallel diodes as well. The power losses in parallel diodes are highly dependent on the mode of inverter operation, i.e., on the direction of current through the inverter switches.

The power losses in the inverters depend not only on the power of the load and the parameters of the switches, but on the carrier frequency as well. Therefore, the efficiency of cascaded multilevel inverters of the proposed reactive power compensator was investigated at various carrier frequencies and produced reactive power. In order to prove the advantage of the proposed topology based on cascaded H-bridge multilevel inverters, the obtained results were compared with the case when the compensator is based on the three independent conventional single-phase three-level inverters implemented using IGBT transistors. The Matlab/Simulink model of this compensator was created for this purpose. The model of the compensator for one of the phases is presented in Figure 11. The block PWM is used for the forming of the PWM control signals for the IGBT transistors of the inverter. The signals are formed using the sinusoidal PWM method based on the comparing of the sinus waveform with the high frequency (equal to PWM carrier frequency) triangle signal. The amplitude of the inverter output voltage is controlled by setting the value of modulation index m, which determines the duty cycle of the PWM control signal of inverter transistors. The PI controller is used to control the phase of inverter output voltage. It has to be synchronous with the grid voltage to keep the active power close to zero. The voltage phase is controlled by introducing the shift in time T for PWM control signals of inverter IGBT transistors.

The obtained dependences of power losses in reactive power compensator inverters on the carrier frequency at various values of generated reactive power are presented in Figure 12a,b. The dependences of difference between power losses in the cascaded H-bridge multilevel inverter-based compensator and in the compensator implemented using conventional three-level inverters are given in Figure 13. The types and main parameters of transistors and thyristors, for which the simulation of compensators was performed, are presented in

Table 1. MOSFET transistors of cascaded multilevel inverters: IXFP36N20X3M (200 V, 18 A).

RDS (on) (Resistance Drain-Source) at ID = 18 A	Input Capacitance	Output Capacitance	Reverse Transfer Capacitance
38 mΩ	1425 pF	280 pF	1.2 pF

,

Table 2. Thyristors of cascaded multilevel inverters: MGTO1200 (1200 V, 20 A).

VT (Voltage Drop) at IT = 20 A	VT0 (Threshold Voltage)	RT (Slope Resistance)
1.27 V	0.86 V	13.2 mΩ

and

Table 3. IGBT transistors of conventional three-level inverters: FGA20N120FTD (1200 V, 20 A).

VCE (Sat) at IC = 20 A	Input Capacitance	Output Capacitance	Reverse Transfer Capacitance
1.6 V	3080 pF	95 pF	60 pF

.

The obtained results (Figure 12) show that the compensator based on the cascaded multilevel inverters provides lower power losses as compared with the situation when the compensator is based on the conventional three-level inverters. The power losses consist of switching and conducting losses. Switching losses depend on the dynamic characteristics of the inverter transistors and their parallel diodes. At low carrier frequency, the difference in power losses is not significant. As an example, at 4500 VAr reactive power load of every phase and 7.5 kHz carrier frequency, the total power losses in all three conventional inverters of compensator are about 12.6 W and 9.6 W when instead of conventional inverters, the cascaded inverters are employed, i.e., the difference is 24%. However, this difference rises strongly as the frequency increases. The power losses at the same load and 80 kHz carrier frequency are 37 W and 12 W, accordingly, i.e., the difference increases up to 68%. This can be explained by the fact that the low-voltage MOSFET transistors characterized by high speed can be employed in the second cascade of the proposed reactive power compensator for the creating of the high-frequency components of the generated three-phase voltages. However, the compensator based on the conventional inverters has to be implemented using high-voltage IGBT transistors that are relatively slow and, because of this, cause high switching losses. The lower power losses at low switching frequency in the proposed compensator are caused by lower conducting losses of thyristors and low-voltage MOSFET transistors as compared with the conducting losses of high-voltage IGBT transistors.

6. Conclusions

• The accurate asymmetric compensation of the reactive power with the short response time in the three-phase low-voltage grid can be performed using just a static synchronous compensator with separate single-phase voltage source inverters for each phase.
• To minimize the power losses in the reactive power compensator implemented using cascaded H-bridge multilevel inverters, the first cascade of every inverter that operates at grid frequency has to be implemented using thyristors that are slow but are characterized by the low voltage drop in the state ON, and the second cascade has to be realized using low-voltage high-speed MOSFET transistors that provide low switching losses and low voltage drop in the state ON.
• Using the proposed asymmetric compensator, the reactive power can be compensated for fully during 0.1 s after the compensation was started, when the phases are loaded asymmetrically by the following reactive loads: first phase—by minus 4.4 kVAr, second—by 2.0 kVAr and third—by 3.0 kVAr.
• The power losses in the proposed asymmetric compensator based on the cascaded multilevel inverters, at 4500 VAr reactive power load of every phase and 7.5 kHz carrier frequency are about 24%, and at 80 kHz—68% lower as compared with the situation when the reactive power compensator is implemented using conventional three-level inverters based on IGBT transistors.