Hybrid Resonant Converter with Three Half-Bridge Legs for Wide Voltage Operation

Abstract

This paper studied a hybrid resonant converter with three half bridge legs for wide input voltage operation. Compared to the conventional resonant converters with narrow voltage operation, the presented converter can achieve wider voltage operation. On the basis of the proper switching status of power switches, the developed converter can operate at half-bridge resonant circuit under high input voltage range and the other two full-bridge resonant circuits under medium and low input voltage ranges. Each resonant circuit has a 2:1 (V_in,max = 2V_in,min) input voltage operation range. Therefore, the developed converter can achieve an 8:1 (V_in,max = 8V_in,min) wide voltage operation. The main advantage of the studied converter is the single-stage direct current (DC)/DC power conversion instead of the two-stage power conversion to achieve wide voltage operation. Because the equivalent resonant tank of the adopted converter is controlled by frequency modulation, the soft switching operation on power switches or rectifier diodes can be realized to improve circuit efficiency. The performance of the proposed circuit was confirmed and verified by experiments with a laboratory circuit.

1. Introduction

Power electronic converters with high efficiency are developed for consumer electronics, battery chargers, telecommunication power units, direct current (DC) nano-grid power conversions, internet of things (IOT) power units, and renewable energy conversions. Soft switching techniques for flyback circuits, full bridge converters, and half bridge converters [1,2,3,4,5,6,7] have been developed to improve the converter efficiency and eliminate the switching losses. Phase-shift pulse-width modulation (PSPWM) full bridge converter [1,2] uses the phase angle control between the lagging-leg switches and leading-leg switches to control the load voltage and also achieve soft switching operation. However, the lagging-leg switches are hard switching operation at the light load. The high circulating current loss at low duty cycle case is the other drawback. Soft switching flybacks have been discussed in [3,4] for low power applications. Active clamp converter was discussed in [5] to reduce voltage spike on power switches by using active clamp and switch. However, the rectifier diodes have unbalanced voltage and current stresses on the output side. Resonant converters discussed in [6,7,8] can achieve low switching losses on power semiconductors. However, the output or input voltage range of the resonant converter is limited due to its low voltage gain of the series resonant circuit characteristics.

For solar photovoltaic or fuel cell systems [9,10,11,12,13], the output voltage of a solar panel depends on the geographical location and solar intensity. Therefore, the output voltage range of solar panel is wide variation. Power converters with wide input voltage operation have been discussed and developed in [9,10,11,12] for fuel cell and solar power converters with the series or parallel connected structure to extend the input voltage range. Full bridge resonant converter with one alternating current (AC) switch and two isolated transformers was developed in [13] to have a wide voltage operation range (V_in,max = 4V_in,min). However, the control algorithm is much more complicated due to four equivalent sub-circuit topologies. The power converters with wide voltage operation are also demanded for the power units in the outdoor LED lighting systems, battery chargers in electric vehicles, and railway vehicles. Due to the variable parallel or series connection of several LED strings for output lighting system, the power converters with variable output voltage are normally implemented. For railway low power supplies, the input voltages of DC converters are between 24 and 110 V for the braking system, electric door system, lighting system, and motor drive controller. For electric vehicle (EV) systems, the output voltage of battery charger is variable from 210 to 450 V. Therefore, DC converters with wide voltage range output is required for EV applications. To achieve wide voltage range output, the two-stage DC converters [14,15,16] based on the non-isolated DC/DC converter in the first-stage and the isolated DC converter in the second-stage are the simplest way to accomplish wide voltage operation. The main disadvantage of the two-stage converters is low circuit efficiency. Parallel- or series-connected converters [9,17] were developed to have wide voltage operations. However, a large number of circuit components are needed in these circuit topologies. Series resonant converters published in [18,19,20,21] have a wide voltage range operation such as V_in,max = 4V_in,min or V_o,max = 4V_o,min. By the proper control of power switches, the resonant converter can be operated at the half or full bridge circuit topology. Therefore, the resonant converters with 4:1, that is, V_in,max = 4V_in,min, wide voltage range operation are achieved. However, the voltage operation range of these circuit topologies is less than 4, that is, V_in,max ≤ 4V_in,min. If the much wider voltage range is requested, such as V_in,max ≥ 4V_in,min in solar panel applications or wide voltage variation systems, then these circuit topologies cannot be operated well.

A new resonant converter with a three converter legs structure and a variable turns ratio of transformer is presented in this study, having a wide voltage range operation. On the basis of the switching status of active switches, the proposed resonant converter has three equivalent sub-circuits to implement 8:1 (V_in,max = 8V_in,min) wide voltage range operation such as 50–400 V. If V_in (input voltage) is under low voltage range from 50 to 100 V, the sub-circuit with the full bridge circuit topology and low turns ratio transformer is operated to have high voltage gain. If V_in is under medium voltage range from 100 to 200 V, then the sub-circuit with full bridge circuit topology and high turns ratio transformer is operated to decrease the voltage gain in order to control the load voltage. If V_in is under the high voltage range from 200 to 400 V, then the sub-circuit with the half bridge circuit topology and high turns ratio is operated to further reduce the voltage gain. Three equivalent sub-circuits in the proposed converter were selected by two Schmitt voltage comparators with reference input voltages at 100 and 200 V. Therefore, the half bridge circuit topology or full-bridge circuit topology with two different turns ratios can be selected on the input side to accomplish wide input voltage operation. The circuit topology and control algorithm of the presented converter are easy to implement when compared to the conventional wide voltage range converters with two-stage circuit topologies and hybrid converters in [9,10,11,12,13,14,15,16,17,18,19,20,21]. Because the resonant circuit of the presented DC converter is controlled under the frequency modulation and the input impedance of resonant tank is always at the inductive load operation, active switches are naturally turned on at zero voltage switching operation. Finally, the design procedures and experiments are presented and confirmed with a 480 W laboratory circuit.

2. Circuit Structure and Principle of Operation

The circuit schematic of the developed circuit topology with wide voltage operation is shown in Figure 1. Three half-bridge legs (Q_1–Q₆) are used on the input side and one center-taped rectifier is used on the output side. Two resonant circuits (L_r1, C_r1, L_r2 and C_r2) with one AC power switch S are used to accomplish series resonant operation with soft switching behavior for power switches. V_in (V_o) is the input (output) voltage and R_o is the output resistor. Transformer T has two primary and secondary winding sets with n_p and n_s winding turns, respectively. According to the switching states of Q_1–Q₆ and S, the developed converter can be operated under three input voltage ranges: V_in,L = V_in,max/8–V_in,max/4, V_in,M = V_in,max/4–V_in,max/2 and V_in,H = V_in,max/2–V_in,max, as shown in Figure 2. Figure 2a gives the equivalent resonant circuit if V_in is under the low voltage range V_in,L. To achieve the higher voltage gain in the proposed converter, Q₅, Q₆, and S are off. Only a full-bridge converter with Q_1–Q₄, L_r1, C_r1, and T with n_p primary turns are operated on the input-side. The DC voltage gain of the resonant circuit in Figure 2a is V_o/V_in,L = G_L(f)n_s/n_p, where G_L(f) is the voltage gain of the proposed converter in Figure 2a. Figure 2b illustrates the equivalent circuit if V_in is under the medium voltage range V_in,M. In the medium voltage range, Q₃ and Q₄ are off. The resonant tank includes L_r1, C_r1, L_r2, C_r2, and transformer T with 2n_p primary winding turns. The series resonant frequency of this equivalent circuit is also $f_r=1/2\pi \sqrt{L_{r1}{C}_{r1}}$ due to C_r1 = C_r2 and L_r1 = L_r2. The DC voltage gain of the resonant circuit shown in Figure 2b is V_o/V_in,M = G_M(f)n_s/(2n_p) due to the primary turns being 2n_p instead of n_p, where G_M(f) is the voltage gain of the proposed converter in Figure 2b. Figure 2c provides the equivalent circuit if V_in is under the high voltage range V_in,H. In high voltage range, Q₃, Q₄, and Q₅ are off and S and Q₆ are on. The half-bridge resonant converter with the components Q₁, Q₂, L_r1, C_r1, L_r2, C_r2, and transformer T with 2n_p primary winding turns is operated to achieve lower voltage gain. The series resonant frequency of this equivalent circuit is $f_r=1/2\pi \sqrt{L_{r1}{C}_{r1}}$ with L_r1 = L_r2 and C_r1 = C_r2. Compared to the equivalent circuit in Figure 2b, the fundamental input voltage is V_in/2 in Figure 2c instead of V_in in Figure 2b. The DC voltage gain of the equivalent circuit in Figure 2c is V_o/V_in,H = G_H(f)n_s/(4n_p), where G_H(f) is the voltage gain of the proposed converter in Figure 2c. Compared to the DC voltage gain under three different input voltage gains, it observes that V_o/V_in,L = 2(V_o/V_in,M) = 4(V_o/V_in,H) if G_L(f) = G_M(f) = G_H(f). Thus, the voltage gain of resonant circuit in Figure 2a is the largest compared to the resonant circuits in Figure 2b,c. Power switches Q_1–Q₆ and S can be properly controlled from three equivalent circuits, as shown in Figure 2 to have 8:1 (V_in,max = 8V_in,min) wide voltage range operation.

2.1. Low Input Voltage Range (S, Q₅, and Q₆ off, V_in,L = V_in,max/8–V_in,max/4)

If the input voltage V_in is between V_in,max/8 and V_in,max/4, S, Q₅, and Q₆ are turned off and only Q_1–Q₄ are operated to realize the high voltage gain shown in Figure 2a compared to the other two equivalent circuits (Figure 2b,c). The input-side is a full-bridge resonant converter and the output-side is a center-tapped diode rectifier. The DC voltage gain for low input voltage range is V_o/V_in,L = G_L(f)n_s/n_p. The theoretical pulse-width modulation (PWM) waveforms and the equivalent circuits for six operating states are provided in Figure 3 if f_sw (switching frequency) is less than f_r (series resonant frequency).

State 1 [t₀–t₁]: At t = t₀, v_CQ1 = v_CQ4 = 0. Then D_Q1 and D_Q4 are conducting due to i_Lr1(t₀) < 0. Q₁ and Q₄ turn on after t₀ to have soft switching operation. In this time interval, L_r and C_r are naturally resonant to deliver power to the load side. Because the diode D₁ is conducting, the magnetizing voltage v_Lm1 = nV_o, where n = n_p/n_s, and i_Lm1 increases.

State2 [t₁–t₂]: If f_sw < f_r, then i_D1 decreases to zero at time t₁ and D₁ is reverse biased without the reverse recovery current. In this state, L_r1, L_m1, and C_r1 are naturally resonant with the resonant frequency $f_p=1/2\pi \sqrt{(L_{r1}+L_{m1})C_{r1}}$.

State 3 [t₂–t₃]: At time t₂, Q₁ and Q₄ turn off. C_Q1 (C_Q2) and C_Q4 (C_Q3) are charged (discharged) due to i_Lr1(t₂) being positive. In this state, D₂ is forward biased due to i_Lr1 < i_Lm1 and the magnetizing voltage v_Lm1 equals −nV_o.

State4 [t₃–t₄]: At time t₃, v_CQ2 = v_CQ3 = 0. D_Q2 and D_Q3 are conducting owing to i_Lr1(t₃) > 0. Q₂ and Q₃ turn on after t₃ to realize the soft switching operation. In this time interval, L_r and C_r are naturally resonant to deliver power to load side. Because the diode D₂ is forward biased on the secondary side, the magnetizing voltage v_Lm1 = −nV_o and i_Lm1 decreases.

State5 [t₄–t₅]: At time t₄, i_D2 is decreased to zero so that D₂ is off. In this state, L_r1, L_m1, and C_r1 are naturally resonant.

State 6 [t₅–T_sw + t₀]: At time t₅, power switches Q₂ and Q₃ are turned off. C_Q1 (C_Q2) and C_Q4 (C_Q3) are discharged (charged) due to i_Lr1(t₅) is negative. In this state, D₁ is forward biased owing to i_Lr1 > i_Lm1 and the magnetizing voltage v_Lm1 = nV_o and i_Lm1 increases. At T_sw + t₀, v_CQ1 = v_CQ4 = 0 and the converter goes to state 1 for the next switching period.

2.2. Medium Input Voltage Range (Q₃ and Q₄ off, V_in,M = V_in,max/4–V_in,max/2)

The proposed converter for the medium input voltage (V_in = V_in,max/4–V_in,max/2) operation is illustrated in Figure 2b. Under the medium voltage range, power switches Q₃ and Q₄ turn off and AC switch S is always on. The full-bridge resonant circuit is adopted on the input-side with the resonant components L_r1, L_r2, C_r1, C_r2, and transformer T with 2n_p primary winding turns. Because C_r1 = C_r2 and L_r1 = L_r2, the series resonant frequencies at the medium input voltage operation (Figure 2b) and the low input voltage operation (Figure 2a) are identical. The DC voltage gain for the medium voltage range is V_o/V_in,M = G_M(f)n_s/(2n_p). Comparing the DC voltage gains for low and medium voltage ranges, one can observe that V_o/V_in,L = 2(V_o/V_in,M) under G_L(f) = G_M(f). This means the proposed converter has less DC voltage gain at the medium input voltage range operation. The theoretical PWM waveforms and the equivalent circuits are given in Figure 4.

State 1 [t₀–t₁]: At time t₀, the capacitor voltages of v_CQ1 and v_CQ6 are zero. D_Q1 and D_Q6 are forward biased due to i_Lr1(t₀) being negative. Q₁ and Q₆ can turn on after t₀ to achieve zero-voltage switching. In this state, C_r1, C_r2, L_r1, and L_r2 are naturally resonant with series resonant frequency $f_r=1/2\pi \sqrt{L_{r1}{C}_{r1}}$ due to L_r1 = L_r2 and C_r1 = C_r2, and the energy is transferred from V_in to R_o. Due to D₁ being forward biased, the magnetizing voltage v_Lm1 = v_Lm2 = (n_p/n_s)V_o and i_Lm1 and i_Lm2 increase.

State2 [t₁–t₂]: If f_sw (the switching frequency) < f_r (series resonant frequency), then i_Lm1 = i_Lr1 and i_Lm2 = i_Lr2 at t = t₁. Thus, D₁ is off without reverse recovery current loss. In this state, the circuit components C_r1, L_r1, C_r2, L_r2, L_m1, and L_m2 are naturally resonant.

State 3 [t₂–t₃]: Power switches Q₁ and Q₆ turn off at t = t₂. C_Q1 and C_Q6 are charged and C_Q2 and C_Q5 are discharged due to i_Lr1(t₂) > 0. Because i_Lr1 < i_Lm1 after t₂, the diode D₂ is forward biased.

State 4 [t₃–t₄]:v_CQ2 and v_CQ5 are decreased to zero at t = t₃. Because i_Lr1(t₃) > 0, the body diodes D_Q2 and D_Q5 are conducting. Q₂ and Q₅ can be turned on after t₃ to have zero-voltage switching. In this state, C_r1, L_r1, C_r2, and L_r2 are naturally resonant with series resonant frequency $f_r=1/2\pi \sqrt{L_{r1}{C}_{r1}}$ and the energy is transferred from V_in to R_o. Due to D₂ being forward biased, the magnetizing voltage v_Lm1 = v_Lm2 = −(n_p/n_s)V_o and i_Lm1 and i_Lm2 decrease in state 4.

State5 [t₄–t₅]: At time t₄, i_Lm1 equals i_Lr1 and i_Lm2 equals i_Lr2. Therefore, D₂ becomes off. Hence, the components L_r1, L_r2, C_r1, C_r2 L_m1, and L_m2 are naturally resonant.

State 6 [t₅–T_sw + t₀]: Power switches Q₂ and Q₅ are turned off at t = t₅. C_Q1 (C_Q2) and C_Q6 (C_Q5) are discharged (charged) due to i_Lr1(t₅) < 0. Because i_Lr1(t₅) is greater than i_Lm1(t₅), the diode D₁ is forward biased. At t = T_sw+t₀, v_CQ1 = v_CQ6 = 0.

2.3. High Input Voltage Range (Q₃–Q₄ off, V_in,H = V_in,max/2–V_in,max)

Figure 2c shows the sub-circuit when V_in is in the high voltage range (V_in,max/2–V_in,max). Power switches Q₃–Q₅ are turned off, and S and Q₆ are always on. The half-bridge resonant circuit with the components L_r1, L_r2, C_r1, C_r2, and transformer T with 2n_p primary winding turns is operated to regulate the load voltage. Because C_r1 = C_r2 and L_r1 = L_r2, the series resonant frequencies for three input voltage ranges in Figure 2 are identical. The DC voltage gain in the high input voltage range is V_o/V_in,H = G_H(f)n_s/(4n_p). Comparing the DC voltage gains for three different input voltage ranges, it is observable that V_o/V_in,L = 2(V_o/V_in,M) = 4(V_o/V_in,H) if G_L(f) = G_M(f) = G_H(f). The theoretical PWM waveforms and the equivalent circuits in a switching cycle for high input voltage range are shown in Figure 5.

State 1 [t₀–t₁]: C_Q1 is discharged to zero voltage at t = t₀. Due to i_Lr1(t₀) being negative, the body diode D_Q1 is forward. Q₁ can turn on after t₀ to realize zero-voltage switching. Because i_Lr1(t₀) > i_Lm1, D₁ is conducting and v_Lm1 = v_Lm2 = nV_o and i_Lm1 and i_Lm2 increase. C_r1, C_r2, L_r1 and L_r2, are resonant with resonant frequency $f_r=1/2\pi \sqrt{L_{r1}{C}_{r1}}$ in this state.

State 2 [t₁–t₂]: At time t₁, i_Lr1 = i_Lm1 and i_Lr2 = i_Lm2. The rectifier diode D₁ becomes off. L_m1, L_m2, L_r1, L_r2, C_r1, and C_r2 are resonant in this state.

State 3 [t₂–t₃]: Q₁ is turned off at t = t₂. Due to i_Lr1 being positive, C_Q1 (C_Q2) is charged (discharged). The rectifier diode D₂ is forward biased due to i_Lr1(t₂) < i_Lm1(t₂).

State4 [t₃–t₄]: v_CQ2 = 0 at t = t₃. Owing to i_Lr1(t₃) being positive, the body diode D_Q2 is forward. Power switch Q₂ can turn on after t₃ to achieve zero-voltage switching. D₂ is conducting owing to i_Lr1(t₃) < i_Lm1(t₃). Thus, v_Lm1 = v_Lm2 = −nV_o and i_Lm1 and i_Lm2 decrease. C_r1, C_r2, L_r1, and L_r2 are resonant in this state.

State5 [t₄–t₅]: At t = t₄, i_Lr1 equals i_Lm1 and i_Lr2 equals i_Lm2. Then, the rectifier diode D₂ becomes off. In this time interval, L_m1, L_m2, L_r1, L_r2, C_r1, and C_r2 are resonant.

State 6 [t₅–T_sw + t₀]: Q₂ turns off at t₅. Because i_Lr1 is negative, C_Q1 is discharged and C_Q2 is charged. Due to i_Lr1(t₅) > i_Lm1(t₅), the rectifier diode D₁ is forward biased. At time T_sw + t₀, C_Q1 is discharged to zero voltage.

3. Circuit Characteristics

The presented circuit is controlled by frequency modulation. The input voltage V_in has a variation between 50 and 400 V and the output voltage V_o is regulated at 48 V. The fundamental harmonic analysis (FHA) proposed by [22] is selected to calculate the voltage transfer function in the proposed converter by frequency modulation. When 50 V ≤ V_in < 100 V (low voltage range), only Q₁–Q₄ are operated (Figure 2a) to achieve high voltage gain. The square voltage waveform with voltage values of ±V_in is obtained on the leg voltage v_ab. If 100 V ≤ V_in < 200 V (medium voltage range), then only power switches Q₁, Q₂, Q₅, and Q₆ are controlled to control load voltage, and AC switch S is always on (Figure 2b). The square waveform with voltage values of ±V_in is obtained on the leg voltage v_ac. If 200 V ≤ V_in ≤ 400 V (high voltage range), then only Q₁ and Q₂ are operated to control the load voltage, and switches S and Q₆ are always on (Figure 2c). The square waveform with voltage values of 0 and V_in is obtained on the leg voltage v_ac. The fundamental root mean square (rms) values of the leg voltages v_ab,rms (in the low voltage range) and v_ac,rms (in the medium and high voltage ranges) are calculated as:

$$v_{ab,rms}=2\sqrt{2}{V}_{in}, 50 V \le V_{in}<100 V,$$

(1)

$$v_{ac,rms}=\left\{\begin{array}{c}2\sqrt{2}{V}_{in}, 100 V \le V_{in}<200 V \\ \sqrt{2}{V}_{in}, 200 V \le V_{in}<400 V\end{array}\right..$$

(2)

The turns ratio of transformer T under low input voltage range is n₁ = n_p/n_s. However, the turn-ratio of transformer T under medium and high input voltage ranges is n₂ = 2n_p/n_s = 2n₁. The fundamental rms magnetizing voltage v_Lm,rms under different input voltage ranges is expressed as

$$v_{Lm,rms}=\left\{\begin{array}{cc}2\sqrt{2}{n}_1{V}_o,\hfill & 50 V \le V_{in}<100 V \\ 2\sqrt{2}{n}_2{V}_o=4\sqrt{2}{n}_1{V}_o,\hfill & 100 V \le V_{in}<400 V.\end{array}\right.$$

(3)

The relationship between the AC equivalent resistor R_eq on the input-side and the DC load resistor R_o is obtained in Equation (4):

$$R_{eq}=\left\{\begin{array}{cc}\frac{8n_1^2{R}_o}{{\pi }^2},\hfill & 50 V \le V_{in}<100 V \\ \frac{8n_2^2{R}_o}{{\pi }^2}=\frac{32n_1^2{R}_o}{{\pi }^2},\hfill & 100 V \le V_{in}<400 V.\end{array}\right.$$

(4)

Figure 6 shows the corresponding resonant tank of the presented circuit. The voltage transfer function of the corresponding resonant tank is derived and expressed in Equation (5):

$$\left|G_{ac}\right|=\frac{v_{out,LLC}}{v_{in,LLC}}=1/\sqrt{{\left[1+\frac{f_n^2-1}{l_n{f}_n^2}\right]}^2+x^2{\left(f_n-\frac{1}{f_n}\right)}^2}=\left\{\begin{array}{c}\begin{array}{c}\frac{n_1{V}_o}{V_{in}}, 50 V \le V_{in}<100 V\end{array}\\ \frac{2n_1{V}_o}{V_{in}}, 100 V \le V_{in}<200 V\\ \frac{4n_1{V}_o}{V_{in}}, 200 V \le V_{in}<400 V,\end{array}\right.$$

(5)

where $x=\sqrt{\left(L_{r,eq}/C_{r,eq}\right)}/R_{eq}$ is the quality factor where L_r,eq = L_r1 and C_r,eq = C_r1 for low input voltage range and L_r,eq = L_r1 + L_r2 = 2L_r1 and C_r,eq = C_r1 × C_r2 / (C_r1 + C_r2) = C_r1/2 for medium and high input voltage ranges; f_n = f_sw/f_r is the frequency ratio, and l_n = L_m,eq/L_r,eq is the inductor ratio. According to Equation (5), the DC load voltage V_o can be further rewritten as

$$V_o=V_{in}/m\sqrt{{\left[1+\frac{f_n^2-1}{l_n{f}_n^2}\right]}^2+x^2{\left(f_n-\frac{1}{f_n}\right)}^2},$$

(6)

where m = n₁, if 50 V ≤ V_in < 100 V; 2n₁, if 100 V ≤ V_in < 200 V; or 4n₁, if 200 V ≤ V_in < 400 V. On the basis of the actual input voltage value, the switching states of Q₁–Q₆ and S can be properly controlled. From Equation (6), the developed circuit has high voltage gain under low input voltage range. On the other hand, the converter has low voltage gain under high input voltage range.

4. Design Procedures and Test Results

The design procedures and test results of the presented circuit are verified in this section. A laboratory circuit was built and the electric specifications were V_in = 50–400 V, V_o = 48 V, and I_o,max = 10 A. The series resonant frequency was designed at 150 kHz. Due to L_r1 = L_r2 and C_r1 = C_r2, the series resonant frequencies for all three equivalent circuits shown in Figure 2 were identical and designed at 150 kHz. According to the voltage transfer function in Equation (5), the gain curves of the developed resonant converter with different input voltage ranges are given in Figure 7. The transition voltage V_{in,tran 1} between the low and medium input voltage ranges was designed at 100 V with ±5 V voltage tolerance. Similarly, the transition voltage V_{in,tran 2} between the medium and high input voltage ranges was designed at 200 V with ±5 V voltage tolerance. From Equation (6), one can observe that the voltage gain at the high input voltage range was about two (four) times of the voltage gain at the medium (low) input voltage range. The design procedures for three equivalent resonant circuits were almost identical. Therefore, the prototype circuit was designed at the low input voltage range to simplify the design consideration. The minimum voltage gain G_ac,min at the series resonant frequency was designed as unity and the transition voltage V_{in,trans 1} = 100 V. The turns ratio n₁ = n_p/n_s can be calculated from Equation (5) and expressed in Equation (7):

$$n_1=G_{ac,min}\times V_{in,tran 1}/V_o=1\times 100/48\approx 2.08.$$

(7)

Transformer T is implemented by the TDK (Tokyo Electric Chemical Industry Co., Ltd., Tokyo, Japan) magnetic core with ΔB = 0.4 tesla and A_e = 354 mm². The series resonant frequency was selected at 150 kHz. The primary turns of transformer are obtained in Equation (8):

$$n_{p,min}>n_1{V}_o/[f_{sw}\Delta B{A}_e\left]=2.08\times 48/\right[150000\times 0.4\times 0.000354]\approx 4.7.$$

(8)

The actual primary turns and secondary turns in the prototype circuit were n_p = 8 and n_s = 4. The equivalent resistance R_eq at the rated power is given in Equation (9):

$$R_{eq}=8n_1^2{R}_o/{\pi }^2=8\times 2^2\times \left(48/10\right)/{3.14159}^2=15.56 \Omega .$$

(9)

The inductor ratio l_n = L_m1/L_r1 = 3 and quality factor x = 0.25 were selected in the prototype circuit. L_r1 and L_r2 are obtained from Equation (10) and C_r1 and C_r2 are calculated in Equation (11):

$$L_{r1}=L_{r2}=\frac{x{R}_{eq}}{\left[2\pi f_r\right]}=4.13 \mathsf{\mu }\mathrm{H},$$

(10)

$$C_{r1}=C_{r2}=\frac{1}{4{\pi }^2{L}_{r1}{f}_r^2}\approx 273 \mathrm{nF}.$$

(11)

The magnetizing inductors L_m1 and L_m2 are expressed in Equation (12):

$$L_{m1}=L_{m2}=l_n\times L_{r1}\approx 12.4 \mathsf{\mu }\mathrm{H}.$$

(12)

The voltage stress of power MOSFETs (metal–oxide–semiconductor field-effect transistor) Q₁–Q₆ and switch S was the maximum input voltage V_in,max = 400 V. The theoretical voltage ratings of the rectifier diodes D₁ and D₂ were 2V_o = 98 V. Figure 8 shows the control block of the signals Q₁–Q₆ and S. Two Schmitt trigger comparators were used for transition voltages 100 and 200 V to select the correct range of input voltage. Figure 9 and

Table 1. Prototype circuit parameters.

Items	Symbol	Parameter
Input voltage	Vin	50–400 V
Output voltage	Vo	48 V
Rated load current	Io	10 A
Series resonant frequency	fr	150 kHz
Output capacitor	Co	1080 μF (1080 μF/100 V)
Resonant capacitors	Cr1, Cr2	273 nF
Power MOSFETs	Q1–Q6, S	Infineon-6R070P6
Resonant inductors	Lr1, Lr2	4.13 μH
Rectifier diodes	D1, D2	PS30M100SFP
Primary and secondary turns of T	np, ns	8 turns, 4 turns

give the photographs and all circuit components used in the prototype circuit, respectively. Figure 9a shows the photograph of the prototype circuit. The control board for selecting the correct range of input voltage and the consequent bridge configuration is given in Figure 9b. The experimental setup, including the test equipment, is provided in Figure 9c. The list of equipment that was used to record the results is as follows: Chroma 62012P-600-8 (DC voltage source), Chroma 63112A (DC electronic load), TCP302 and TCP312 (current probe), TDS3014 (digital oscilloscope), and SI-9110 (isolated voltage probe).

The experimental waveforms of the developed circuit operated at low input voltage range (V_in = 50–100 V) are shown in Figure 10 and Figure 11. In the low input voltage range, power switches S, Q₅, and Q₆ were off and only switches Q₁–Q₄ were controlled with frequency modulation. Figure 10 illustrates the experimental results at V_in = 50 V input and full load. Figure 10a gives the test waveforms of v_Q1,g–v_Q4,g. The switching frequency f_sw under the rated power and V_in = 50 V was about 100 kHz. Figure 10b provides the test waveforms of primary-side current i_Lr1, capacitor voltage v_Cr1, and leg voltage v_ab. Due to the switching frequency f_sw = 100 kHz < f_r = 150 kHz, the resonant current i_Lr1 was a quasi-resonant waveform. Figure 10c shows the experimental waveforms of V_o, I_o, i_D1, and i_D2. One can observe that the output voltage was regulated at 48 V output, the load current I_o was 10 A, and the diodes D₁ and D₂ turned off at zero current switching. Figure 11 gives the experimental results at the rated power and V_in = 95 V. The measured gate voltages v_Q1,g–v_Q4,g are given in Figure 11a. The test results of v_ab, v_Cr1, and i_Lr1 are illustrated in Figure 11b. Because the switching frequency f_sw at V_in = 95 V was almost equal to f_r, the measured resonant inductor current i_Lr1 was a sinusoidal waveform. The experimental waveforms of V_o, I_o, i_D1, and i_D2 at the rated power and V_in = 95 V are demonstrated in Figure 11c. V_o was regulated well at 48 V output under I_o = 10 A. Figure 12 and Figure 13 give the test results under the medium input voltage range (V_in = 100–200 V). Under the medium input voltage range, switches Q₃ and Q₄ were off and S was on. Figure 12 shows the test results under V_in = 105 V and full load. Figure 12a gives the measured gate voltages v_Q1,g, v_Q2,g, v_Q5,g, and v_Q6,g. The measured switching frequency f_sw was about 84 kHz. Figure 12b provides the test results of v_Cr1, i_Lr1, v_Cr2, and i_Lr2. Because f_sw = 84 kHz < f_r = 150 kHz, the resonant currents i_Lr1 and i_Lr2 were the quasi-sinusoidal waveforms. Figure 12c provides the measured waveforms of V_o, I_o, i_D1, and i_D2 at the rated power and V_in = 105 V. The diodes D₁ and D₂ turned off at zero current switching. Similarly, the measured waveforms of the proposed converter under V_in = 195 V and full load are provided in Figure 13. The measured switching frequency f_sw = 163 kHz at V_in = 195 V and full load so that i_Lr1 and i_Lr2 were the sinusoidal waveforms, as shown in Figure 13b. Under the high input voltage range (V_in = 200–400 V), power switches Q₃, Q₄, and Q₅ were off, and S and Q₆ were on. Figure 14 shows the experimental waveforms under V_in = 205 V, V_o = 48 V, and P_o = 480 W. Figure 14a shows the measured gate voltages v_Q1,g, v_Q2,g, v_S,g, and v_Q6,g. The measured switching frequency f_sw = 82 kHz at V_in = 205 V. Figure 14b provides the measured waveforms i_Lr1, i_Lr2, v_Cr1, and v_Cr2. Due to f_sw (82 kHz) < f_r (150 kHz), the measured currents i_Lr1 and i_Lr2 were the quasi-sinusoidal waveforms. Figure 14c gives the measured waveforms V_o, I_o, i_D1, and i_D2. The diodes D₁ and D₂ turned off at zero current with soft switching operation. Figure 15 provides the experimental waveforms at the rated power and V_in = 400 V. The switching frequency f_sw = 160 kHz. The measured switch waveforms of Q₁ at V_in = 50, 95, 195, and 400 V cases are measured in Figure 16. One can observe that Q₁ all turned on at zero voltage switching. It can be predicted that Q₂–Q₆ were also turned on under zero voltage due to the LLC (inductor-inductor-capacitor) series resonant behavior. Figure 17 provides the measured circuit efficiencies for different load power (20%, 50%, and 100% loads) and input voltages (V_in = 50–400 V). For the same output power, the primary-side current at low input voltage range such as V_in = 50 V was greater than high input voltage range such as V_in = 205 V. This will introduce more conduction losses on the primary-side components under low input voltage range. Therefore, the presented circuit had better circuit efficiency at the high input voltage range.

5. Conclusions

The main contribution of the proposed converter is wide voltage operation capability compared to the conventional single-stage or two-stage converters. In conventional single-stage or two-stage PWM converters or resonant converters, the input voltage variation range is normally less than a 4:1 voltage range. The presented circuit has three equivalent operation circuits with half bridge to full bridge circuit topology to change the voltage gain between the output and input voltages. Each equivalent resonant circuit can achieve a 2:1 input voltage operation range, that is, V_in,max = 2V_in,min. Therefore, three equivalent resonant circuits can achieve an 8:1 wide input voltage range operation, that is, V_in,max = 8V_in,min. For the low input voltage range, the full-bridge resonant converter with low turns ratio of transformer is operated to obtain the higher voltage gain between the load voltage and input voltage. For the medium input voltage range, the other full bridge resonant circuit topology with high turns ratio is selected to obtain the lower voltage gain. The half bridge resonant converter is selected to achieve the lowest voltage gain under the high input voltage range. Therefore, the presented converter with three equivalent sub-circuits can accomplish an 8:1 wide input voltage operation. Due to resonant circuit characteristics, the power switches can have soft switching operation over wide range of load conditions. Three equivalent sub-circuits are selected according to the input voltage range with two Schmitt comparators. The applications of the presented resonant circuit can be the front stage of solar power conversion with wide input voltage variation. The theoretical converter characteristics were confirmed by the measured waveforms from a laboratory circuit. The measured results confirmed the converter performance with wide voltage range operation. The further works of this project are to increase the circuit efficiency by using the synchronous rectifiers on the output side and designing the isolated transformer with minimum core and copper losses.