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Article

Analysis of a Three-Level Bidirectional ZVS Resonant Converter

Department of Electrical Engineering, NYUST, 123, Section 3, University Road, Yunlin 640, Taiwan
*
Author to whom correspondence should be addressed.
Appl. Sci. 2020, 10(24), 9136; https://doi.org/10.3390/app10249136
Submission received: 9 November 2020 / Revised: 17 December 2020 / Accepted: 18 December 2020 / Published: 21 December 2020
(This article belongs to the Special Issue Resonant Converter in Power Electronics Technology)

Abstract

:
A bidirectional three-level soft switching circuit topology is proposed and implemented for medium voltage applications such as 750 V dc light rail transit, high power converters, or dc microgrid systems. The studied converter is constructed with a three-level diode-clamp circuit topology with the advantage of low voltage rating on the high-voltage side and a full-bridge circuit topology with the advantage of a low current rating on the low-voltage side. Under the forward power flow operation, the three-level converter is operated to regulate load voltage. Under the reverse power flow operation, the full-bridge circuit is operated to control high-side voltage. The proposed LLC resonant circuit is adopted to achieve bidirectional power operation and zero-voltage switching (ZVS). The achievability of the studied bidirectional ZVS converter is established from the experiments.

1. Introduction

Renewable power to reduce the effect of global warming has been developed by using high efficiency power electronic based converters in local dc nanogrid or microgrid distribution [1,2,3,4,5,6] between renewable energy power and local dc or ac loads. In order to maintain the voltage stability on dc distribution system, energy storage power units are usually demanded between battery banks and dc bus system to save (or restore) excess (or insufficient) energy on the dc bus. Therefore, the bidirectional pulse-width modulation (PWM) converters have been proposed for the battery-based systems [7,8,9,10,11,12,13,14] such as electric vehicles, hybrid electric vehicles, and dc microgrids. In dc microgrids, the unipolar voltage (380 V) or bipolar voltage (±380 V or 760 V) distribution can be adopted on the dc bus voltage. High frequency link medium voltage converters have been used for dc traction power units, three phase industry power supplies and dc microgrids. Three-level dc converters with 600 V MOSFETs or conventional PWM converters with 1200 V IGBTs or SiCs have been presented in medium voltage input applications. The drawback of 1200 V IGBT is low switching frequency and the cost of 1200 V SiC is expensive. Bidirectional PWM converters with dual active bridge (DAB) structure have been studied to realize forward and reverse power transfer. Three-level bidirectional converters or cascaded converters with the high frequency MOSFETs have been developed for high voltage systems such as 760 V input. PWM scheme is widely adopted in bidirectional DAB systems to control power flow and realize soft switching turn-on characteristics. However, the control scheme for generating the PWM signals is complicated and the circulating current under low duty cycle is high. Resonant converters have the benefits of high circuit efficiency and low electromagnetic interference. A full-bridge resonant circuit topology was proposed in [15] to achieve bidirectional power transfer. However, the soft switching characteristics cannot be achieved in backward power flow. Bidirectional Full-bridge resonant converters presented in [16,17,18] have symmetric circuit structure to achieve forward and backward power flow so that power switches can realize zero-voltage switching. However, there is a circulating current on the parallel inductor in primary-side which will result in addition conduction loss during forward power flow.
A soft switching three-level resonant converter is developed for high voltage to low voltage conversion. The profits of the developed converter are forward and backward power flow capability and zero-voltage turn-on characteristic. Three-level diode-clamp circuit topology is used on the primary-side and full-bridge circuit topology is adopted on the secondary-side. The LLC circuit tank is employed to control load voltage and achieve zero-voltage switching on active devices. For forward power transfer, the three-level diode-clamp converter is controlled using the pulse-frequency modulation (PFM) to control low-side voltage and active devices of full-bridge converter on the secondary-side are operated as synchronous rectifiers. In order to implement the same resonant circuit structures for bidirectional power flow, an additional inductor is connected on the primary-side during the reverse power flow condition. In reverse power flow operation, the full-bridge converter on the low-voltage side is operated with PFM scheme to control high-side voltage. The proposed converter with bidirectional power flow capability can be applied in local dc nanogrid or microgrid distribution between renewable energy power and local dc or ac loads. The circuit schematic and circuit operation are provided and discussed in Section 2 and Section 3. The circuit characteristic and experiments with a 1.44 kW laboratory circuit are demonstrated and discussed to show the feasibility of the studied bidirectional power converter in Section 4. Finally, a conclusion of the studied converter is given in Section 5.

2. Circuit Schematic of the Developed Converter

Figure 1a provides the converter schematic of the studied bidirectional converter. There is a three-level diode-clamp circuit topology on the high-voltage side with the benefit of using low voltage rating switches. Clamped diodes Da and Db and capacitor Cf are used to balance input voltages VCH1 = VCH2 and reduce the voltage stress on S1~S4. Full bridge circuit topology is used on the low-voltage side to achieve full-wave rectification. Sac and Lb are series-connection and connect to points a and b in order to achieve LLC circuit operation under backward power flow operation (Sac is ON). For forward power operation from VH (high-side voltage) to VL (low-side voltage), Sac is OFF and Lb is disconnected on the primary-side. Figure 1b gives the circuit structure under forward power operation. S1~S4 are main power devices to control output voltage VL. Lr, Lm and Cr are LLC resonant circuit and Q1~Q4 are activated as synchronous switches. For reverse power operation from the VL terminal to the VH terminal, Sac is ON and Figure 1c provides the circuit diagram of reverse power operation. Switches Q1~Q4 are major power switches and Lr, Lb and Cr are resonant circuit. DS1~DS4 are operated as a full-wave diode rectifier. Therefore, LLC resonant characteristics for both power flow are achieved and the turn-on switching loss of major power switches is removed.

3. Circuit Operation

For forward power delivery, the electric power energy is transferred from VH side to VL side and Sac is OFF. S1~S4 are controlled with PFM scheme. Due to PWM signals of S1~S4, there is a square wave with −VH/2 or VH/2 on the leg voltage vab. However, Q1~Q4 are operated as the synchronous switches instead of the rectifier diodes in conventional full-bridge rectifier to reduce conduction loss. The equivalent resonant circuit and PWM waveforms for forward power delivery are provided in Figure 2. To realize the ZVS operation of S1~S4, the input impedance of LLC circuit must be inductive. Figure 3 gives the corresponding equivalent circuits related to six operating steps in a switching period under fr (resonant frequency) > fsw (switching frequency). It is assumed that the Lr represents the external series resonant inductance and the leakage inductance of transformer and Cr represents the external series resonant capacitance and the parasitic capacitance on transformer winding turns. The output capacitances CS1CS4 are assumed to be identical. In the same manner, CQ1 = … = CQ4. Since the current iCf on Cf is less than iS1 and iS2 in mode 1 and iS3 and iS4 in mode 4, iCf is ignored in PWM waveforms. Therefore, iS1 is equal to iS2 in steps 1–3 and 6 and iS3 is equal to iS4 in steps 3–6.
Step 1 (t0t < t1): At t < t0, iLr < 0. Thus, iLr discharges CS1 and CS2 are discharged. At t0, vCS1 = vCS2 = 0. Thus, DS1 and DS2 are conducting due to iLr < 0. The ZVS operation of S1 and S2 can be achieved after time t0. If iLr < 0, Db is forward biased. The leg voltage vab = vCf = vCS3 = vCS4 = VH/2. Since iLr > iLm, Q1 and Q4 turn on to conduct the secondary-side current. When iLr increases and iLr > 0, Db becomes off. In this step, the magnetizing voltage vLm is equal to nVL, where n = np/ns is the transformer turns ratio, and iLm increases. The ripple current ΔiLm in step 1 is equal to nVLΔt01/Lm where Δt01 = t1t0. The resonant frequency in step 1 is f r = 1 / ( 2 π L r C r ) .
Step 2 (t1t < t2): If fsw < fr, iQ1 and iQ4 will decrease to zero ampere at t1. Thus, Q1 and Q4 can turn off after time t1. In step 2, the leg voltage vab = VH/2 and Lr, Lm and Cr are resonant.
Step 3 (t2t < t3): At t2, S1 and S2 turn off. The positive current iLr(t2) will charge CS1 and CS2. On the other hand, CS3 and CS4 are discharged in this step. The ZVS operation of S3 and S4 is expressed in Equation (1).
i L m , p V H 2 C S L r
where iLm,p is the peak current on Lm and CS = CS1 = … = CS4. The peak current iLm,p is calculated from Equation (2).
i L m , p = Δ i L m 2 n V L T s w 4 L m
The dead time td between S3 and S1 (or S4 and S2) is approximately expressed in Equation (3).
t d > C S V H i L m , p = 4 L m C S V H n V L T s w
Therefore, the maximum magnetizing inductance is derived in Equation (4).
L m n V L t d T s w 4 C S V H
Step 4 (t3t < t4): At t3, vCS3 = vCS4 = 0. Since iLr(t3) is positive, DS3 and DS4 are conducting. Power devices S3 and S4 can turn on after t3 under zero voltage condition. Since iLr(t3) > 0, Da is forward biased. The leg voltage vab = −VH/2 and vCf = vCS1 = vCS2 = VH/2. When iLr decreases and iLr < 0, Da becomes off. On the secondary side, iQ2(t3) < 0 and iQ3(t3) < 0. Therefore, Q2 and Q3 turn on to conduct the secondary-side current, the primary-side voltage vLm = −nVL and iLm decreases.
Step 5 (t4t < t5): The secondary-side switch currents iQ2 = iQ3 = 0 at t4. Then, Q2 and Q3 turn off. In this step, vab = −VH/2 and Lr, Lm and Cr are resonant.
Step 6 (t5t <Tsw+t0): At t5, S3 and S4 turn off. In this step, iLr(t5) < 0 and vCS1 and vCS2 decrease. The ZVS condition of S2 and S1 is the same as S4 and S3 in Equation (1). The step 6 is ended at time Tsw+t0.
The LLC resonant circuit is controlled to achieve ZVS operation and the bidirectional power operation. The resonant circuit is based on the fundamental frequency analysis to achieve load voltage regulation. According to the switching status of power devices S1~S4 and Q1~Q4, the voltage values VH/2 and −VH/2 are observed on vab, and the other voltage values nVL and −nVL are generated on the magnetizing inductor voltage vLm. Lr, Cr, Lm and Rac,L operate as a filter to suppress the high order harmonics. The root mean square (rms) voltages at the fundamental frequency for input and output sides are v a b , r m s = 2 V H / π and v L m , r m s = 2 2 n V L / π . Based on the power balance between the primary-side and the secondary-side of transformer, the primary-side load resistance is expressed as R a c , L = 8 n 2 R L / π 2 . The transfer function GH_L(s) between the output and input sides in Figure 2a is obtained as:
G H _ L ( s ) = v L m , r m s ( s ) v a b , r m s ( s ) = s L m R a c , L s L m + R a c , L s L m R a c , L s L m + R a c , L + s L r + 1 s C r
| G H _ L ( F ) | = K 1 F 2 [ F 2 ( K 1 + 1 ) 1 ] 2 + [ Q 1 K 1 F ( F 2 1 ) ] 2
where F = fsw/fr, f r = 1 / ( 2 π L r C r ) , K1 = Lm/Lr and Q 1 = L r / C r / R a c , L . From the given input voltage VH, the output voltage VL and the circuit parameters Lr, Cr, Lm and RL, the switching frequency is obtained from Equation (6).
For reverse power flow shown in Figure 1c, the developed converter transfers power from VL terminal to VH terminal. Sac is turned on and Lb, Lr and Cr are operated as a series resonant circuit to achieve voltage VH regulation. Power devices Q1~Q4 are controlled with PFM scheme and DS1~DS4 work as a full-wave rectifier. When |iLr|>|iLb|, DS1 and DS2 or DS3 and DS4 are conducting. Since the LLC resonant circuit by Lr, Cr and Lb is operated at the inductive load, power devices Q1~Q4 are operated at the zero-voltage turn-on switching. Figure 4a shows the ac equivalent resonant circuit at reverse power flow operation. Lb and Rac,H are the parallel inductance and ac equivalent resistance. Figure 4b gives the main PWM waveforms and Figure 5 demonstrates the corresponding equivalent circuits at the reverse power flow operation.
Step 1 (t0t < t1): This step starts at t0 when vCQ4 = vCQ1 = 0. Then, the DQ4 and DQ1 conduct and vQ2,ds = vQ3,ds = VL. Due to DQ1 and DQ4 are conducting, vQ4,ds and vQ1,ds = 0 and Q1 and Q4 can turn on under zero voltage. Due to iLr(t0) + iLb(t0)<0, DS1 and DS2 are forward biased, CH1 is charged, vLm = nVL, vab = VH/2 and iLm and iLb both increase. Before switches Q1 and Q4 turn off, iDS1 and iDS2 will decrease to zero if fsw < f r = 1 / 2 π C r L r .
Step 2 (t1t < t2): At time t1, iDS2 = iDS1 = 0 and DS2 and DS1 are off. Lr, Lb, and Cr are series resonant at frequency f p = 1 / 2 π C r ( L b + L r ) .
Step 3 (t2t < t3):Q4 and Q1 turn off at t2. CQ2 and CQ3 are discharged in step 3. The ZVS condition of Q3 and Q2 are obtained in Equation (7).
( L b + L r ) i L b , p 2 + L m i L m , p 2 2 C Q V L 2
where CQ = CQ1 =..= CQ4, i L m , p n V L / ( 4 L m f s w ) and i L b , p V H / ( 8 L b f s w ) . At t3, vCQ3(t3) = vCQ2(t3) = 0. The time interval Δt23 is expressed in Equation (8).
Δ t 23 2 V L C Q n [ i L m , p + i L b , p ] = 16 L m L b f s w V L C Q n ( 2 n L b V L + L m V H ) t d
where td is dead time between Q4 and Q3 or Q2 and Q1.
Step 4 (t3t < t4): Step 4 starts at t3 when vCQ2 = vCQ3 = 0. Therefore, DQ3 and DQ2 conduct and Q3 and Q2 can turn on under zero voltage. In step 4, DS3 and DS4 conduct, vab = −VH/2, vLm = −nVL, and iLm and iLb both decrease.
Step 5 (t4t < t5):iDS3 = iDS4 = 0 at t4. In this step, Q2 and Q3 are still in the on state so that vLm = −nVL. Lb, Cr and Lr are series resonant.
Step 6 (t5t < Tsw+t0):Q2 and Q3 turn off at t5. Then, CQ1 and CQ4 are discharged and vCQ1 = vCQ4 = 0 at tsw + t0.
The proposed converter has the similar operation principle for both forward and reverse power operation. For the reverse power operation, Q1~Q4 are controlled as main power switches. DS1~DS4 are operated as diode rectifier to regulate voltage VH. The resonant circuit including Lb, Lr and Cr is operated as a filter to suppress high order harmonics. The input rms voltage at fundamental frequency (Figure 4a) is calculated as v L m , r m s = 2 2 n V L / π and the ac equivalent resistance at high voltage side is R a c , H = 2 R H / π 2 . The rms voltage on vab is expressed as v a b , r m s = 2 V H / π . Components Rac,H, Lb, Lr and Cr are resonant. The transfer function GL_H(s) and gain |GL_H(s)| are calculated in Equations (9) and (10), respectively.
G L _ H ( s ) = v a b , r m s ( s ) v L m , r m s ( s ) = s L b R a c , H s L b + R a c , H s L b R a c , H s L b + R a c , H + 1 s C r + s L r
| G L _ H ( F ) | = K 2 F 2 [ ( F 2 1 ) Q 2 K 2 F ] 2 + [ F 2 ( K 2 + 1 ) 1 ] 2
where F = fsw/fr, f r = 1 / ( 2 π L r C r ) , K2 = Lb/Lr and Q 2 = L r / C r / R a c , H . From the given input voltage VH, output voltage VL and the circuit parameters Lr, Cr, Lb and RH, the switching frequency is obtained from Equation (10).

4. Circuit Parameters and Test Results

For forward power transfer, the input and output voltages are VH = 750 V to 800 V and VL = 48 V. The rated power is 1440 W (vL = 48 V and IL= 30 A). For reverse power transfer, the input and output voltages are VL = 36 V to 52 V and VH = 800 V. The transfer functions in Equations (6) and (10) for forward and backward power transfer operations are similar. Thus, the circuit parameters design operated at forward power flow is presented in this section. The dc voltage gain under VH = 800 V input and VL,max = 52 V output is designed to be unity. The transformer turns ratio is calculated in Equation (11).
n = | G H _ L | × V H , max 2 V L , max 7.7
In the prototype circuit, the selected primary and secondary turns are nH = 48 and nL = 6. Thus, the actual transformer turns ratio is n = nH/nL = 8. With the adopted turns ratio, the actual maximum and minimum voltage gains at VL,nom = 48 V condition are given in Equations (12) and (13).
| G H _ L | max = 2 n V L , n o m V H , min 1.024
| G H _ L | min = 2 n V L , n o m V H , max 0.96
The control parameters K1 and Q1 can be selected at full load PL,full and minimum input voltage VH,min conditions. To reduce circulating current, the inductor ratio K1=10 is used in this prototype circuit. For Q1 = 0.38 and K1 = 10, it can obtain the peak gain of |GH_L(s)| is 1.13. The ac equivalent resistance Rac,L at the rated power is obtained in Equation (14).
R a c , L = 8 n 2 π 2 R L = 8 × ( 48 / 6 ) 2 3.14159 2 × 48 30 83 Ω
The circuit parameters C r = 1 / 2 π Q 1 f r R a c , L 50   nF and L r = 1 / ( 2 π f r ) 2 C r 50   μ H under fr = 100 kHz. The actual resonant inductance and capacitance are Cr = 47 nF and Lr = 54 µH and the magnetizing inductance L m = K 1 L r = 540   μ H . The theoretical primary rms current is calculated as:
I p r i , r m s = π I o 2 2 n 4.2   A
The theoretical minimum switching frequency is obtained as f s w , min = 1 / 2 π C r ( L r + L m ) 30   kHz . The minimum switching frequency will result in the maximum rms magnetizing current.
I L m , r m s = 1 2 3 n V L 4 f s w , min L m 1.7   A
Therefore, the rms resonant inductor current is obtained in Equation (17).
I L r , r m s = I L m , r m s 2 + I p r i , r m s 2 4.53   A
The flying capacitor Cf is used to realize voltage balance of CH1 and CH2 so that VCH1 = VCH2 = VH/2. The theoretical voltage stresses of power semiconductors can be calculated as vS1,stress = .. = vS4,stress = VH,max/2 = 400 V and vQ1,stress = .. = vQ4,stress = VL,max = 52 V. The switch currents approximate I S 1 , r m s = .. = I S 4 , r m s I L r , r m s / 2 3.2   A and I Q 1 , r m s = .. = I Q 4 , r m s π I o / 4 23.6   A . Power devices S1~S4 are implemented using IRG4PC40W with 600 V/20 A rating. Power switches Q1~Q4 are implemented using IRFB3307 with 75 V/150 A rating. Sac is implemented using two G20N50C with 500 V/20 A rating. The parallel inductor Lb is selected as 230 µH and K2 = Lb/Lr = 4.25 under reverse power flow operation. The clamp diodes Da and Db are implemented with ultrafast recovery diodes HFA15TB60PBF with 600 V/15 A rating. The other circuit parameters used in the prototype are CH1 = CH2 = 330 µF/400 V, Cf = 2.2 µF/630 V and CL = 4400 µF/100 V. The parameters and specifications used in the laboratory prototype are given in Table 1.
Figure 6, Figure 7, Figure 8, Figure 9 and Figure 10 provide the test results for forward power operation and Figure 11, Figure 12, Figure 13 and Figure 14 provide the measured waveforms for reverse power operation. The PWM signals of S1S4 at 100% load are presented in Figure 6. S1 (S3) and S2 (S4) have the same gate-to-source voltage signals. The converter at VH = 750 V input has less switching frequency than VH = 800 V input condition. Figure 7 gives the experimental results of leg voltage vab, iLr and vCr at 100% load. It can be seen that the measured waveforms iLr and vCr are almost the sinusoidal waves due to fsw close to fr for both 750 V and 800 V inputs. Figure 8 shows the experimental results of VCH1, VCH2, VCf, VDa and VDb. The dc voltage differences between VCH1, VCH2 and VCf are about 5V. Figure 9 demonstrates the switch currents of Q1–Q4 at 100% load. Figure 10 illustrates the PWM waveforms of S1S4 at 20% load. It can observe that S1S4 all turn on under ZVS at 20% load. Figure 11 gives the PWM signals of Q1~Q4 under backward power operation and different input voltages. Power devices Q1 (Q2) and Q4 (Q3) have the same gate-to-source voltage signals. Figure 12 illustrates the measured results of iLr, iLb and vCr under for reverse power operation. The parallel inductor current iLb is similar to the magnetizing current on conventional LLC resonant converter to achieve voltage step-up capability. Figure 13 shows the measured capacitor voltages VCf, VCH1 and VCH2 on the high voltage side. These three voltages VCH1, VCH2 and VCf are almost balanced with about 7 V voltage difference. Figure 14 gives the measured PWM waveforms of Q1~Q4 under 20% load. It can observe that Q1Q4 can turn on under zero voltage at 20% load. For forward power operation (buck mode), the measured circuit efficiencies are 89.7% at 20% load, 92.1% at 50% load and 91.8% at 100% load under 800 V input. For reverse power operation (boost mode), the measured circuit efficiencies are 86.3% at 20% load, 89.4% at 50% load and 88.9% at 100% load under 40 V input case. Figure 15a gives the picture of the prototype circuit and the experimental setup is given in Figure 15b.

5. Conclusions

A new three-level resonant converter is proposed, analyzed, and discussed to realize bidirectional power transfer and soft switching operation capability. A three-level diode clamp series resonant converter is used on the high-voltage side to have low voltage rating on active devices. For forward power operation, the conventional LLC circuit is selected to have ZVS operation on all power switches. Full-wave rectifier with synchronous switches is adopted on the low-voltage side to reduce conduction loss on power semiconductors. To overcome the low voltage gain problem on conventional LLC converter under reverse power operation, a parallel inductor is connected to the leg terminal of three-level diode-clamp resonant converter. Thus, the proposed converter can achieve voltage step-up and step-down for forward and reverse power operation by using PFM scheme. Compared to the bidirectional LLC circuit [15], the proposed converter can achieve ZVS operation for both power flow directions. Compared to the symmetric LLC converters in [16,17,18], the proposed LLC converter has less freewheeling current on primary-side for forward power operation. However, one ac switch is needed in the studied circuit compared to conventional bidirectional LLC circuit topology. Finally, the theoretical analysis is confirmed by experiments with a laboratory prototype.

Author Contributions

B.-R.L. designed this project and was responsible for formal analysis, writing and editing this paper. W.-P.L. measured the experimental waveforms. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by the Ministry of Science and Technology, Taiwan, under research project MOST 108-2221-E-224-022-MY2.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Proposed converter (a) converter structure (b) forward power flow operation (Sac off) (c) backward power flow operation (Sac on, S1~S4 off).
Figure 1. Proposed converter (a) converter structure (b) forward power flow operation (Sac off) (c) backward power flow operation (Sac on, S1~S4 off).
Applsci 10 09136 g001aApplsci 10 09136 g001b
Figure 2. Forward power operation (a) the equivalent LLC resonant circuit (b) pulse-width modulation (PWM) waveforms.
Figure 2. Forward power operation (a) the equivalent LLC resonant circuit (b) pulse-width modulation (PWM) waveforms.
Applsci 10 09136 g002
Figure 3. The corresponding equivalent circuits related to six operating steps for forward power operation (a) step 1 circuit (b) step 2 circuit (c) step 3 circuit (d) step 4 circuit (e) step 5 circuit (f) step 6 circuit.
Figure 3. The corresponding equivalent circuits related to six operating steps for forward power operation (a) step 1 circuit (b) step 2 circuit (c) step 3 circuit (d) step 4 circuit (e) step 5 circuit (f) step 6 circuit.
Applsci 10 09136 g003aApplsci 10 09136 g003bApplsci 10 09136 g003c
Figure 4. The proposed circuit operated at reverse power flow (a) the equivalent LLC resonant circuit (b) PWM waveforms.
Figure 4. The proposed circuit operated at reverse power flow (a) the equivalent LLC resonant circuit (b) PWM waveforms.
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Figure 5. The corresponding equivalent circuits related to six operating steps under backward power transfer (a) step 1 circuit (b) step 2 circuit (c) step 3 circuit (d) step 4 circuit (e) step 5 circuit (f) step 6 circuit.
Figure 5. The corresponding equivalent circuits related to six operating steps under backward power transfer (a) step 1 circuit (b) step 2 circuit (c) step 3 circuit (d) step 4 circuit (e) step 5 circuit (f) step 6 circuit.
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Figure 6. Measured PWM signals of S1S4 at full load (a) VH = 750 V (b) VH = 800 V (vS1,g~vS4,g: 10 V/div; time: 2 µs).
Figure 6. Measured PWM signals of S1S4 at full load (a) VH = 750 V (b) VH = 800 V (vS1,g~vS4,g: 10 V/div; time: 2 µs).
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Figure 7. Measured results of vab, iLr and vCr at full load (a) VH = 750 V (b) VH = 800 V (vab: 500V/div; iLr: 10 A/div; vCr: 200 V/div; time: 2 µs).
Figure 7. Measured results of vab, iLr and vCr at full load (a) VH = 750 V (b) VH = 800 V (vab: 500V/div; iLr: 10 A/div; vCr: 200 V/div; time: 2 µs).
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Figure 8. Measured results of VCf, VCH1, VCH2, VDa and VDb at full load (a) VH = 750 V (b) VH = 800 V (vCf, VCH1, VCH2, VDa, VDb: 500 V/div; time: 2 µs).
Figure 8. Measured results of VCf, VCH1, VCH2, VDa and VDb at full load (a) VH = 750 V (b) VH = 800 V (vCf, VCH1, VCH2, VDa, VDb: 500 V/div; time: 2 µs).
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Figure 9. Measured switch currents of Q1–Q4 under full load (a) VH = 750 V (b) VH = 800 V (−iQ1~−iQ4: 50 A/div; time: 2 µs).
Figure 9. Measured switch currents of Q1–Q4 under full load (a) VH = 750 V (b) VH = 800 V (−iQ1~−iQ4: 50 A/div; time: 2 µs).
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Figure 10. Measured PWM waveforms of S1S4 at 20% load (a) S1 waveforms (b) S2 waveform (c) S3 waveform (d) S4 waveform (vS1,gvS4,g: 10 V/div; vS1,dvS4,d: 200 V/div; iS1~iS4: 2 A/div; time: 1 µs).
Figure 10. Measured PWM waveforms of S1S4 at 20% load (a) S1 waveforms (b) S2 waveform (c) S3 waveform (d) S4 waveform (vS1,gvS4,g: 10 V/div; vS1,dvS4,d: 200 V/div; iS1~iS4: 2 A/div; time: 1 µs).
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Figure 11. Measured PWM signals of Q1~Q4 for reverse power operation and full load (a) VL = 36 V (b) VL = 52 V (vQ1,gs~vQ4,gs: 10 V/div; time: 2 µs).
Figure 11. Measured PWM signals of Q1~Q4 for reverse power operation and full load (a) VL = 36 V (b) VL = 52 V (vQ1,gs~vQ4,gs: 10 V/div; time: 2 µs).
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Figure 12. Measured results of iLr, iLb and vCr for reverse power operation and full load (a) VL = 36 V (b) VL = 52 V (iLr, iLb: 10 A/div; vCr: 500 V/div; time: 4 µs).
Figure 12. Measured results of iLr, iLb and vCr for reverse power operation and full load (a) VL = 36 V (b) VL = 52 V (iLr, iLb: 10 A/div; vCr: 500 V/div; time: 4 µs).
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Figure 13. Measured results of VCf, VCH1, and VCH2 under reverse power operation and full load (vCf, VCH1, VCH2, VDa, VDb: 200 V/div; time: 4 µs).
Figure 13. Measured results of VCf, VCH1, and VCH2 under reverse power operation and full load (vCf, VCH1, VCH2, VDa, VDb: 200 V/div; time: 4 µs).
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Figure 14. Measured waveforms of power devices Q1~Q4 under reverse power operation and 20% load (a) Q1 waveform (b) Q2 waveform (c) Q3 waveform (d) Q4 waveform (vQ1,gvQ4,g: 10 V/div; vQ1,dvQ4,d: 50 V/div; iQ1iQ4: 20 A/div; time: 2 µs)
Figure 14. Measured waveforms of power devices Q1~Q4 under reverse power operation and 20% load (a) Q1 waveform (b) Q2 waveform (c) Q3 waveform (d) Q4 waveform (vQ1,gvQ4,g: 10 V/div; vQ1,dvQ4,d: 50 V/div; iQ1iQ4: 20 A/div; time: 2 µs)
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Figure 15. Pictures of the presented circuit: (a) prototype circuit; (b) experimental setup.
Figure 15. Pictures of the presented circuit: (a) prototype circuit; (b) experimental setup.
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Table 1. Parameters and specifications of the presented converter.
Table 1. Parameters and specifications of the presented converter.
ItemsParameter
High voltage VH750 V~800 V
Low voltage VL48 V
Rated power Po1440 W
Resonant frequency fr100 kHz
High-side capacitances CH1, CH2330 µF/400 V
Low-side capacitance CL4400 µF/100 V
Resonant capacitance Cr47 nF
Flying capacitance Cf2.2 µF
Resonant inductance Lr54 µH
Parallel inductance Lb230 µH
Power switches S1~S4IRG4PC40W (600 V/20 A)
Power switches Q1~Q4IRFB3307 (75 V/150 A)
Power switch SacG20N50C (500 V/20 A)
Clamp diodes Da, DbHFA15TB60PBF (600 V/15 A)
Winding turns of T: nH, nL48, 6
Magnetizing inductance Lm540 µH
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Lin, B.-R.; Liu, W.-P. Analysis of a Three-Level Bidirectional ZVS Resonant Converter. Appl. Sci. 2020, 10, 9136. https://doi.org/10.3390/app10249136

AMA Style

Lin B-R, Liu W-P. Analysis of a Three-Level Bidirectional ZVS Resonant Converter. Applied Sciences. 2020; 10(24):9136. https://doi.org/10.3390/app10249136

Chicago/Turabian Style

Lin, Bor-Ren, and Wei-Po Liu. 2020. "Analysis of a Three-Level Bidirectional ZVS Resonant Converter" Applied Sciences 10, no. 24: 9136. https://doi.org/10.3390/app10249136

APA Style

Lin, B. -R., & Liu, W. -P. (2020). Analysis of a Three-Level Bidirectional ZVS Resonant Converter. Applied Sciences, 10(24), 9136. https://doi.org/10.3390/app10249136

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