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Article

Fermi-Level Pinning Mechanism in MoS2 Field-Effect Transistors Developed by Thermionic Emission Theory

1
School of Materials Science and Engineering, Shanghai University, Shanghai 200444, China
2
Organic Optoelectronics Engineering Research Center of Fujian’s Universities, College of Electronics and Information Science, Fujian Jiangxia University, Fuzhou 350108, China
3
College of Science, Shanghai Institute of Technology, Shanghai 201418, China
*
Authors to whom correspondence should be addressed.
Appl. Sci. 2020, 10(8), 2754; https://doi.org/10.3390/app10082754
Submission received: 28 February 2020 / Revised: 11 April 2020 / Accepted: 13 April 2020 / Published: 16 April 2020
(This article belongs to the Section Electrical, Electronics and Communications Engineering)

Abstract

:
Molybdenum disulfide (MoS2) field-effect transistors (FETs) with four different metallic electrodes (Au,Ag,Al,Cu) of drain-source were fabricated by mechanical exfoliation and vacuum evaporation methods. The mobilities of the devices were (Au) 21.01, (Ag) 23.15, (Al) 5.35 and (Cu) 40.52 cm2/Vs, respectively. Unpredictably, the on-state currents of four devices were of the same order of magnitude with no obvious difference. For clarifying this phenomenon, we calculated the Schottky barrier height (SBH) of the four metal–semiconductor contacts by thermionic emission theory and confirmed the existence of Fermi-level pinning (FLP). We suppose the FLP may be caused by surface states of the semiconductor produced from crystal defects.

1. Introduction

Two-dimensional (2D) materials have attracted great attention with the birth of graphene in 2004 [1]. 2D materials are planar materials with atomic thickness [2]. They have excellent electrical properties, outstanding flexibility and good transparency [3,4]. These new physical properties can meet the needs of different applications such as electronics, photo electricity, energy storage and conversion [5]. In recent years, the transition metal dichalcogenides (TMDs), as an important part of 2D materials, have attracted great interest due to their various electrical properties including metal [6], semi-conducting [7], superconducting [8], charge density wave [9] and so on.
Molybdenum disulfide (MoS2) is a typical material of TMDs. It is one of the most promising candidates to be the semiconductor of the next generation [5]. MoS2 has a direct bandgap of 1.8 eV, which is suitable for developing field-effect transistors (FETs) with low static power consumption and high carrier mobility [10]. In the past decade, studies around MoS2-FET were focused on devices preparation [11], electrode contact [12], hysteresis phenomenon [13], heterojunction structure [14], material modification [15], and so on. However, the research on the comparison of different typical electrode materials in MoS2-FET are relatively rare.
In this paper, we prepared MoS2 materials through a classical mechanical exfoliation method [1], fabricated the devices with different metallic electrodes, and characterized them subsequently. We found that the on-state currents of four devices were of the same order of magnitude with no obvious difference. In order to clarify the internal mechanism, we calculated the Schottky barrier height (SBH) of the four metal–semiconductor contacts by thermionic emission theory and discovered that there may exist Fermi-level pinning (FLP) between the contacts in four devices [16].

2. Experiment

MoS2 materials were purchased from a 2D semiconductors company. We exfoliated MoS2 flakes with 3M Scotch tapes pasting for several times. Then, a substrate of n-type silicon wafer with 300 nm-thick silicon oxide was prepared. It was cleaned with acetone (for 20 min) and isopropanol (for 20 min) by ultrasonic. Then, the MoS2 flake was transferred to the substrate by 3M Scotch tapes. Next, the substrate covered with MoS2 was sent to the vacuum chamber. The first electrode material of Au was evaporated in the chamber through a shadow mask with 50 μm length channel. The fabrication process and structure of FET devices are shown in Figure 1 and Figure 2, respectively. Three other materials of Ag, Al and Cu were used as electrodes in the other three devices fabricated by the process mentioned above. Finally, four FET devices were prepared. The micro-images of the devices were obtained by optical microscope (LEICA DM 2700M), as shown in Figure 3a–d. The electrical properties of the devices were characterized by semiconductor characterization analyzer (Keithley 4200).

3. Results and Discussion

The output and transfer curves of the devices with four types of metallic electrodes are shown in Figure 4. We can find that the devices are n-type depletion FETs as the current appeared in the negative coordinates in the transfer curve with the drain-source voltage of 10 V, 20 V and 30 V, as shown in Figure 4e–h. This result is consistent with previous studies. Meanwhile, we obtained the on/off ratio, threshold voltage (Vth) from the curves and calculated the carrier mobility [15] through the Equation (1). Where W denotes the channel width, L denotes channel length, Ci stands for the capacitance per unit area of silicon oxide.
μ c a r r i e r = W L C i V D S I D S ( V GS V t h )
The characteristics of the devices are as shown in Table 1. We can find that the device with silver electrode has the relative ideal performance with a carrier mobility of 23.15 cm2/Vs, the largest on/off ratio of 1.23 × 104 and the lowest threshold voltage of 2.21 V. This phenomenon may attributed to the fact that the work function of silver (4.26 eV) is close to the conduction band of molybdenum disulfide.
The property of metal–semiconductor contact is essential to modern electronics and optoelectronics [17]. According to the thermionic emission theory, the mean free path of the majority of carriers (electrons) in n-type semiconductor-metal contact is much larger than the Schottky barrier width, so the collision of electrons in the barrier region can be neglected. The influence of the barrier shape is not prominent, and the Schottky barrier height (SBH) plays a decisive role here. SBH represents the energy required for a single charge carrier to transfer between semiconductor and metal. It fundamentally determines the efficiency of charge transfer and directly affects device performance [18]. Meanwhile, SBH is derived from the difference of work functions between metal and semiconductor, which can lead to discrepancies in barrier height and charge injection quantity [19]. All of these factors will eventually cause an obvious disparity in on-state current, which is presented on the transfer characteristic curve. Figure 5 is the on-state current of MoS2 devices with four metallic electrodes at three types of drain-source voltage. The difference in the on-state currents in the transfer curve is less than 0.63 orders of magnitude that cannot fit with the gaps in the work functions of the four metals.
As mentioned above, electrons in semiconductors can enter metals through barriers as long as they have enough energy to cross barriers. Similarly, electrons in metals can also enter semiconductors. Based on the above conditions, the calculation of current can be reduced to the calculation of the number of carriers crossing the barrier, as shown in Equation (2) [16], where A is the Richardson constant (120 A/cm2·K2), T is the thermodynamic temperature (300 K), K0 is the Boltzmann constant (1.380 × 10−23 J/K), VDS is the drain-source voltage (10 V), qΦSB is SBH, q is the electron charge (1.602 × 10−19 C), and J is the current density between semiconductor and metal. It is known that the drain-source current (IDS) is the product of the current density (J) and the average contact area S of the electrode in the device, as shown in Equation (3). We substituted it into Equation (2) to obtain Equation (4). SBHs corresponding to different gate voltages between metals and semiconductors can be calculated with the known constant and IDS in the device transfer characteristic curve at VDS = 10 V.
J = A T 2 exp ( q Φ S B k 0 T ) exp ( q V D S k 0 T )
I d s = J S
Φ S B = ln ( I D S A T 2 S ) k 0 T q + V D S
The effective barrier height (ΦESB), defined as the SBH when Vg equals to flat-band voltage (VFB), can be represented as the longitudinal coordinate value corresponding to an intersection point of the tangent of the descending position and the curve, as shown in Figure 6. It can be seen that ΦESB values of the four types of metal–semiconductor contacts ranged from 10.448 to 10.606 eV with a difference of no more than 0.16 eV. In ideal metal–semiconductor contact, SBH can be well predicted by the Schottky–Mott rule, as shown in Equations (5) and (6) [20], where ΦM is the work function of metals; XS and IS are the electron affinity and ionization potential of semiconductors; ΦSB,n and ΦSB,p are the SBH of electrons and holes, respectively. The Schottky–Mott rule shows that ΦSB is linearly related to the work function of metals, and its relationship curve has a uniform slope, as shown in Equation (7). In Equation (7), if S = 1, the metal–semiconductor system conforms to Schottky–Mott rule. However, the calculation based on the experimental data in this paper shows that there is no linear correlation between ΦSB and metal work function for S = 0.11 in the four metal material systems as shown in Figure 7a. Theoretically, the above results are due to the effect of Fermi-level pinning (FLP). Meanwhile, the results we obtained were concluded from the statistical data based on a certain number of devices that meant the experimental results have high repeatability. Moreover, we present another group of four devices with the calculated S value of 0.019 in Figure 7b. This result is in good accordance to the former group.
We suppose the main causes of FLP are the surface states of semiconductors [20,21] formed by crystal defects [20,21,22,23] such as interface reconstruction. If the surface density of states of MoS2 is very large, the metal semiconductor system will screen the effect of metal contact on the barrier. Here, the barrier height at the metal-semiconductor interface is mainly determined by the surface properties of MoS2, but not the work function of the metal. In general, due to the difference in the surface density of states, a part of the contact potential difference will fall in the semiconductor with metal–semiconductor contact, so the work function of metal may still impact on the surface barrier, but to a small extent. This is in accordance with our calculated results for the barrier heights of the four devices.
Φ S B , n = Φ M X s
Φ S B , p = I s Φ M
S = | d Φ S B d Φ M |

4. Conclusions

In this paper, the FLP mechanism was found in the MoS2-FETs by calculating the barrier height through thermionic emission theory. The FLP limits some performance of the FETs with different electrodes and may be caused by the surface states of semiconductors produced from crystal defects. Current studies will be helpful for obtaining a deep understanding of the metal–MoS2 contact mechanism and can lay a foundation for the preparation of high performance MoS2-FET devices.

Author Contributions

Perform experiment and writing: Y.Z., X.C., Y.W., X.G.; data test: S.H., J.Z., G.W., J.Q.; Super vision and review: X.W., J.W., H.Z. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by Technology and the Natural Science Foundation of Fujian Province, China (Grant No. 2017J01733, 2018J01641, 2019J01880) and “Scientific Research Guidance Project” (Grant No. 2017H0004) of Fujian provincial department of science.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Fabrication process of field-effect transistor (FET) devices.
Figure 1. Fabrication process of field-effect transistor (FET) devices.
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Figure 2. Molybdenum disulfide (MoS2) FET devices structure.
Figure 2. Molybdenum disulfide (MoS2) FET devices structure.
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Figure 3. Microscope images of FET devices with the electrode of (a) Au; (b) Ag; (c) Al; (d) Cu.
Figure 3. Microscope images of FET devices with the electrode of (a) Au; (b) Ag; (c) Al; (d) Cu.
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Figure 4. Output curve of (a) Au, (b) Ag, (c) Al, (d) Cu and transfer curve of (e) Au, (f) Ag, (g) Al, (h) Cu.
Figure 4. Output curve of (a) Au, (b) Ag, (c) Al, (d) Cu and transfer curve of (e) Au, (f) Ag, (g) Al, (h) Cu.
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Figure 5. The comparison of the on-state current of MoS2 devices with 4 different metallic electrodes at 3 different types of drain-source voltage of (a) 10 V; (b) 20 V; (c) 30 V.
Figure 5. The comparison of the on-state current of MoS2 devices with 4 different metallic electrodes at 3 different types of drain-source voltage of (a) 10 V; (b) 20 V; (c) 30 V.
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Figure 6. Barrier heights of MoS2-FETs constructed by electrode of (a) Au; (b) Ag; (c) Al;(d) Cu.
Figure 6. Barrier heights of MoS2-FETs constructed by electrode of (a) Au; (b) Ag; (c) Al;(d) Cu.
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Figure 7. Calculated interface S values of devices comparing to Schottky–Mott rule in (a) Group 1 and (b) Group 2.
Figure 7. Calculated interface S values of devices comparing to Schottky–Mott rule in (a) Group 1 and (b) Group 2.
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Table 1. Characteristic data of the MoS2-FET devices (VDS = 10 V).
Table 1. Characteristic data of the MoS2-FET devices (VDS = 10 V).
ElectrodeMobility (cm2/Vs)On/Off RatioThreshold Voltage(V)
Au21.012.18 × 101−3
Ag23.151.23 × 1042.21
Al5.354.14 × 100−55
Cu40.522.25 × 102−55

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MDPI and ACS Style

Zhang, Y.; Chen, X.; Zhang, H.; Wei, X.; Guan, X.; Wu, Y.; Hu, S.; Zheng, J.; Wang, G.; Qiu, J.; et al. Fermi-Level Pinning Mechanism in MoS2 Field-Effect Transistors Developed by Thermionic Emission Theory. Appl. Sci. 2020, 10, 2754. https://doi.org/10.3390/app10082754

AMA Style

Zhang Y, Chen X, Zhang H, Wei X, Guan X, Wu Y, Hu S, Zheng J, Wang G, Qiu J, et al. Fermi-Level Pinning Mechanism in MoS2 Field-Effect Transistors Developed by Thermionic Emission Theory. Applied Sciences. 2020; 10(8):2754. https://doi.org/10.3390/app10082754

Chicago/Turabian Style

Zhang, Yu, Xiong Chen, Hao Zhang, Xicheng Wei, Xiangfeng Guan, Yonghua Wu, Shaozu Hu, Jiale Zheng, Guidong Wang, Jiawen Qiu, and et al. 2020. "Fermi-Level Pinning Mechanism in MoS2 Field-Effect Transistors Developed by Thermionic Emission Theory" Applied Sciences 10, no. 8: 2754. https://doi.org/10.3390/app10082754

APA Style

Zhang, Y., Chen, X., Zhang, H., Wei, X., Guan, X., Wu, Y., Hu, S., Zheng, J., Wang, G., Qiu, J., & Wang, J. (2020). Fermi-Level Pinning Mechanism in MoS2 Field-Effect Transistors Developed by Thermionic Emission Theory. Applied Sciences, 10(8), 2754. https://doi.org/10.3390/app10082754

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