Numerical Simulation and Experiment of a High-Efficiency Tunnel Oxide Passivated Contact (TOPCon) Solar Cell Using a Crystalline Nanostructured Silicon-Based Layer

Abstract

We report on the tunnel oxide passivated contact (TOPCon) using a crystalline nanostructured silicon-based layer via an experimental and numerical simulation study. The minority carrier lifetime and implied open-circuit voltage reveals an ameliorated passivation property, which gives the motivation to run a simulation. The passivating contact of an ultra-thin silicon oxide (1.2 nm) capped with a plasma enhanced chemical vapor deposition (PECVD) grown 30 nm thick nanocrystalline silicon oxide (nc-SiO_x), provides outstanding passivation properties with low recombination current density (J_o) (~1.1 fA/cm²) at a 950 °C annealing temperature. The existence of a thin silicon oxide layer (SiO₂) at the rear surface with superior quality (low pinhole density, D_ph < 1 × 10⁻⁸ and low interface trap density, D_it ≈ 1 × 10⁸ cm⁻² eV⁻¹), reduces the recombination of the carriers. The start of a small number of transports by pinholes improves the fill factor (FF) up to 83%, reduces the series resistance (Rs) up to 0.5 Ω cm², and also improves the power conversion efficiency (PEC) by up to 27.4%. The TOPCon with a modified nc-SiO_x exhibits a dominant open circuit voltage (V_oc) of 761 mV with a supreme FF of 83%. Our simulation provides an excellent match with the experimental results and supports excellent passivation properties. Overall, our study proposed an ameliorated knowledge about tunnel oxide, doping in the nc-SiO_x layer, and additionally about the surface recombination velocity (SRV) impact on TOPCon solar cells.

1. Introduction

In recent times, silicon solar cells using a tunnel oxide passivated contact (TOPCon) cell structure [1,2,3,4,5,6,7,8,9], or alternatively, a poly-Si on passivating interfacial oxides (POLO) structure [10], have established an outstanding potential as well as having collected substantial consideration. For the above-mentioned kinds of solar cells, on the rear side surface of a silicon wafer (Si), an ultrathin oxide layer is used to provide higher-quality as well as full-area passivation, and furthermore, this layer provides an electron tunneling function [11,12]. A massively doped n-type (n⁺) poly-silicon layer is generally applied among the ultrathin oxide layer as well as the rear metal contact to accomplish an efficient full-area carrier accumulation. Consequently, in recent laboratory results, a highest TOPCon solar cell efficiency of up to 25.1% has been quickly achieved [13], along with champion efficiencies with regards to crystalline solar cells. Importantly, such prominent efficiency-based solar cells do not appear at the cost of complex procedures. Opposite to the alternative progressed cell design such as the interdigitated back contact (IBC) [14], TOPCon solar cells hold the full area contact, excluding the comparatively complex procedure for localized contacts. Through dominant equipment suppliers, new TOPCon processes have developed and matured, representing a considerable potential towards mass production [15].

The developing TOPCon solar cells have been analyzed primarily under experimental techniques and to experience the extensive knowledge of the critical parameters which influence the device’s performance, an organized numerical inspection is necessary. Such vital parameters include the thickness as well as the characteristics of the silicon oxide (SiO₂) layer, quality and the concentration of doping in the nc-SiO_x layer, and the interface characteristics, in addition to their combination thereof. Through simulation, Steinkemper et al. have provided an acceptable model to evaluate the achievement of TOPCon solar cells displaying various n⁺-Si materials (polycrystalline silicon as well as amorphous silicon) [16,17]. They focused on the carrier-selective electron contacts with tunnel oxides as well as identified what sort of material structures are appropriate in favor of a TOPCon solar cell.

In the present study we examined the routes to accomplish this, together with an outstanding carrier collection as well as surface passivation of a TOPCon solar cell by employing the simulation tool of the AFORS-HET (automat for simulation of heterostructures) software and through experiments. The main factor which limited our efficiency was the rear side contact because in the case of the front side contact it gave an exceptional passivation junction characteristic to the solar cells. The rear side layer should be transparent to provide a superior passivation and an excellent charge carrier transfer, while parasitic absorption losses should be minimized. We report on an unconventional rear side passivating electron contact which minimized absorption losses and ameliorated the transparency by substituting a doped poly-Si layer. Herein, we propose a TOPCon solar cell comprising of a SiO_x/nc-SiO_x(n) stack on the rear end. To reduce the optical and parasitical absorption, nc-SiO_x(n), a wide bandgap material, was developed to replace the doped poly-Si. The carrier selectivity, surface passivation, optical transmission, and electrical characteristics could then be improved by the nc-SiO_x(n) layer, which is crucial for device functionality, while changing the oxygen content may alter the optical and electrical properties. This study on TOPCon cells aimed to propose the creation of a TOPCon silicon solar cell system with a high performance and suggests an alternative framework that can be employed in the industry by using poly-Si in a TOPCon cell structure. Thus, our proposed TOPCon cell arrangement provides several advantages as compared to the conventional cell. Figure 1a,b shows a schematic of our proposed TOPCon solar cell. Our research on the TOPCon solar cells aimed to (a) demonstrate a mechanism for enhancing cell performance in a TOPCon structure; (b) achieve an efficiency exceeding 27% utilizing the TOPCon cell configuration; (c) conduct extensive research on high-quality passivating contacts, such as stacks of nc-SiO_x(n)/SiO_x contacts, which are at the cutting edge in the latest photovoltaic (PV) research; (d) establish a systematic experimental and simulation procedure for the TOPCon cell; and (e) propose a method of increasing the performance of TOPCon cells. This unconventional structure contains a thermally grown thin silicon oxide layer (SiO₂) on both sides of the c-Si wafer, with a surface covered by a phosphorus-doped nanocrystalline silicon oxide (nc-SiO_x) on both sides. The technique we used for the fabrication was a plasma-enhanced chemical vapor deposition (PECVD) for the synthesis of the nc-SiO_x layer. Furthermore, a wide thermal processing window helped in improving the temperature stability due to the existence of a thermally fabricated SiO₂ layer. The passivation properties were studied by varying the annealing temperature and fixing the thickness of SiO₂. The influence of the forming gas annealing (FGA) was also investigated. Moreover, in the experiment, our research concentered on the experimental designs of the nc-SiO_x layer to describe the physical mechanisms for improvement and optimization of the passivation characteristics of the symmetric structures, by employing a quasi-steady-state photoconductance (QSSPC) measurement system.

As far as a simulation is concerned, we accept the fundamental findings deduced by Steinkemper, and our study can be considered as an extension of their prior published works. The uniqueness of our work lies in acknowledging the consequences of the elaborated parameters on the complete device performances, including for instance, the various thickness and work function of an oxide layer, the doping of nc-SiO_x, bulk defect density, rear SRV, interface-states density (D_it) as well as pinhole density through the oxide (D_ph). SRV refers to the charge carriers that generated a loss that would have been imparted to the voltage or current which the cell could generate. The recombination mainly takes place in the surface and bulk region [18] and minimization is required on both the bulk recombination and surface recombination, to collect the maximum photo-generated carriers, which may be accomplished when the generated carriers are under their diffusion length. As compared to bulk recombination, surface recombination [19] needs extra consideration for numerous silicon devices on account of it enhancing the surface-to-volume ratio [20]. The parameters which influence the recombination are mentioned here; the effective minority carrier lifetime (τ_eff), and SRV as well as the emitter recombination current (J_oe). The effective lifetime can be divided based on location, bulk lifetime (τ_b), and surface lifetime (τ_s). These two terms are related by an inverse addition, as mentioned in Equation (1). The effective carrier lifetime is conveyed as a function of surface recombination velocity, as depicted in Equation (2). Here, W represents the wafer thickness, and D represents the diffusion constant of minority charge carriers [21,22,23]:

$$\frac{1}{{\mathsf{\tau }}_{\mathrm{eff}}}=\frac{1}{{\mathsf{\tau }}_{\mathrm{b}}}+\frac{1}{{\mathsf{\tau }}_{\mathrm{s}}}$$

(1)

$$\mathrm{S}=\frac{\mathrm{W}}{2\left({\mathsf{\tau }}_{\mathrm{s}}-\frac{1}{\mathrm{D}}{\left(\frac{\mathrm{w}}{\mathsf{\pi }}\right)}^2\right)}$$

(2)

Additionally, our proposed simulation schemes for an optimized design of the tunnel oxide as well as the nc-SiO_x layer contribute to a low tunneling resistance as well as high V_oc. In a nutshell, our findings furnish an additional understanding of the challenges and limitations referring to the primary factors; furthermore, they will provide a direction for developing high-efficiency TOPCon solar cells.

2. Experimental Details and Simulation Setup

We used Czochralski-grown phosphorus-doped n-type wafers (200 µm thick with 3–5 Ω-cm,) in this study. The removal of surface defects was the first step by applying an etching solution containing sodium hydroxide (NaOH) at 70–80 °C for nearly 10 min. After that, the samples were cleaned by standard RCA-1 and RCA-2 cleaning procedures to remove organic as well as metallic impurities. Finally, sample cleaning was completed using deionized water. After cleaning, the samples were immediately transferred to a thermal oxide furnace. The SiO₂ tunnel layer grown by the thermal furnace had an approximate thickness of 1.2 nm on both sides of the silicon wafer. The temperature used for the growth of the SiO₂ was set around 600 °C with an O₂ flow rate of 10 L/min for 30 min. After the growth of SiO₂, the samples were transferred to the PECVD chamber for the deposition of the nc-SiO_x. The transfer of samples was undertaken by breaking the vacuum and temporarily exposing them to the normal atmosphere. The nc-SiO_x deposition with SiH₄, H₂, CO_2, and PH₃ gases was performed at a temperature of about 230 °C to the thickness of 30 nm. Optimized PECVD deposition parameters for the nc-SiO_x layer were described in our prior paper [24]. All fabricated samples were exhibited to the post-deposition annealing (PDA) at 850, 900, and 950 °C for a 1-h duration. Finally, for the hydrogen passivation, forming gas annealing (FGA, 15% H₂ in Ar) was completed at 400 °C for 2 h.

The fabricated symmetric structures are described in Figure 1a. The SiO₂ tunnel oxide layer and the nc-SiO_x layer with a 30 nm thickness were confirmed through spectroscopic ellipsometry (VASE, JA Woollam, Lincoln, NE, USA). The passivation characteristics were evaluated by employing a QSSPC measurement system (WCT Sintron, 120). The transfer length method (TLM) was applied to obtain the contact resistivity (ρ). The ultrathin SiO₂ tunnel oxide layer and nc-SiO_x layer thickness were affirmed through transmission electron microscopy (TEM) and spectroscopic ellipsometry (VASE, JA Woollam, Lincoln, NE, USA).

As for simulation concerns, the AFORS-HET v.2.5 is a powerful and professional simulation program used for hetero-junction solar cells. Using this tool, various simulation-based papers have been published [25,26]. In the present study, we examined thoroughly the solar cells displaying tunnel oxide passivated contact and attest that the rear side structure for the TOPCon solar cell is a heterojunction.

Architecture for the TOPCon solar cell applied in the present study is included in terms of the following: front electrode (Ag)/SiN_x/p⁺-Si layer/n-Si wafer absorber/SiO_x/nc-SiO_x layer/rear electrode (Ag). A graphic depiction as well as the energy band structure for the simulated device architecture plus the comprehensive parameters are provided within Figure 1b,c and

Table 1. Simulation Parameters for TOPCon Solar Cell.

Layers	Default Parameter
SiNx dielectric	t = 70 nm
Front contact boundary	Standard texture surface (54.74°), w/o absorption loss, flat band
Front contact	MS Schottky contact model, SRV = 10 cm/s (assuming good passivation)
P+-type Si layer	t = 0.3 µm, Na = 2 × 102° cm−3, lifetime setting: 1 μs
n-type c-Si layer	t = 150 µm, Nd = 5.0 × 1016 cm−3, lifetime setting: 1 × 105 μs (without bulk defect)
Interface: SiOx	Chi = 1.0 eV, Eg = 8.9 eV, dk = 3.9, me = 0.98, mh = 0.49, Dph = 0
nc-SiOx Si layer	t = 30 µm, Nd = 1 × 1017 cm−3, lifetime setting: 50 μs
Rear contact	MS Schottky contact model, SRV = 10 cm/s
Rear contact boundary	A plane surface, w/o absorption loss, flat band
Ag electrode	t = 1 µm

, accordingly. In Table 1, the supposed parameters of the TOPCon devices applied for the simulation are presented. Two essential parameters of tunnel oxide, namely, pinhole density through the oxide (D_ph) and the interface-states density (D_it), are studied in the simulation. In this work, it is necessary to note that despite AFORS-HET being a 1D simulation tool, it can handle pinholes. This paper required categorizing the pinhole as a micro-hole or a micro-channel through tunnel oxide, because of the damage to oxide integrity by an impurity diffusion throughout the high temperature anneal [27]. Using a pinhole, the bulk carriers recombine at the interface, which decreases the solar cell performance. In Table 1, t represents the thickness, E_g represents the bandgap, SRV is the surface recombination velocity, Chi the electron affinity energy, N_a and N_d are the acceptor concentration and donor concentration, respectively, dk is the relative dielectric constant, m_e as well as m_h are the relative effective mass of electron and the hole, respectively, D_it represents the interface-state density, and D_ph symbolizes the pinhole density through the insulator layer (dimensionless unit).

3. Results and Discussion

3.1. Electrical Properties of the nc-SiO_x Layer

In order to optimize and enhance the efficiency of a solar cell, the electrical, as well as optical properties of the n-type nc-SiO_x layer, can be varied. It can be applied to enhance carrier selectivity and rear side optical transmission, both of which are essentially significant in device operation. Our current research includes nc-SiO_x material and its application in TOPCon solar cells as an optimized layer; where the goal is to provide the absorber layer with more light and ameliorate the selectivity of the carrier collection. A highly doped layer, as well as wide bandgap material, can assist with sharp band-bending, which enhances the carrier selectivity. Molybdenum-oxide, for instance, may be used as hole selective contacts. One of the key benefits of the nc-SiO_x material is that the optical band-gap, or transparency, can be simply changed by various deposition conditions. The electrical conductivity was measuring the electrical (dark) conductivity (σ) in a planar electrode configuration (planar-conductivity), where current flows along the plane of the film, which we obtained around 1.1 × 10⁻¹ S/cm. Parallel with the electrical (dark) conductivity (σ), the activation energy (Ea) was measured and estimated to be around 0.04 eV. The refractive index (n) of the nc-SiO_x films was estimated from spectroscopic ellipsometric measurements. The measured refractive index (n) ~2.9 at 600 nm indicates the excellent transparency of nc-SiO_x. The characteristic of the nc-SiO_x layer deposited on the ultrathin SiO₂ passivation layer was shown by a cross-section transmission electron microscopy (TEM) image, as depicted in Figure 2. The thickness of the ultrathin SiO₂ passivation layer was recorded as 1.2 nm. After thermal annealing at 950 °C, crystallization of the Si-rich region was further promoted, as shown in Figure 2 with their max grain sizes.

3.2. Analysis of Passivation Properties

Note that the implied open-circuit voltage (iV_oc), derived from implicit current–voltage characteristic curves of the QSSPC, is an essential parameter to evaluate the overall performance of a silicon solar cell, as it reflects the quality of surface passivation and the lifetime bulk carrier. The iV_oc of the double-sides symmetrical passivation structure, nc-SiO_x/SiO₂/n-type Si/SiO₂/nc-SiO_x layers, was studied exhaustively to estimate the surface passivation of the TOPCon structure. The iV_oc can be described using Equation (3):

$$\mathsf{i}{\mathrm{V}}_{oc}=\frac{\mathrm{k}\mathrm{T}}{\mathrm{q}}\mathrm{L}\mathrm{n}\left(\Delta \mathrm{n}\left(\frac{\Delta \mathrm{n}+{\mathrm{N}}_{dop}}{{\mathrm{n}}_{\mathrm{i}}^2}\right)\right)$$

(3)

where Δn is the excess carrier density at one sun, k is the Boltzmann constant, T is the temperature, q is the elementary charge, N_dop is the bulk doping density, and n_i is the intrinsic carrier concentration. N_dop and t of the wafer used for the calculation are 5 × 10¹⁵ cm⁻³ and 200 μm, respectively.

Note that the carrier lifetime (τ_eff), which can be measured experimentally in a given sample, is an effective parameter that encompasses several different recombination and transport mechanisms, including surface recombination. τ_eff derived from the implicit current–voltage characteristic curves of the QSSPC, is an essential parameter to evaluate the overall performance of a silicon solar cell. The τ_eff of the double-sides symmetrical passivation structure, nc-SiO_x/SiO₂/n-type Si/SiO₂/nc-SiO_x layers, was studied exhaustively to estimate the surface passivation of the TOPCon structure. The τ_eff can be described using Equation (4):

$${\mathsf{\tau }}_{\mathrm{e}\mathrm{f}\mathrm{f}}=\frac{\Delta \mathrm{n}\left(\mathrm{t}\right)}{{\mathrm{G}}_{\mathrm{L}}\left(\mathrm{t}\right)-\frac{\partial \Delta \mathrm{n}}{\partial \mathrm{t}}}$$

(4)

where G_L(t) is the generation rate per unit volume.

The deposited 30 nm thick nc-SiO_x sample was annealed at different temperatures in the range of 850–950 °C. As a result of the PDA, a substantial improvement was observed in the passivation characteristics after the PDA. As the thickness approached 30 nm, substantial improvements were observed in both the carrier lifetime (τ_eff) and implied open-circuit voltage (iV_oc). Figure 3a depicts the τ_eff and iV_oc of the 30 nm deposited sample at different post-deposition annealing temperatures (T_PDA). We found more prominent results with the samples in terms of τ_eff and iV_oc, as compared to the as-deposited sample, but in the case of the 950 °C temperature, a more notable lifetime, and iV_oc of ~941 μs and ~737 mV, respectively, was observed. In the case of Figure 3b, we attempt to demonstrate the response of TPDA on the 30nm thick layer of the nc-SiO_x in terms of recombination current density (J_o). The gradual decrease in Jo valued up to a J_o of 1.26 fA/cm² was observed as the annealing temperature reaches 950 °C. At the annealing temperature in the range of 950 °C, increases in the τ_eff and iV_oc, as well as the diminution in J_o, were observed compared to the as-deposited state of the nc-SiO_x layer.

After FGA treatment for 2 h at 400 °C by using rapid thermal processing, the passivation characteristic of the symmetric structure increased further. After FGA treatment, the maximum lifetime was improved by up to 1 ms and the iV_oc reached up to 738 mV, for the 30 nm thick nc-SiO_x which represented in Figure 4a. Under this condition, a substantial reduction was observed in J_o up to 1.1 fA/cm². A significant decrease in the interface defect density (D_it), could be a cause for the improved passivation after the FGA treatment. An increase in hydrogen activation on both sides of the tunnel oxide interface as well as the nc-SiO_x layer was due to FGA treatment. This led to the best passivation with a 30 nm thick nc-SiO_x layer which was annealed at 950 °C. The improved results of the passivation characteristics and lower J_o shows that this novel structure would produce a higher efficiency TOPCon cell. Figure 4a depicts meliorations in τ_eff and iV_oc following FGA treatment for the 30 nm nc-SiO_x deposited sample. Figure 4b depicts the change in J_o after the FGA at the same parameters as mentioned above. The J_o was found to be as low as ~1.1 fA/cm² after FGA.

An improvement was observed at the SiO_x/nc-SiO_x passivated contact after thermal annealing at 950 °C and FGA treatment at 400 °C, yielding the lowest J_o and ρ values. Tunneling efficiency improved as J_o and ρ values decreased. Figure 5 depicts the J_o and ρ of the deposited samples at a 30 nm thickness of nc-SiO_x as a function of T_PDA. The melioration in J_o and lowest ρ value for the 30 nm SiO_x/nc-SiO_x passivated contact annealed at 950 °C, was outstanding compared to samples annealed at 850 °C and 900 °C. At a 30 nm thickness, the J_o up to 1.1 fA/cm² and ρ up to 14.7 (mΩ/cm²) values decreased as the annealing temperature was raised to 950 °C. After comparing our results with those of other research groups such as Josua et al. [28], it was shown that we attained ameliorated passivation results. To ameliorate the TOPCon solar cell efficiency, nc-SiO_x was applied in both studies; however, the differences lay with the layer thickness and deposition temperature as well as in the growth method of the SiO_x. The novelty in our results arise from the different treatment steps and fabrication methods employed.

3.3. Path towards Cell Parameters Optimization

First, we examined the case when varying the thickness of nc-SiO_x. From the results, we learned that TOPCon solar cell performance is affected by the nc-SiO_x properties, such as the fabrication process and layer thickness, significantly. In this Section 3.3, we present a set of simulation results for the carrier transport in the TOPCon structure as used for the current–voltage measurement. Note that open circuit voltage (V_oc), as well as short circuit current (J_sc), is derived from the current–voltage characteristics curve to assess the entire Si solar cell performance, because this indicates the achievement of the solar cell in terms of efficiency. The consequences regarding tunnel oxide thickness were investigated along with their work function, as depicted in Figure 6. J_sc was greatly improved by embedding a thin oxide layer, which was similar to the case of a nanocrystalline-based TOPCon structure [28]. Generally, V_oc and J_sc increased gradually to the maximum value as the work function reduced and the oxide thickness increased. It should be note that the J_sc would drop down quickly as the tunnel oxide exceeded a certain thickness because of the invalidity of carrier tunneling (not shown in Figure 6); however, the V_oc and J_sc showed the same characteristics at the work function range from 3.6 to 4.0 eV. The nc-SiO_x layer, with a thickness of 30 nm, was interpreted as the model to elucidate this circumstance, for example, when the V_oc increased from 733 to 760 mV through an increase of the thickness of the oxide ranging from 0.6 to 1.8 nm. Particular crystalline nanostructures with a 4.0 eV work function and a thickness of 30 nm exhibited better performance with the tunnel oxide of a 1.2 nm thickness. The champion performing V_oc of the nc-SiO_x TOPCon solar cell reached 760 mV, and the J_sc reached 43 mA/cm² at a 1.2 nm thin tunnel oxide layer with up to a 4.0 eV work function, as shown in Figure 6a,b. The results of the V_oc and J_sc, at a work function level of 3.6 eV, 3.8 eV, and 4.0 eV, respectively, show almost the same result. which is depicted in Figure 6a,b. This result suggests that this novel advanced TOPCon solar cell through an nc-SiO_x layer with a superior tunnel oxide, attains magnificent surface passivation, which is competitive with an ordinary poly-Si TOPCon solar cell. Cheng et al. [29] reported on a TOPCon solar cell with a low-work function electron-selective-collection (ESC) as having a V_oc of 735 (mV) and J_sc of 37 (mA/cm²), with an oxide layer over 0.8 nm and a work function range from 3.2 eV to 4.0 eV; however, in our novel TOPCon structure with the nc-SiO_x layer, the results achieved up to 760 (mV) V_oc and 43 (mA/cm²) J_sc with an oxide layer of ~1.2 nm and work function up to 4.0 eV. Moreover, a few practical problems that might hinder the development of an experimental, high-efficiency TOPCon solar cell are now discussed. The first and most critical issue is determining how to produce a thin, low-D_it, and low-D_ph oxide layer. A wet, chemically grown oxide layer (such as hot HNO₃) is often of poor quality, with a high density of interfacial defects. To eradicate the defects in these oxides, a high-temperature anneal of 800 °C to 1100 °C is necessary; however, the growth of the oxide thickness is a side effect of high-temperature anneals, e.g., only the 800 °C anneal can lead to an oxide of >2 nm that will decay the fill factor significantly. PECVD is a better tool for depositing a low-D_it oxide. Furthermore, it is challenging to maintain an oxide thickness of less than 2 nm and build a dense oxide layer with a low pinhole density using this approach. Thermal oxidation, which we adopted and detailed before in the experimental phase, has proven to be the most stable and probable contender among the remaining techniques for depositing a thin oxide.

Tunneling efficiency decreases as oxide thickness grows, but tunneling efficiency improves as doping concentration increases. Therefore, to obtain high performance and excellent tunneling current in the TOPCon cells, optimization is necessary. Various device parameters were observed for an oxide thickness ranging from 0.6 nm to 1.8 nm and an nc-SiO_x doping concentration from 1 × 10¹⁷ to 1 × 10²¹ cm⁻³, as shown in Figure 7. Due to surface recombination, the V_oc was low with a thick oxide layer and low doping density. As the doping density increased, V_oc increased as well as the J_sc. V_oc is a lead parameter to evaluate the device performance because it is computed through a current–voltage curve. Comparatively, similar trends were realized in the V_oc, as demonstrated in Figure 7a. The V_oc was minimized to 745 mV for the architecture with a SiO₂ layer thickness of 0.6 nm. The maximum V_oc value was enhanced up to the 761 mV by contributing a right oxide and nc-SiO_x stack layer with proper doping level, which indicated that a TOPCon solar cell has the huge capacity to accomplish a quite high V_oc, as long as the front-sided surface recombination is depressed. Figure 7b shows that J_sc reached up to 43 mA/cm² for the architecture with a SiO₂ layer of 1.2 nm. J_sc was diminished to an inferior value of 25 mA/cm² by using the nc-SiO_x layer under a low doping concentration of approximately 1 × 10¹⁷ cm⁻³. Similarly, the J_sc was diminished to about 25 mA/cm² by employing a tunnel oxide layer along with a thickness beyond 1.8 nm. When the thickness of the tunnel oxide was near 1.2 nm, the J_sc depicted slight sensitivity to the nc-SiO_x doping level, and exclusively once the doping concentration was more prominent with 1 × 10²¹ cm⁻³. This required that the J_sc be affected through a number of components, comprising the adopted parameters and mathematics model, such as wafer quality, doping concentration of the wafer, SRV, and doping of the nc-SiO_x layer, that can account for the various findings computed by several researchers; however, the physics behind the simulation could not be modified. Zeng et al. [25] reported on a TOPCon solar cell with the n⁺-Si layer having a V_oc of 737 (mV) and J_sc of 37 (mA/cm²), with an oxide layer of ~1 nm and a doping level (N_d) of 1 × 10¹⁹ cm⁻³. However, in our novel TOPCon structure with an nc-SiO_x layer, the results reached up to 761 (mV) V_oc and 43 (mA/cm²) J_sc, respectively, with an oxide layer of ~1.2 nm and a doping level (N_d) of 1 × 10²¹ cm⁻³.

As the oxide thickness rises, the tunneling efficiency falls, but as the bulk defect density increases, the tunneling efficiency drops. The various device parameters were observed for oxide thickness from 0.6 nm to 1.8 nm, and nc-SiO_x bulk defect density from 1 × 10¹⁷ to 1 × 10²¹ cm⁻³, as shown in Figure 8a,b. As demonstrated in Figure 8a, the V_oc decreased by 0.52 percent from 761 to 757 mV at a 1.2 nm oxide layer due to an increase in the bulk-defect density ranges from 1 × 10¹⁷ to 1 × 10²¹ cm³. Since the oxide thickness began to increase from 1.2 nm, the V_oc reached a minimum value of approximately 755 mV at the work function of 4.0 eV for all the oxide layers. The studies revealed that a sufficient oxide thickness might tolerate the negative effects of defects while still producing satisfactory outcomes. The J_sc impact of the oxide thickness under a bulk-defect density in the nc-SiO₂ layer is shown in Figure 8b. Cell performance and surface passivation were diminished by the increase in oxide thickness. Luckily, after introducing a proper thin oxide around 1.2 nm, the J_sc turned less sensitive with the nc-SiO₂ thickness. In particular, the J_sc reached the highest value of about 43 mA/cm² with regards to an oxide thickness of around 1.2 nm. According to the findings, it was possible to achieve the maximum J_sc by inserting an appropriate thin tunnel oxide that eliminated the influence of the defects.

The values of the tunnel oxide layers’ interface trap density (D_it) were incorporated into the AFORS HET simulation, the results of which are presented in Figure 9. The effects of SiO₂ quality on the surface passivation and cell performance are investigated using D_it characteristics. It should be noted that D_it is fixed within the interface of the Si wafer and the oxide layer. As presented in Figure 9, the V_oc and J_sc of the complete structure decreased with the increase of D_it. The D_it was ranging from 1 × 10⁸ cm⁻² eV⁻¹ to 1 × 10¹² cm⁻² eV⁻¹. A more prominent J_sc, V_oc, and overall cell efficiency were achieved with a minimum D_it value. The main factor which affected the conversion efficiency was the V_oc (761.5 mV) for the minimal D_it (1 × 10⁸ cm⁻² eV⁻¹) at a perfect thin oxide layer of around 1.2 nm, as presented in Figure 9a. The rear electrode directly contacted the back-surface field in the passivated emitter and rear cell (PERC) solar cells, whereas the carrier on the rear side of the structure passed to the nc-SiO_x layer through a tunneling mechanism in the passivated contact. Therefore, the tunneling oxide under a minimal D_it value resulted in an ameliorated conversion efficiency. The highest simulated value J_sc of 43.5 mA/cm² was accomplished when the D_it had a minimal value of approximately 1 × 10⁸ cm⁻² eV⁻¹ at a perfect thin oxide layer of around 1.2 nm, as shown in Figure 9b. The J_sc kept to above a J_sc of 43.5 mA/cm² at a D_it value of 1 × 10⁸ cm⁻² eV⁻¹, while it decreased to 29 mA/cm² when the D_it rose to 1 × 10¹² cm⁻² eV⁻¹. Cheolmin Park et al. [30] reported on a TOPCon solar cell having a V_oc of 712 (mV) and J_sc of 41.30 (mA/cm²) with a D_it value of 1 × 10¹⁰ cm⁻² eV⁻¹. In our novel TOPCon structure with an nc-SiO_x layer, the simulation results reached up to V_oc 761.5 mV and J_sc 43.5 mA/cm² with an oxide layer of ~1.2 nm plus a D_it value of 1 × 10⁸ cm⁻² eV⁻¹. Bert et al. [31] published an experimentally based result for a low D_it value of up to 7 × 10¹¹ cm⁻² eV⁻¹ that considered a tunnel oxide’s strong passivation ability. Wet chemical oxidation procedures were used to synthesize this tunnel oxide.

From the carrier transport study, we learned that in addition to the tunneling, the transport through pinholes affected the J-V characteristics of the junction significantly. Hence, it is convincing to suppose that carrier transport through pinholes could influence the performance of real TOPCon solar cells. The existence of a high-density oxide pinhole was also harmful to surface passivation, as presented in Figure 10. Therefore, the TOPCon solar cell performance, considering the probability of carrier transport through pinholes ranging from 10⁻⁸ to10¹, was studied with five different thicknesses of the SiO_x layer ranging from 0.6 nm, 0.9 nm, 1.2 nm, 1.5 nm, and 1.8 nm. Figure 10a,b shows the performance parameters considering the transport through pinholes. In such a case, the thin SiO_x layer furnished quite a high tunneling current to permit a majority of the photo-carrier. A lower fill factor (FF) was found without transport via pinholes; a modest amount of transport through the pinholes increased the FF; too much transport through the pinholes decreased the FF, V_oc, and J_sc considerably. Tunneling transport in the TOPCon solar cells with a comparably thick SiO_x (1.5 nm and 1.8 nm) could not provide enough transport channels, limiting the current flow, and leading to a high series resistance (R_s) as well as an inferior FF. Through the addition of the pinhole mitigated transport at a pinhole density ranging from 10⁻⁸ to10⁻⁶, the FF rose, Rs diminished, and thus, overall efficiency was enhanced. In the region of prominent pinhole transport (>10⁻³), the performance parameters (V_oc, and J_sc) began to decline at all thicknesses of the SiO_x layer and resulted in a diminishing efficiency. When pinholes were involved, apart from the transport through tunneling, the carriers were also transported through the pinholes, which diminished the R_s, and hence, ameliorated the FF as well as the efficiency. Nevertheless, the results showed that raising the pinhole transport adds a shunt path as well as decreases the carrier built up within the junction in a context of an open circuit condition, thus diminishing the V_oc. Moreover, the excess pinholes could decrease the passivation quality, raise the interface recombination, and deteriorate the cell’s performance. With the help of a simulation study, it was shown that an appropriate amount of pinholes in the thin SiO₂ passivation layer is required for prominent efficiency of the TOPCon solar cells through a thick SiO₂, namely, 1.2 nm, which is a necessary for ameliorating the V_oc as well as J_sc in real solar cells. The V_oc and J_sc values for SiO₂ thicknesses of 1.2 nm, 1.5 nm, and 1.8 nm, respectively, indicate approximately the same results, and again in the case of SiO₂ thicknesses of 0.6 nm and 0.9 nm, which are illustrated in Figure 10a,b. Zhang et al. [32] reported on a TOPCon solar cell with poly-Si having a V_oc of 735 (mV) and J_sc of 37.7 (mA/cm²), with an oxide layer of 1.4 nm and pinhole density of 10⁻⁶~10⁻⁵; however, in our novel TOPCon structure with an nc-SiO_x layer, the results reached up to a V_oc of 761 mV and J_sc of 42.5 mA/cm², with an oxide thickness of ~1.2 nm and pinhole density of 1 × 10⁻⁴.

The tunnel oxide increased the passivation quality at the rear, decreasing the current recombination density [33]. A thicker oxide layer increased the bandgap between electrons and holes at the quasi-fermi levels, thus increasing the V_oc and reducing the leak current to almost zero [34]. On increasing the width of the thin oxide layer, the effect of SRV reduced, as observed in Figure 11. With the thinner oxide layer (~0.6 nm thick), there was a substantial decline in V_oc from 761.5 to 742 mV with the rear SRV from 1 × 10¹ to 1 × 10⁹ cm/s, thereby the J_sc was decreased from 38 to 34 mA/cm². From the increase in oxide thickness, the SRV limiting effect was released and, therefore, the V_oc as well as the J_sc improved. With the thickness above 1.2 nm in Figure 11a, the SRV impact over V_oc was diminished. In Figure 11b, the tunneling oxide thickness above 1.2 nm was essential for excellent passivation, where the SRV did not affect the cell performance. The cause of that decline can be understood with the dark J–V characteristics, with a diminishing tunneling current density (15–16 times) with every single increase of 0.2 nm oxide thickness [25], as well as a rise in parasitic resistance. As a result of these impressions, the efficiency of the structure rose to a 1.2 nm thickness, although, it then began to diminish. Through a rise in the oxide thickness, a diminishing tunneling efficiency was observed, and the conversion efficiency should diminish because of a reduced current passage. Meanwhile, the oxide layer decreased recombination because of the best passivation outcome as well as the selective passage of the charge carrier by means of tunneling. The reduction in tunneling efficiency was controlled by a decrease in recombination; consequently, we saw an overall increase in conversion efficiency. To limit the influence of SRV on the solar cell’s efficiency, the tunnel oxide layer thickness should be kept between 0.8 and 1.2 nm. Niraj et al. [26] reported on a TOPCon solar cell with n+ poly-Si having a V_oc of 761 (mV) and J_sc of 43.2 (mA/cm²), with an oxide layer of ~1 nm and SRV value of 1 × 10⁴ cm/s; however, in our novel TOPCon structure with an nc-SiO_x layer, the results reached up to 761.5 (mV) V_oc and 43.5 (mA/cm²) J_sc, respectively, with an oxide layer of ~1.2 nm and an SRV value of 1 × 10¹.

3.4. TOPCon Solar Cell Achievement

Figure 12a–d shows the consequences of the thickness of the oxide layer as well as the oxide layer’s work function on the device’s performances, whose default parameters are included in Table 1. Generally, V_oc and J_sc have the maximum value at a work function below 4.0 eV and progressively decrease with an increase in the work function of the nc-SiO_x layer. It was observed that the J_sc would drop rapidly as the tunnel oxide surpassed a specific thickness due to the deficiency of carrier tunneling. The fill factor was also affected by oxide thickness because the tunnel current diminished by ~15 times with every 0.2 nm increase in the thickness of the oxide. The highest efficiency of an nc-SiO_x-based TOPCon solar cell, 27.49%, was accomplished with an oxide layer of ~1.2 nm; however, a practical problem that may obstruct the preparation of a high efficiency nc-SiO_x based TOPCon solar cell remains. The critical complication concerns how to develop a low-D_it as well as a low pinhole oxide layer with an adjustable thickness. An oxide layer is synthesized using a wet chemical method (such as hot HNO₃) with an immense density of interfacial defects. The higher annealing temperature varies from 800 °C to 1100 °C [10,11] and is needed to exclude the oxide defects and anneal the nc-SiO_x layer.

4. Conclusions

In conclusion, we presented a TOPCon optimization by applying the numerical tool, AFORS-HET, as well as an experimental method. On the base of the model, we examined the carrier selectivity towards passivated electron contacts overall. Our work furnished a comprehensive understanding of tunnel oxide, rear-SRV, doping density, as well as of the design of TOPCon solar cells. Our experimental results show that the higher J_o and iV_oc reached up to ~1.1 fA/cm² and 738 mV, respectively. As far as the simulation is concerned, the high-quality tunnel oxide with a work function of 4.0 eV as well as a thickness of 1.2 nm is necessary for sensible carrier transport and field passivation. The champion results of a V_oc of 761.5 mV and J_sc of 43.5 mA/cm² were achieved with the novel TOPCon solar cell simulation. Representing a superior oxide layer with a low D_it range of 1 × 10⁸ cm⁻² eV⁻¹, as well as a low D_ph below 1 × 10⁻⁸, was essential for attaining the maximum simulated values. The higher concentration of doping in the nc-SiO_x layer was beneficial for ameliorating carrier-collection, which is useful as it enables a manufacture to be more tolerant of a thicker oxide. Furthermore, this is also promising for mass production. In a nutshell, it is possible to monitor the above-mentioned parameters, for instance, oxide thickness, doping concentration, rear-SRV, D_it, and D_ph, which can then be controlled, therefore, we consider that a high-efficiency output is achievable. With will-designed manufacturing, TOPCon solar cells are moving closer to achieving their theoretically predicted efficiency.