Quality Assessment of Dual-Parallel Edge Deblocking Filter Architecture for HEVC/H.265

Abstract

Preserving the visual quality is a major constraint for any algorithm in image and video processing applications. AVC and HEVC are the extensively used video coding standards for various video processing applications in recent days. These coding standards use filters to preserve the visual quality of the processed video. To retain the quality of the reconstructed video, AVC uses an in-loop filter, called the deblocking filter, while HEVC uses two in-loop filters, the sampling adaptive offset filter and the deblocking filter. These filters are implemented in hardware by adopting various optimization techniques such as reduction of power utilization, reduction of algorithm complexity, and consuming lesser area. The quality of the reconstructed video should not be impacted by these optimization measures. For the HEVC/H.265 coding standard, a parallel edge deblocking filter architecture is designed, and the effectiveness of the parallel edge filter architecture is evaluated using various quantization values for various resolutions. The quality of the parallel edge filter architecture is on par with the HEVC reference model.

1. Introduction

Video compression is ineluctable in recent days owing to the rapid advancements in digital electronics. Several video coding techniques are widely used to compress video data, save storage space, and reduce channel bandwidth during transmission. HEVC is the last released video coding standard developed by the Joint Collaborative Team on Video Coding (JCT-VC) which has been used for more than half a decade in many multimedia applications. This video coding standard splits the raw input video frames into rectangular blocks which are transformed to the frequency domain and then predicted based on the former decoded video either by motion compensated prediction, interprediction, or intraprediction [1]. Due to this block-based transform coding followed by coarse quantization, there may not be uniformity in the intensity of the pixel transition within the two adjacent blocks. This nonuniformity in the transition of the intensity of the pixel values generates a visible discontinuity in the reconstructed video and, thus, degrades the quality of the decoded video.

Nonsmooth block boundaries commonly observed in earlier video coding standards performed at low and medium bit rates, such as visible block boundaries, color biases, and blurring effects [2], still exist in H.264 and H.265. Nonsmooth block boundaries are known as the blocking effect which is one of the most perceivable and objectionable artifacts of block-based compression methods [3,4]. Figure 1 shows the existence of blocking artifacts at the block boundary. It shows the variation of the pixel intensities between the edges of two 4 × 4 blocks. DBFs are used to reduce these blocking artifacts. Figure 2 shows the elimination of the blocking artifacts by smoothening the intensities of the pixels at the edges of a block. The computational complexity of the DBF algorithm is one-third of the H.264 video decoder [3] and one-fifth of the H.265 video decoder [5].

The discontinuities are perceivable for the human visual system (HVS) as blocking effects in the region with lower activity in the video frame [6]. Preserving the same visual quality as the original visual scene is a significant challenge. The AVC and HEVC coding standards utilize lossy compression algorithms such as DCT/DWT, and, hence, the originality of the pixel intensities are lost when the video data are reconstructed. However, measures are taken to upgrade the quality of the reconstructed video in the codec. AVC has an in-loop filter called the deblocking filter (DBF) to reduce visible discontinuities. HEVC standard reduces this visible discontinuity in the main profile by the use of two in-loop filters applied to the reconstructed video in succession. These two in-loop filters are the DBF and the sample adaptive offset (SAO) filter. Although these filters are employed to improve the reconstructed video’s quality, these enhancement methods do not produce a perfect replica of the original image.

The DBF and SAO filters used in HEVC are optimized by modifying the filtering algorithms or by implementing the algorithms efficiently in hardware concerning cost and energy saving. Even though these optimization techniques enhance the quality of the video, we need to measure the quality to compare with different optimization techniques.

2. Related Work on Deblocking Filters

The deblocking filter and the sample adaptive offset (SAO) filter are the two filters used within the codec in the HEVC coding standard. To enhance the visual quality of the reconstructed frames, these filters are applied in two phases, the first stage applying the deblocking filter and the second stage applying the SAO filter. Blocking artifacts are eliminated by the deblocking filter, and the SAO filter enhances the visual quality by adding the offset values to the first-stage filtered pixel samples [7]. Edge offset or band offset are two possible offset values. The two filters for the HEVC coding standard are implemented in hardware adopting several architectural optimization techniques.

The SAO filter and deblocking filter are combined and implemented in hardware, or these filters are implemented separately as deblocking filter [2,8,9,10,11,12,13,14] and SAO filter [15]. Parallel and pipeline-based architectures are utilized to implement the area and throughput optimized deblocking filter. Few deblocking filter architectures use novel ordering for the filtering process to improve the performance. Several filter architectures were implemented by [8,16,17,18,19,20,21,22,23] to realize the H.265 deblocking filter. The deblocking filter architecture of H.264 is more complex compared to the deblocking filter architecture of H.265/HEVC deblocking filter [24]. SAO and deblocking filters were combined and are implemented by [17,23,25,26,27]. In [22,28], a graphics processing unit (GPU) was used to implement the in-loop filter using parallelism. A multicore coprocessor was used to implement the HEVC in-loop filtering in [19]. Convolutional neural network (CNN) was used by [29,30] to create an in-loop deblocking filter with coding unit categorization.

3. Quality Assessment Metrics

The HEVC standard is known to be advantageous for higher video resolutions such as HD and UHD videos with lower bit rates. The features of HEVC improve the compression ratio by 50% with an increase in the complexity by 150% compared to its former video coding standard AVC [31]. Research is ongoing to reduce the overall complexity of the coding standard without affecting the compression ratio. Overall complexity can be reduced if there is a reduction in the complexity of the various modules used in these coding standards, but reduction in computational complexity may deteriorate the quality of the encoded video stream.

Mean square error (MSE) and PSNR are the metrics used to evaluate the objective perceptional video quality [32,33]. Structural similarity (SSIM) is also employed to evaluate the video quality by [34,35], but none of the metrics correlate precisely with the perceptional quality of the HVS [36]. However, SSIM provides better results with respect to the perceptional quality of the HVS using the assessment of three components, viz., perceptional impact of changes in the luminance, contrast, and structure [37]. Despite the complexity of measuring SSIM, due to the assessment of three different components, it is more reliable compared to other measures [38]. Several block-edge impairment metrics were proposed and a generalized block-edge impairment metric (DBIM) was proposed by [39], which shows the difference in the perceptual quality. Equations (1)–(3) show the quality assessment of the reconstructed video using $PSNR$, $MSE$, and $SSIM$, respectively.

$$MSE\left(i,j\right)=\frac{({\sum }_{i=1}^M{\sum }_{j=1}^N{[f\left(i,j\right)-F\left(i,j\right)]}^2)}{M.N}$$

(1)

$$PSNR=20lo{g}_{10}\frac{255}{\sqrt{MSE}}$$

(2)

where $f(i,j)$ is the pixel value at ith row and jth column of the original video frame, $F(i,j)$ is the pixel value at ith row and jth column of the reconstructed/modified video frame, and M and N represent the width and the height of the video frame. The value of $PSNR$ ranges from 30 dB to 40 dB as the quality of the modified video ranges from medium to high, respectively.

$$SSIM=\frac{(2\overline{x}\overline{y}+C_1)(2{\sigma }_{xy}+C_2)}{[{\overline{x}}^2+{\overline{y}}^2+C_1]({\sigma }_x^2+{\sigma }_y^2+C_2)}$$

(3)

where $\overline{x}$, $\overline{y}$ are the mean of x and y, respectively; ${\sigma }_x$, ${\sigma }_y$, and ${\sigma }_{xy}$ are the variance of x, the variance of y, and the covariance of x and y, respectively; and $C_1$ and $C_2$ are constants. $SSIM$ values range between −1 to 1, and the quality is said to be the best when the value is 1 [38].

Among the various metrics for video quality assessment, PSNR is the most desired quality assessment metric owing to its lucidity. Though PSNR is used to check the quality of the video to a great extent, it does not provide the actual perceptual quality as perceived by the HVS.

4. Parallel Edge Deblocking Filter Architecture (PEDBF)

The dual-parallel edge DBF architecture [40], employing five pipeline stages (V-DPEDBF) used to assess the quality, is shown in Figure 3. The (i) control unit, (ii) boundary Strength (BS) calculation unit, and (iii) filter unit are the three main modules in this architecture. The various operations of the filter architecture are administered by the control unit. An enable signal is used as a primary input from the external world to enable the control unit. The control unit oversees and coordinates a number of processes, including data fetch from the external storage, data fetch from the memory within PEDBF, data write to the PEDBF memory, data write to the external storage device, activation of the boundary strength calculator, and activation of the filter unit. The BS unit determines the values of the BS, which range from 0 to 2. The filter unit performs the filtering procedure in accordance with the computed BS value.

4.1. Control Unit

The control unit is activated by the control signal, which is one of the primary inputs to the filter architecture. The control unit of the HEVC DBF has a finite state machine to administer all the operations to handle the deblocking filtering process. When the control signal is not active, all the filtering process is deactivated and, thus, the modules are turned off. Hence, the DBF architecture consumes less power. When the enable signal is active, the control unit triggers the state machine and activates the filtering process in five stages. Five stages—memory read, parameter computation, filter determination, filtering, and memory write—are managed by the state machine during the filtering process. The pixel data are fetched from the external memory, which is outside the filter architecture, after the finite state machine is enabled. Then, 4 × 4 blocks (128 bits) of pixel data are fetched for each clock cycle from the external memory. Figure 4a depicts the sequencing of data fetch from the external memory for a largest coding unit (LCU), which is a 64 × 64 block, whereas Figure 4b,c depict the sequencing of data fetch from the external storage for a 16 × 16 block. The state machine activates the filter unit and the BS calculation unit by generating control signals once four 4 × 4 blocks of pixel data are in place.

The 16 × 16 luma block’s vertical edges V1 and V2 are filtered in parallel in accordance with the determined BS value. Blocks 1 through 8 of the filtered pixel data are then transposed and stored in the internal memory. The filter unit is triggered once more to filter the edges V3 and V4 once the twelfth block of data is accessible. Blocks 9 through 16 of the vertically filtered data are eventually transposed and stored within the PEDBF architecture. After vertical filtering, the horizontal filter is applied by reading the pixel data that are stored within the PEDBF. The internal RAM receives the appropriate signals from the control unit to perform the required operation. H1 and H2 horizontal edges are parallel-filtered and then the filtered data are transposed. The frame memory, which is located external to the architecture, is subsequently written with the filtered data. The horizontal edges H3 and H4 are parallel filtered in a similar manner. After that, they are written to the external frame memory after being transposed. The Chroma Cb and Cr blocks filter the vertical edges (V5 and V6) first, followed by the horizontal edges (H5 and H6) using the same process. The filtered pixel data are subsequently saved in the external storage as 4 × 4 blocks, i.e., 128 bits for each clock cycle.

4.2. Boundary Strength Computation Unit

The boundary strength computation unit computes the BS value, as shown in Figure 5. The BS value range for the HEVC coding standard is between 0 and 2. The BS processing unit receives control signals regarding the pixel block received from the external buffer, such as whether the received pixel block is the left, right, top, or bottom edge of the frame, if it is inter/intracoded, and if its transform coefficients are not zero. The BS value is 0 if the block of pixel data read from the external buffer is a part of the left or top edge of a frame. In addition, the BS value is 0 if the data are not a part of the left or top edge of a frame, the two neighboring 8 × 8 blocks are not intracoded, if the block has nonzero transform coefficients, and if the motion vector is less than 4. The BS value is 1 if the transform coefficients of the block are nonzero and the adjacent blocks are not intracoded. The BS value is also 1 if the adjacent blocks are not intracoded and if the block does not have nonzero transform coefficients, and if the motion vector is higher than or equal to 4. The BS value is 2 if any of the above conditions are not met. DBF is triggered based on the calculated BS value. If the generated value of BS is 0, no filtering is performed; if the determined value is 1, a weak/normal filter is used; and if the stipulated value is 2, a strong filter is used.

4.3. Filter Module

When the pixel data are ready to carry out the filtering operation, the control unit turns on the filter unit. This unit is the sophisticated computational unit. The architecture of the filter unit is shown in Figure 6. It has a parameter computation unit, buffers to store the pixel data, a filter decision block, internal memories, a strong filter, and a weak filter.

4.3.1. Parameter Calculation Unit

This unit calculates the filtering parameters such as $\beta$ and $t_c$ according to Tables 8–12 of [41]. Based on the quantization parameter values and the BS of the neighboring P block and Q block, referred to $Q{P}_p$ and $Q{P}_q$, respectively, these filtering parameters are calculated. The LUT used to implement the parameter calculation unit has the outputs $t_c$ and $\beta$. These output values are relative to the inputs BS, $Q{P}_p$ and $Q{P}_q$.

4.3.2. Buffers

The filter unit of the dual-edge deblocking filter architecture uses eight buffers, as shown in Figure 7, each of which can store a 4 × 4 block of pixels (128 bits). These buffers are initialized with all zeroes. Before the control unit begins the filtering process, the block of pixels 1–4 indicated in Figure 4b from the external memory are stored into the corresponding buffers Q1 BUF, Q2 BUF, Q3 BUF, and Q4 BUF. The filtering operation is carried out along the vertical edges V1 and V2; at the same time, the block of pixels 5–8 is sent to the buffers P1 BUF, P2 BUF, P3 BUF, and P4 BUF, respectively. Figure 8 indicates the relative buffer for both the luma and chroma blocks, along with the outline of each 4 × 4 pixel block. The filtered data are saved to the internal RAM after the edges V1 and V2 have been filtered. Similar techniques are used to filter V3 and V4 vertical edges. For horizontal filtering, the pixel data kept in the internal memory were subsequently transferred to these storage units. The same process is utilized for horizontal filtering as for vertical filtering.

4.3.3. Filter Decision Unit

Based on the values of the parameters $\beta$ and $t_c$, the strength of the filtering procedure to be used for a 4 × 4 pixel block is determined. The pixel threshold values for the two neighboring blocks are decided by the filter decision unit.

4.3.4. Internal Memories

The memories utilized within the filter architecture employ four dual-port RAM to store the pixel data filtered vertically. A 4 × 4 block of pixel data can be stored in each of the four segments of the 64-byte RAM (16 bytes or 128 bits). Figure 9 and Figure 10 depict the transfer of the pixel data for the luma and the chroma Cb, Cr blocks from the RAM to the buffers. The amount of external memory access cycles is reduced by this method of data storage. It also avoids the utilization of transpose buffers. The first two memory regions are used exclusively during the chroma block filtering procedure, leaving the other regions unused.

4.3.5. Filter Modules

The architecture includes filter modules that make use of both strong and weak/normal filters. Any of these filters are activated according to the filtering decisions determined by the filter decision unit. Therefore, any one of the weak filter or the strong filter is activated to execute the filtering process. The filtering process is omitted if the filtering decision unit determines for no filtering. The weak or strong filtering is executed according to the filtering equations specified in [41]. The similarities in these equations allow for the creation and implementation of a resource-sharing architecture for the filter module, which optimizes the area. The data from the horizontally filtered pixel block are then saved in the external memory, while the data from the vertically filtered pixel block are stored in the internal memory.

4.4. Resource Sharing Architecture

Depending on the deblocking filtering technique used in [9], which follows the HEVC standard, the weak and strong filter units are implemented. The filter architecture is constructed in such a way that it shares the common resources that are used in these equations by taking advantage of the similarity in the filtering equations. This technique thenceforward brings down the area and the power utilization. The pixels of the two neighboring blocks are updated for the strong filter using the third parameter of the clip3 function, which is an equation involving two or more of the pixel values of the adjacent P and Q blocks. Adders and shifters are utilized to implement these equations in the hardware. It is identified that $p_0+q_0$ is employed in all the expressions and $p_0+q_0+2$ is used in most of the expressions. In addition, $p_1+2$ and $q_1+2$ are used twice. Hence, to add $p_0+q_0$, an eight-bit binary adder is employed and the output is fanned out to all the equations. This adder’s output is also used as an input for another binary adder, whose other input is 2, producing the result $p_0+q_0+2$, which is then utilized in the appropriate expressions. The same mechanism is used to implement the addition operations $p_1+2$ and $q_1+2$, and the output of these adders is reused wherever necessary. As a result, the shared resources are distributed over several equations, and an area-optimized filter is used. Figure 11 depicts the resource sharing architecture used for the third argument of the clip3 function for the strong filter.

5. Quality of PEDBF for HEVC/H.265

The optimization techniques employed in the hardware architectures of the DBF filter should not deteriorate the quality of the reconstructed video for any reason. Degradation in the quality of the filtered video will lead to poor performance and coding inefficiency. The DBF algorithm is highly adaptive and data-dependent, as the current edge to be filtered depends on the previously filtered pixel blocks. Since different filter ordering is followed, these changes in the ordering should not affect the quality of the filtered video. Hence, the quality assessment of the dual-edge DBF for H.265 coding standard is measured using PSNR.

Quality Assessment Procedure

To measure the quality of the V-DPEDBF architecture, the following steps are executed sequentially.

• Original raw video is given as input to the HEVC Test Model to obtain the reconstructed video by disabling the in-loop filter
• Reconstructed video data from the HM is given as input to the dual-parallel edge deblocking filter (PEDBF) architecture.
• The input video to PEDBF architecture is split into luminance (Y), chrominance Cb (U) and, chrominance Cr (V) components.
• Each video component is segregated into image frames and stored into frame buffers.
• Each image frame of the Y, U, and V components is fetched from the frame buffers.
• Each image frame is split into uniform pixel blocks of size 16 × 16.
• Each 16 × 16 block is again split into four 8 × 8 blocks.
• DBF is applied at the boundary of two 8 × 8 blocks simultaneously for vertical filtering.
• The vertically filtered output data are transposed and moved into pixel buffers to perform horizontal edge filtering.
• Horizontal edge filtering is performed after the vertical edge filtering is performed for the entire 16 × 16 block.
• The horizontally filtered output is transposed and stored into the frame buffer.
• The filtered video of PEDBF is reconstructed from the frame buffer.
• The PSNR of the filtered video is computed.
• Original raw video is given as input to the HEVC Test Model to obtain the reconstructed video by enabling the in-loop filter.
• The PSNR of the filtered video from the HEVC reference software is computed and the results are compared.

The flow diagram to perform the quality assessment is shown in Figure 12.

6. Filter Selection

The filter architecture uses four resource sharing edge filters that operate simultaneously to filter the edges of two 8 × 8 blocks of pixels. Each 8 × 8 block’s filtering decision is made in accordance with the $\beta$, $t_c$ parameters and in accordance with the threshold values of the two adjacent pixel blocks. The following criteria are employed for selecting the type of filter:

• If the BS value is zero, then no filtering is performed.
• If the BS value is nonzero, then Equations (4)–(8) are computed; and if Equation (8) is not satisfied, then no filtering is performed.

  $$dp0=abs(p_{2,0}-2p_{1,0}+p_{0,0})$$

  (4)

  $$dp3=abs(p_{2,3}-2p_{1,3}+p_{0,3})$$

  (5)

  $$dq0=abs(q_{2,0}-2q_{1,0}+q_{0,0})$$

  (6)

  $$dq3=abs(q_{2,3}-2q_{1,3}+q_{0,3})$$

  (7)

  $$dp0+dp3+dq0+dq3<\beta$$

  (8)
• If Equation (8) is satisfied then Equations (9)–(16) are computed to decide a strong or weak filter. If Equations (11)–(16) are satisfied, then a strong filter is used.

  $$dpq0=dp0+dq0$$

  (9)

  $$dpq3=dp3+dq3$$

  (10)

  $$dpq0<\beta /8$$

  (11)

  $$dpq3<\beta /8$$

  (12)

  $$abs\left(p_{3,0}-p_{0,0}\right)+abs\left(q_{0,0}-q_{3,0}\right)<\beta /8$$

  (13)

  $$abs\left(p_{3,3}-p_{0,3}\right)+abs\left(q_{0,3}-q_{3,3}\right)<\beta /8$$

  (14)

  $$abs\left(p_{0,0}-q_{0,0}\right)<2.5t_c$$

  (15)

  $$abs\left(p_{0,3}-q_{0,3}\right)<2.5t_c$$

  (16)
• If any one of Equations (11)–(16) are not satisfied, then Equations (17)–(20) are computed and if Equation (20) is satisfied, a weak filter is used.

  $$dp0+dp3<\beta /16$$

  (17)

  $$dq0+dq3<\beta /16$$

  (18)

  $${\delta }_0=9\left(q_{0,0}-p_{0,0}\right)-3\left(q_{0,1}-p_{0,1}\right)\gg 4$$

  (19)

  $$abs\left({\delta }_0\right)<10t_c$$

  (20)
• If Equation (20) is not satisfied then the filtering process is skipped (no filter).

7. Filtering Operation

The deblocking filtering operations are performed on the edges of the luma and the chroma Cb and Cr pixel blocks based on the computed boundary strength value. Boundary strength is computed based on the coding information given by the codec.

7.1. Luma Block

A strong filter is used, and up to three pixels on either side of the block edges are adjusted as in Equation (21) to Equation (26) for a luma block if the computed BS value is 2.

$$\begin{array}{c}{p}_0=Clip3(p_0-2t_c,p_0+2t_c,\hfill \\ \left(p_2+2p_1+2p_0+2q_0+q_1+4\right)\gg 3)\hfill \end{array}$$

(21)

$$\begin{array}{c}{p}_1=Clip3(p_1-2t_c,p_1+2t_c,\hfill \\ \left(p_2+p_1+p_0+q_0+2\right)\gg 2)\hfill \end{array}$$

(22)

$$\begin{array}{c}{p}_2=Clip3(p_2-2t_c,p_2+2t_c,\hfill \\ \left(2p_3+3p_2+p_1+p_0+q_0+4\right)\gg 3)\hfill \end{array}$$

(23)

$$\begin{array}{c}{q}_0=Clip3(q_0-2t_c,q_0+2t_c,\hfill \\ \left(p_1+2p_0+2q_0+2q_1+q_2+4\right)\gg 3)\hfill \end{array}$$

(24)

$$\begin{array}{c}{q}_1=Clip3(q_1-2t_c,q_1+2t_c,\hfill \\ \left(q_2+q_1+q_0+p_0+2\right)\gg 2)\hfill \end{array}$$

(25)

$$\begin{array}{c}{q}_2=Clip3(q_2-2t_c,q_2+2t_c,\hfill \\ \left(2q_3+3q_2+q_1+q_0+p_0+4\right)\gg 3)\hfill \end{array}$$

(26)

If BS = 1, then a weak filter is applied and the pixels on either side of the block edges are modified as in Equations (27)–(32).

$$\Delta =9\left(q_0-p_0\right)-3\left(q_1-p_1\right)+8\gg 4$$

(27)

If $\mathrm{Abs}(\Delta )<10t_c$ then

$$\Delta =Clip3(-t_c,t_c,\Delta )$$

(28)

$$p_0={Clip1}_Y(p_0+\Delta )$$

(29)

$$q_0={Clip1}_Y(q_0-\Delta )$$

(30)

when dEp = 1, then

$$p_1={Clip1}_Y(p_1+{\Delta }_p)$$

(31)

where ${\Delta }_p=Clip3(-\frac{t_c}{2},\frac{t_c}{2},\left(\left(\left(p_2+p_0+1\right)\gg 1\right)-p_1+\Delta \right)\gg 1)$.

When dEq = 1, then

$$q_1={Clip1}_Y(q_1+{\Delta }_q)$$

(32)

where ${\Delta }_q=Clip3(-\frac{t_c}{2},\frac{t_c}{2},\left(\left(\left(q_2+q_0+1\right)\gg 1\right)-q_1+\Delta \right)\gg 1)$

7.2. Chroma Block—Cb and Cr

Chroma blocks are filtered only if BS = 2, and no filtering is performed when BS = 1 or 0. When BS = 2, the strong filter is applied, and the pixels $p_0$ and $q_0$ alone on either sides of the block edges are modified as in Equations (33)–(35).

$${\Delta }_c=Clip3(-t_c,t_c,(\left(\left(p_0-q_0\right)\ll 2\right)+p_1-q_1+4)\gg 3)$$

(33)

$$p_0=ClipY(p_0+{\Delta }_c)$$

(34)

$$q_0=ClipY(q_0-{\Delta }_c)$$

(35)

8. Results and Discussion

The quality assessment of the five-stage pipelined dual-edge deblocking filter architecture implemented for the HEVC standard [40] is performed using Matlab. Different test video sequences are used to obtain the PSNR values of the PEDBF architecture using different QP values. The typical QP value is 32. Hence, the quality assessment is performed with the typical QP value (32), the QP value lesser than the typical value (27), and QP value greater than the typical QP (37). Figure 13 shows an image frame of the original video sequence. This original/raw video sequence is given as input to the HM software to obtain two different types of encoded video. One type of encoded video is obtained from the HM software with the deblocking filter turned off (without DBF), and another type of encoded video is obtained from the HM software with the deblocking filter turned on (with DBF). Figure 14 and Figure 15 show a sample frame of the output video sequence from the HM software without DBF and with DBF, respectively. The encoded output video from the HM software without DBF is used to perform the quality analysis of the PEDBF architecture. This video encoded without DBF is given as the input video sequence to the PEDBF implemented in Matlab to undergo deblocking filtering. Figure 16 shows a sample frame of the output video obtained from the PEDBF. The PSNR value of the output video obtained from the PEBDF is computed.

The quality of this architecture is assessed by comparing the PSNR value of the output video of the PEDBF architecture and the PSNR value of the video obtained using the HM software with DBF turned on for different QP values. The results for QCIF video sequences are tabulated in

Table 1. PSNR of QCIF video sequences with QP = 32.

Video Sequence	HM (dB)	PEDBF (dB)
Akiyo	37.3833	37.59186
Coastguard	34.4138	36.40767
Foreman	35.4274	36.58643
Mobile Calendar	32.2366	32.85071
Hall	36.4334	37.235
Carphone	36.1972	36.4323
Miss America	38.8972	39.12775

and the comparison graph is shown in Figure 17 with QP = 32. The results for CIF video sequences are tabulated in

Table 2. PSNR of CIF video sequences with QP = 32.

Video Sequence	HM (dB)	PEDBF (dB)
Akiyo	38.307737	39.2812
Coastguard	35.03723	34.9852
Foreman	35.8951	35.99
Mobile Calendar	33.04411	33.0432
Hall	36.93208	37.4513
Tempete	34.09227	34.224

and the comparison graph is shown in Figure 18 with QP = 32. It is noted that the implemented architecture shows a slight improvement in quality concerning the PSNR metrics. The execution time for QCIF and CIF video sequences are tabulated in

Table 3. Processing time of QCIF video sequences with QP = 32.

Video Sequence	HM (Sec)	PEDBF (Sec)
Akiyo	64.678	39.4553
Coastguard	85.103	44.81924
Foreman	82.368	45.6632
Mobile Calendar	85.673	43.21693
Hall	64.064	37.28175
Carphone	73.358	43.57872
Miss America	23.811	13.27997

and

Table 4. Processing time of CIF video sequences with QP = 32.

Video Sequence	HM (Sec)	PEDBF (Sec)
Akiyo	264.989	165.49741
Coastguard	376.373	196.2231
Foreman	278.388	176.485
Mobile Calendar	312.898	193.3375
Hall	219.416	112.2503
Tempete	229.776	152.46557

, respectively, and the comparison graphs are shown in Figure 19 and Figure 20. It is seen that, as the two edges are filtered in parallel, the filtering time is reduced by 50%, and thus the throughput of the architecture is improved by 50% with the increase in quality.

Table 5. PSNR of QCIF video sequences with QP = 37.

Video Sequence	HM (dB)	PEDBF (dB)
Akiyo	34.0182	34.893362
Coastguard	31.1392	33.457211
Foreman	32.1997	33.862149
Mobile Calendar	28.3189	29.568311
Hall	32.971	34.430916
Carphone	32.9865	34.303814
Miss America	36.4185	37.267113

and

Table 6. PSNR of CIF video sequences with QP = 37.

Video Sequence	HM (dB)	PEDBF (dB)
Akiyo	36.2985	36.716387
Coastguard	31.8043	33.970701
Foreman	33.0051	34.390624
Mobile Calendar	29.2222	30.454212
Hall	34.5437	35.553274
Tempete	30.6828	32.131876

show the results of QCIF and CIF video sequences, respectively, filtered with QP = 37, and the comparison graphs are shown in Figure 21 and Figure 22. The execution time for QCIF and CIF video sequences are tabulated in

Table 7. Processing time of QCIF video sequences with QP = 37.

Video Sequence	HM (Sec)	PEDBF (Sec)
Akiyo	46.354	23.904816
Coastguard	52.02	27.976072
Foreman	48.861	28.335635
Mobile Calendar	70.905	38.544973
Hall	50.138	28.943229
Carphone	63.938	33.216266
Miss America	23.778	15.006227

and

Table 8. Processing time of CIF video sequences with QP = 37.

Video Sequence	HM (Sec)	PEDBF (Sec)
Akiyo	361.664	139.577545
Coastguard	323.229	141.569951
Foreman	293.987	161.030763
Mobile Calendar	461.949	225.603688
Hall	280.68	142.62714
Tempete	200.476	112.878238

, and the comparison graphs are shown in Figure 23 and Figure 24.

Table 9. PSNR of QCIF video sequences with QP = 27.

Video Sequence	HM (dB)	PEDBF (dB)
Akiyo	40.8999	40.891213
Coastguard	38.1673	39.927605
Foreman	38.9294	39.793245
Mobile Calendar	36.6292	36.744202
Hall	39.8733	40.164219
Carphone	39.6617	39.917189
Miss America	41.5719	41.766507

and

Table 10. PSNR of CIF video sequences with QP = 27.

Video Sequence	HM (dB)	PEDBF (dB)
Akiyo	42.2861	42.332459
Coastguard	38.6598	40.411503
Foreman	39.2529	40.130872
Mobile Calendar	37.1378	37.29197
Hall	40.1375	40.525791
Tempete	38.0572	38.495716

show the results of QCIF and CIF video sequences, respectively, filtered with QP = 27, and the comparison graphs are shown in Figure 25 and Figure 26. The execution time for QCIF and CIF video sequences are tabulated in

Table 11. Processing time of QCIF video sequences with QP = 27.

Video Sequence	HM (Sec)	PEDBF (Sec)
Akiyo	66.61	32.722607
Coastguard	72.627	39.74846
Foreman	81.681	41.068033
Mobile Calendar	120.716	58.555709
Hall	67.687	35.016408
Carphone	95.34	55.400211
Miss America	24.741	13.174376

and

Table 12. Processing time of CIF video sequences with QP = 27.

Video Sequence	HM (Sec)	PEDBF (Sec)
Akiyo	205.041	100.410937
Coastguard	277.788	150.710927
Foreman	250.539	126.669947
Mobile Calendar	352.151	208.336164
Hall	228.818	117.526938
Tempete	263.123	156.781587

, and the comparison graphs are shown in Figure 27 and Figure 28.

Based on the experiments carried out with different video sequences of different resolutions for different QP values, it is identified that as the QP value increases, the quality decreases and results in lower PSNR values. In addition, the execution time decreases as the QP value increases. This behavior is as expected with any video coding algorithm. Hence, the PEDBF architecture complies with the coding standards. The execution time of the PEDBF architecture is reduced to almost half of the execution time of the HM, owing to the fact of filtering two edges in parallel.

9. Conclusions

The quality assessment of any algorithm implemented in hardware is strongly required as the optimization techniques do not affect the quality of the reconstructed video data in any of the processing steps. Among the various quality assessment metrics, we use the metric PSNR to assess the quality of the video owing to its simplicity. Raw video data of two different resolutions (QCIF and CIF) are taken and the quality of the filtered video is checked with the quality of the video obtained from the HEVC Test Model. It is noted that the quality of the parallel edge filter architecture does not affect the quality of the reconstructed video, and it shows slight improvements compared to the HEVC Test Model. In one second, ten to twelve separate images can be processed by the human visual system by perceiving each image discretely. One image is held in the visual cortex for around one of fifteen parts in a second. Therefore, as the frame rate is higher, perception of the moving picture will be smooth. Hence, the processing time decreases in the dual-parallel edge DBF, the frame rate will increase, and, thus, the perceptual quality is increased.