Research on Key Technologies of Data Processing Mechanisms in Ternary Optical Computer

Abstract

This paper introduces an arithmetic data file, a key technology for data processing in a ternary optical computer (TOC). The physical form of the ternary optical processor and its data processing characteristics are analyzed. Based on this analysis, the compution-data is constructed, and research is carried out on the format of the compution-data, its generation method, and the expansion of high-level languages transmitted to the ternary optical processor. The calculation rules and the raw data for the ternary optical computer are organized into a file that conforms to the calculation characteristics of the computer. A data processing mechanism based on the compution-data is proposed. Finally, an experimental test was conducted on the platform of a ternary optical computer using specific examples. The results showed that by organizing and transmitting data through the compution-data, the ternary optical computer could fully utilize its computational advantages in data processing while shielding the underlying complex hardware processing. This makes it convenient for users to apply this new type of computer. This data processing mechanism can offer a novel perspective for other heterogeneous systems in data processing.

1. Introduction

1.1. Research Status of TOC

The ternary optical computing system, led by Professor Yi Jin at Shanghai University, starts from the fundamental principles of computing to investigate optical computing systems that can fully exploit optical advantages. After over a decade of development, substantial progress has been achieved in theoretical foundations, prototype systems, application routines, computing routines, and advanced programming interfaces. This has led to an increasing number of researchers delving into research on ternary optical computing. Reference [1] implements parallel Modified Signed-Digit (MSD) integer division in ternary optical computing, promoting the development of ternary optical computing in the field of numerical computation. Reference [2] introduces key technologies and implementation mechanisms for parallel operation of TOC systems. The proposed parallel implementation mechanism effectively leverages the computing advantages of TOC. Reference [3] designs a memory shift system based on a dual-space storage architecture, which addresses the storage issues of TOC. Reference [4] designs a tristate optical signal detector to improve the accuracy and stability of decoding results in TOC. References [5,6,7] implement various forms of MSD adders in ternary optical computing systems, playing important roles in addressing carry propagation delay issues and promoting the development of TOC.

1.2. Relevant Issues in Data Processing

With the increasing richness in theory, structure, and experimental systems of the ternary optical computer (TOC), its computational advantages are attributed to three main characteristics [8]: numerous processor bits, allocatable processor bits, and the runtime reconfigurability of each processor bit’s computational function. In contrast, electronic computers have a fixed number of data bits, non-allocatable data bits among different users, and immutable computational functions of processors. Common data processing methods designed entirely based on the characteristics of electronic processors cannot exploit the advantages of TOC [9]. Therefore, new data processing mechanisms tailored to the TOC’s features of numerous data bits, allocatable data bits, and reconfigurable computational functions of data bits need to be explored [10]. The ternary optical computer contains an upper and lower computer; the upper computer is a traditional PC, and the lower computer uses a ternary optical processor (TOP) [11]. A key issue that must be addressed at this stage is how to conveniently transfer data requiring TOC processing to the lower machine, fully leverage the computational advantages of the TOC, and allow people to have two types of computers that work collaboratively rather than in opposition.

The biggest difference between a TOC processor and a traditional processor in terms of application is that it allows the user to reconfigure the computational functions of each processor bit at any time, and a huge number of processor bits can be used independently in any group. In addition, the memory of the TOC has a data bus width on the processor-facing side that varies with the total number of processor bits, but this characteristic is not apparent at the application program level [12,13,14]. However, various traditional data processing mechanisms established around electronic CPUs, GPUs, or MICs, which lack these three application characteristics, are not suitable for the TOC’s data processing methods.

This paper proposes a data processing method for the TOC, including the computation-data file, the generation of the computation-data file, and the transmission of the computation-data file. The computation-data file organizes the user-submitted computational rules and raw data into a specialized file designed according to the computational characteristics of the TOC. The computation-data file generation software runs on an auxiliary PC to assist users in generating the file. The transmission of the computation-data file involves extending a high-level language with a set of instructions to send the file to the TOC [12,15,16]. By parsing the information carried in the computation-data file, the optical processor is reconfigured, and the reconfigured calculator is used to process the data [17]. This data processing mechanism can fully exploit the computational advantages of the TOC, is fully compatible with traditional applications, shields users from the complex processing at the TOC processor end, facilitates the use of this new type of computer, and is expected to provide new ideas for data processing as other new types of computers enter the application stage.

2. Characteristics Analysis of TOC

2.1. The Physical Form of TOP

In the various components of the TOC, processor bits exhibit unique physical forms. The abstract structure of n processor bits is depicted in Figure 1. The input and output memories are located in the storage space of the PC facing the user, forming a conduit for the interaction of data between the TOC and the user. The input data buffers Ra and Rb, output data buffer Rc, reconstruction command buffer Rm, and bit latches A, B, C, and the reconstruction circuit constitutes the circuit part of the optical processor module [18,19,20]. Ra and Rb store the n-bit numbers of the two input data a and b for the current computation, Rc stores the n-bit number of the result C, and Rm forms the image of the optical calculator to be reconstructed in the form of a command set. According to the processor bit allocation strategy, the input data a and b are sent to the data buffers Ra and Rb, respectively. In Ra and Rb, each bit of data is parsed into an encoding form recognized by the encoder through a task analysis strategy. The encoding is then sent to latches A and B, passes through the encoding, control information channel, optical signal converter, and decoder enter latch C, and finally, the data are stored in the output register, completing a computation of n-bit data.

2.2. TOC Computational Characteristics

There are three physical states of light (horizontal light, vertical light, and no light state), which are appropriate for computers [19,21,22]. The non-interfering nature of light during transmission determines that a TOC can have a multitude of processor bits. The processor bits of TOC are made up of liquid crystal pixels, and current liquid crystal devices have a huge number of pixels, which allows TOC to have a large number of processor bits [23,24]. The natural laws embedded in the reduction design theory dictate the reconfigurability of the TOC’s processors [25,26,27,28]. The ternary nature and the reconfigurability of processors also make the TOC well-suited for binary Most Significant Digit (MSD) parallel adders.

The “on-demand reconfigurability” refers to the optical processor’s ability to dynamically adjust the functions of processor bits according to the actual requirements of the user [29,30]. Since the optical processor cannot anticipate computational demands in advance, the hardware must be reconfigurable at any moment. Considering system security, the reconfiguration requests are submitted by the user, and the processor is restructured by the system’s underlying modules as per these requests, specifically through the computation-data file.

2.3. MSD Number System

In conventional numeral systems, an n-radix has n numeral symbols representing values from 0 to n-1, with carry-over every n. If each digit in an n-radix has n + r numeral symbols (where n and r are positive integers) and still carries over every n, then each digit can represent n + r-1 values, known as redundant counting. Clearly, in redundant counting, a numerical value can have multiple representations, which is inconvenient for human use but convenient in multi-valued computers. In ternary optical computing, only redundant counting with n = 2 and r = 1 is feasible, with the most convenient form being MSD counting. This method was proposed by A. Avizienis et al., in 1961 [31] and introduced into optical computing by Drake et al. in 1986 [32]. Ternary optical computers employ the MSD number system, which represents a signed ternary binary number allowing multiple representations of any decimal number, providing the theoretical foundation for carry-free addition. In theory, the physical states of the TOC and the MSD symbol expressed by them are equivalent.

Nevertheless, dark light is used to express the symbol 0, one polarized state of light the symbol 1, and the other polarization symbol -1. Therefore, each MSD digit is expressed explicitly by hardware in the TOC. The symbol set of the MSD number system is {2, 0, 1}, where 2 represents the value -1. Any decimal number D can be expressed in the MSD number system with the expression: ${\sum }_i{a}_i{2}^i$. For ease of description, in this paper, decimal numbers are denoted by subscript D, MSD numbers by subscript M, and binary numbers by subscript B. For the number 6: ${\left(6\right)}_D={\left(110\right)}_B={\left(1020\right)}_M={\left(1210\right)}_M={\left(12020\right)}_M$. For the number -6: ${\left(\text{-}6\right)}_D={(-110)}_B={\left(2010\right)}_M={\left(2120\right)}_M={\left(21010\right)}_M$. Comparing the MSD representations of these two numbers reveals that the representation of a number in MSD is obtained by inverting the representation of its corresponding negative number. This characteristic is generalizable across MSD representations.

3. Computation-Data Files

3.1. Principles of Computation-Data File Construction

The computation-data file is the sole method of information exchange between users and the ternary optical computer when processing large volumes of data. The data entered by users must strictly adhere to the protocol requirements of the computation-data file to be recognized and computed by the TOC. The header and the data area are two important parts of the computation-data file. The header records the overall information of the file as well as all of the user’s computational needs. And the TOC’s task management system will allocate processor bit resources and reconfigure the TOP based on the information in the file header. The data section stores all the raw data input by the user and also places the computed results returned by the TOC to the user. In the latest version of the computation-data file, the file header occupies 26,920 bytes, and the data section ranges from 0 to (1T - 26,920) bytes. The principles for defining the format of the computation-data file are as follows:

• File header: The file header. It includes all the information needed to reconfigure the processor, as well as the user’s priority, the number of computational units, and the total amount of data to be computed.
• Ease of parsing: Because the task management system for parsing computation-data files runs on a secondary PC that typically processes binary data in 32- or 64-bit units, the design of the computation-data file header must be compatible with the current processing requirements of the PC.
• Reserved expansion bits: As the TOC continues to evolve and the problems it can handle become increasingly complex, the parameters and functions contained in the computation-data file will also become more enriched and varied. To accommodate these changes, it is necessary to reserve some bits in the appropriate positions of the computation-data file header to facilitate future upgrades of the computation-data file version.

3.2. Computation-Data File Format

Constructed according to the principles as mentioned above, the computation-data file’s header contains information primarily to provide the necessary parameters to reconfigure the optical processor. In contrast, the data section includes the operands, including operand b and operand a. As depicted in Figure 2, following the numbering provided in Figure 2, the construction of the computation-data file is detailed as follows:

• Version Number: The version number allows the computation-data file parsing software to know the nature of the current version of the computation-data file and to be compatible with later versions. This field is 16 bits and specifies that the first byte represents the master version number and the second byte represents the revision number to the master version.
• File (Structure) Name: This field records the name of the computation-data file. Users may submit multiple computation-data files to the TOC, and each file may be renamed, split or merged according to the TOC’s computational rules during transmission and use. Therefore, to ensure that the computation result files returned by the TOC correctly correspond to the submitted files, this field has been established.
• IP address: This field records the IP address of the user, facilitating the return of the computation results file. Currently, this field is 48 bits to record an IPV4 address. In subsequent versions, if an IPV6 address is adopted, this field must be expanded to 128 bits. This field records the IP address of the user.
• Priority: Indicates the priority of the computation-data file. Support fields are reserved for users to prioritize tasks.
• Reserved 1: This bit is reserved to facilitate the addition of priority bits or data type bits in future versions. It is set to 1 bit to make the fields (3), (4), (5), and (6) form two bytes, which are the lowest two bytes in 32 bits or 64 bits.
• Data type: Indicates the type of data contained in the computation-data file. There are currently two types: structured data type and simple data type. Therefore, this field is currently 2 bits, with 00 representing simple data type, 01 representing structured data type, and 10 and 11 reserved for future use.
• Computation indicator count: The number of valid computation indicators contained in this computation-data file. This field enables the TOC’s task management software to correctly interpret all computation identifiers. This latest version of the computation-data file has 1280 computation identifiers. Hence, the field is set to 11 bits.
• Computation indicator (Item) 1 Name: This field facilitates the referencing of the original data and computation results corresponding to this computation indicator through instructions.
• Computation indicator (Item) 1 Character: Stores the values of the three English characters used in the ternary logic operation of computation identifier (item) 1. As a result, this field is 24 bits.
• Computation indicators 1-1280: This field provides the operational rules of each calculator to be reconstructed by the TOC and the characteristics of the corresponding original data. Each computation identifier is set to 128 bits.
• Reserved: Prepares for future expansion of calculation indicator information.
• Operation rule: This field records the computation rules specified by the user for the data contained in the calculation indicator i. It provides the basis for the lower computer to reconstruct the optical calculator. This field is set to 24 bits, with the highest 6 bits indicating the type of operation. Therefore, the operation-data file can represent up to 64 types of operations. The remaining 18 bits are used to represent the specific computation rules within each operation type. For example, when the highest 6 bits are 000000, it indicates that this operation type is a ternary (including binary) logic operation. In this case, the remaining 18 bits store, in sequence, three rows of ternary logic operation truth tables represented by internal codes, thus providing one of the 19,683 possible ternary logic operations. If the highest 6 bits are 000001, it indicates primary mathematical operations. In this case, the code with all 0s in the remaining 18 bits represents addition, and the code with the highest 17 bits of 0 and the last bit of 1 represents subtraction, and so on.
• Data bits: This field specifies the number of bits in the original data contained in calculation indicator $\mathit{i}$$(1\le \mathit{i}\le 1280)$, indicating that this set of data is of equal length. This field is set to 8 bits. For logical operations, each pair of data must have the same number of bits.

3.3. TOC Data Processing Method

Based on the hardware structure and computational characteristics of the TOC, a data processing method for the TOC is proposed, utilizing the computation-data file. The flowchart is depicted in Figure 3.

Based on the data processing method flowchart, the following processing scheme is implemented:

• Users’ computational rules and large amounts of raw data are organized into the computation-data file, which is specifically formatted and constructed based on the operational characteristics of the ternary optical computer.
• Specialized software assists users in creating the computation-data file. As depicted in Figure 4, this software provides a straightforward interface, requiring users to input only their computational requirements and original operands. The software then generates the corresponding computation-data file in line with the users’ intentions, operating on an auxiliary PC.
• The computation-data file is transmitted to the TOC by extending high-level language instructions, allowing users to employ the TOC through applications written in high-level languages.

4. Efficacy Experiment of Data Processing in TOC

4.1. Experiment Environment

TOC environment configuration: This experiment uses the No. 1 machine of the TOC prototype system—SD16, the shape is shown in Figure 5. Among them, the liquid crystal (LC) array of the TOP (black area with bright spots in the middle) has 576 pixels arranged in a 24 × 24 array. The three adjacent pixels in each line form one bit of the optical processor, so the experimental device has a total of 192 processor bits, meaning that 192 bits of data can be processed in parallel. The liquid crystal arrangement is shown in Figure 5, divided into left and right parts, with processor bit numbering indicated by arrows in the figure.

Computer environment configuration: The hardware environment is AMD Athlon (tm) 64-bit Core Duo PC, memory 8G; the software environment is Microsoft Windows 10; the compilation environment is Visual Studio 2022, using C language to transfer computation data files on the PC side.

4.2. Experimental Cases

The upper machine uses an electronic computer to generate computation-data files, while the slave machine uses SD16 to process these files, as depicted in Figure 6. The experimental case includes calculations of four simple data types, which are $({\mathit{fun}}_1=a+b),({\mathit{fun}}_2=c-d),({\mathit{fun}}_3=e\wedge g),\mathrm{and}({\mathit{fun}}_4=h\vee i)$. Here, the variables a and b are 17-bit decimal numbers, c and d are 12-bit decimal numbers; e and g are 19-bit ternary data with the range {X, Y, Z}; h and i are 20-bit ternary data with the range {M, N, P}. Each function has 2000 pairs of data. Due to space limitations, this paper only lists the first 4 sets of test cases for the 4 functions, as depicted in

Table 1. Test cases.

Item	${\mathit{fun}}_1$	${\mathit{fun}}_2$	${\mathit{fun}}_3$	${\mathit{fun}}_4$
1	$a{\left(21121111122021122\right)}_M$	$c{\left(122210112021\right)}_M$	$e{\left(1001011010111001010\right)}_M$	$h{\left(11111100101011010101\right)}_M$
	$b{\left(22122111110220121\right)}_M$	$d{\left(120121201012\right)}_M$	$g{\left(1010101001010100110\right)}_M$	$i{\left(10011111001010100100\right)}_M$
2	$a{\left(20022111110220121\right)}_M$	$c{\left(120010112021\right)}_M$	$e{\left(1001011010111001111\right)}_M$	$h{\left(11101101101011010101\right)}_M$
	$b{\left(21001111122021122\right)}_M$	$d{\left(120120001012\right)}_M$	$g{\left(1010101001010100111\right)}_M$	$i{\left(10010111001010100101\right)}_M$
3	$a{\left(21120011121021110\right)}_M$	$c{\left(111021201012\right)}_M$	$e{\left(1101010010111021010\right)}_M$	$h{\left(10111100101000010101\right)}_M$
	$b{\left(11122021110000121\right)}_M$	$d{\left(111212211121\right)}_M$	$g{\left(1010101001010000110\right)}_M$	$i{\left(10111110001010000101\right)}_M$
4	$a{\left(21120011122021112\right)}_M$	$c{\left(101221201012\right)}_M$	$e{\left(1001010010111001010\right)}_M$	$h{\left(10111100101010010100\right)}_M$
	$b{\left(11122021110220121\right)}_M$	$d{\left(111212212021\right)}_M$	$g{\left(1010100001010000110\right)}_M$	$i{\left(11011101001010000100\right)}_M$

, where the MSD number ‘2’ in Table 1 represents “-1”.

4.3. Experimental Procedure

• Generating computation-data file.
  To input operation rules and operands in the interface depicted in Figure 4 to generate a computation-data file, follow these steps:

  (a)

  Press the ‘simple SD’ button in the interface. The computation-data file generation software will then fill in the “(8) Data Type” field in Figure 2 with the identifier code “01” for simple structured data types.

  (b)

  Enter the operation rules and data bit size for each component of the simple structured quantity one by one, i.e., for (${\mathit{fun}}_1$), (${\mathit{fun}}_2$), (${\mathit{fun}}_3$), and (${\mathit{fun}}_4$), press the ‘Enter Comp’ button after each component, and after all components are entered, press the ‘Enter SSD’ button. When ‘Enter Comp’ is clicked for the first time, the software will fill in the “(21) Item 1 Operation Rule and (22) Item 1 Data Bit Size” fields in Figure 2 with the information just entered by the user. When ‘Enter Comp’ is clicked for the (i)-th time, the software will fill in the “Item (i) Operation Rule” and “Item (i) Data Bit Size” fields with the information just entered by the user.

  (c)

  Continuously enter the structured quantity data, separating each component with a comma and each structured quantity with a semicolon. Each piece of data entered is displayed on the right side of the interface and can be corrected.

  (d)

  After pressing the ‘Enter’ key, the computation-data file generation software will fill the original data entered into the data area in Figure 2, thus creating a TOC computation-data file in the format $X:\ae \ast .szg$, where X is the storage disk specified by the user, j is the folder on disk X, * is the name of the file, and .szg is the dedicated suffix for TOC computation data files.

• Transferring computation-data files to ternary optical processors.
  After generating the *.szg file with the operation rules and raw data, it is only necessary to send the computation-data file to the TOC at the appropriate time in the program. This experiment extends the C programming language with a set of instructions for sending the computation-data file to the TOC and waiting for the operation result file. This set of extended instructions has the following functions: establish a communication connection with the TOC; send the *.szg file to the task management module of the TOC monitoring system; query whether the operation result file (*-r.szg) has been returned or suspend the program, wake up when waiting for the operation result file to return; continue executing the program after the *-r.szg file returns; mid-range communication with TOC. The extended statements for the C program in this experiment are as follows:

  (a)

  void SZG_Init(). The purpose of this instruction is to establish an expanded instruction environment for TOC. It must be placed in the first SZG class expansion instruction in the program and is run only once in the program.

  (b)

  int SZG(char *path). Sends the computation-data file pointed to by the address pointer path to the ternary optical processor.

  (c)

  int SZG_SearchResult(char *path). The function of this instruction is to query the operation status of the computation-data file pointed to by the address pointer on the TOP. If the return value is “0”, it means that the result file *-r.szg has been obtained; if the return value is “1”, it means that the result file has not been obtained; if the return value is “2”, it means that there was an error in the processing of the computation-data file on the TOP computer side, and no result is returned.

  (d)

  void SZG_Suspend(). This instruction suspends the program until a result file is returned.

• Ternary optical processor bit allocation.
  Upon receiving the computation-data file, the ternary optical processor reconstructs the calculator based on the number of operator positions specified in the file. The first 86 processor positions are reconstructed into an adder, 87–147 construct a subtractor, 148–166 form a “Logical AND” operator, and 167–186 form a “Logical OR” operator. The TOC employs MSD addition, which is realized through the transformations T, W, T’, W’, and T2. For a detailed introduction to MSD addition, please refer to reference [27]. The allocation of operator positions for these five transformations is depicted in

  Table 2. Processor bit allocation for adder and subtractor.

  	T	W	T’	W’	${\mathit{T}}_2$
  ${\mathit{fun}}_1$	0–16	17–33	34–50	51–68	69–86
  ${\mathit{fun}}_2$	87–98	99–110	111–122	123–134	135–147

  , and the allocation for the two logical operations is depicted in

  Table 3. Processor bit allocation for logic operators.

  ${\mathit{fun}}_3$ (Logic AND)	${\mathit{fun}}_4$ (Logic OR)
  148–166	167–186

  .

4.4. Experimental Results and Analysis

The data processing method of the TOC constructed in this paper differs significantly from traditional electronic computers in that users no longer need to arrange the sequence of operations and data transfer and transmission timing for each part of the processor with individual instructions. Instead, users only need to specify computational requirements and processor bit requirements and hand over a large number of raw data to the TOC management system, which controls and allocates processor bit resources. The number of computations under different processors is shown in Figure 7, where Figure 7a shows the number of computations processed by an electronic computer. In an electronic computer, a computational instruction includes multiple specific calculation instructions, each controlling its operator once. Thus, a total of 8000 operations are required to complete the computation of 8000 pairs of scalar data. Figure 7b shows the number of computations when only one matching processor is reconstructed in an optical computer, requiring only 2000 repetitions of the computation instruction to complete all 2000 pairs of structured data, i.e., all 8000 pairs of scalar data. Figure 7c shows the case of reconstructing two optical processors, where the ternary optical computer reallocates another 186 bits to construct a second composite processor containing four operators, and only 1000 repetitions of the computation instructions are needed to complete the computation of these 8000 pairs of scalar data.

Generally speaking, a ternary optical computer has several thousand bits and can reconstruct dozens of simple structured quantity processors, requiring only dozens of repetitions of the computation instruction to complete the task. For example, in the SD11 system of the TOC for application research, one basic module of the optical processor has 1024 bits, which can construct five such structured quantity processors. Therefore, SD11 only needs to execute 400 computation instructions to complete the computation task. The fewer the repetitions of the computation instruction, the less time and hardware are required for the computation process.

Based on the above analysis, the comparison of computational performance between electronic computers and TOC under different processor bit conditions is depicted in

Table 4. Comparison of computing performance between PC and TOC.

Performance Index	32-bit Electronic Processor	64-bit Electronic Processor	A Structured Data Processor	5 Structured Data Processors
$Reconstructiontime\left(T_0\right)$	0	0	$T_0(<10T_y)$	$T_0(<10T_y)$
Data bits (W)	$4\times 32=128$	$4\times 64=256$	186	1024
$Operationcycles\left(T_y\right))$	$4\times 2000=8000$	$4\times 2000=8000$	2000	$\left[\frac{2000}{5}\right]400$
$Amountofresource(W_x{T}_y+T_0)$	1,024,000	2,048,000	$372,000+T_0$	$409,600+T_0$

.

The theoretical result values of the experimental cases are depicted in

Table 5. Theoretical values.

Item	${\mathit{fun}}_1$	${\mathit{fun}}_2$	${\mathit{fun}}_3$	${\mathit{fun}}_4$
1	${\left(0201201111020010200\right)}_M$	${\left(01221012120000\right)}_M$	${\left(1011111011111101110\right)}_M$	${\left(10011100001010000100\right)}_M$
2	${\left(0212211111020010200\right)}_M$	${\left(01201201020000\right)}_M$	${\left(1011111011111101111\right)}_M$	${\left(10000101001010000101\right)}_M$
3	${\left(0011221011012000012\right)}_M$	${\left(01112102101200\right)}_M$	${\left(1111111011111001110\right)}_M$	${\left(10111100001000000101\right)}_M$
4	${\left(0011221011020010000\right)}_M$	${\left(01102002120000\right)}_M$	${\left(1011110011111001110\right)}_M$	${\left(10011100001010000100\right)}_M$

, the theoretical output diagram is depicted in Figure 8, and the result diagram output by the ternary optical processor is depicted in Figure 9. Figure 8a represents the theoretical output graph of the first set of results in Table 5, while Figure 9a shows a screenshot of the corresponding optical processor LCD output. Similarly, Figure 8b and Figure 9b correspond to the second set of results in Table 5, Figure 8c and Figure 9c correspond to the third set of results, and Figure 8d and Figure 9d correspond to the fourth set of results in Table 5.

To illustrate how to interpret the corresponding results from the figures, we will use the actual result shown in Figure 9a as an example: In the figure, the brightest point represents vertically polarized light (V state, denoted by 1), the next brightest point represents horizontally polarized light (H state, denoted by 2), and other points represent the no-light state (denoted by 0). We interpret the data row-wise, starting from the bottom to the top and from right to left, based on the liquid crystal array diagram, starting from index 0. Every three adjacent pixels constitute one bit. We can read a sequence of data: 0201201111020010200, which is expressed in MSD format. Decoding and converting this result into decimal: ${\left(0201201111020010200\right)}_M={(-107124)}_D={(-16839)}_D+{(-90285)}_D$, consistent with theoretical results. The experiments demonstrate that the computational-data files proposed in this paper can correctly generate operational files that the ternary optical processor can compute and execute accurately.

5. Conclusions

This paper presents a data processing method for TOC that leverages the hardware and computational characteristics of these systems. Using computation-data files, users’ computational rules and raw data are stored in a particular file format tailored to the TOC’s capabilities. These files serve as the operational objects for extended instructions in high-level languages, effectively shielding users from the complex underlying computational processes of the ternary optical processors and fully harnessing the computational advantages of TOC. Years of research and experimental results indicate that computation-data files are an effective data processing method in TOC. This data processing mechanism can be easily ported to other novel computer systems. By utilizing each processor’s respective computation-data files and corresponding extended instructions in programming languages, it is possible to achieve collaborative work. It makes sense to work in parallel.