Contextual Real-Time Optimization on FPGA by Dynamic Selection of Chaotic Maps and Adaptive Metaheuristics

Abstract

In dynamic and information-rich contexts, systems must be capable of making instantaneous, context-aware decisions. Such scenarios require optimization methods that are both fast and flexible. This paper introduces an innovative hardware-based intelligent optimization framework, deployed on FPGAs, designed to support autonomous decisions in real-time systems. In contrast to conventional methods based on a single chaotic map, our scheme brings together six separate chaotic generators in simultaneous operation, orchestrated by an adaptive voting system based on past results. The system, in conjunction with the Secretary Bird Optimization Algorithm (SBOA), constantly adjusts its optimization approach according to the changing profile of the objective function. This delivers first-rate, timely solutions with improved convergence, resistance to local minima, and a high degree of adaptability to a variety of decision-making contexts. Simulations carried out on reference standards and engineering problems have demonstrated the scalability, responsiveness, and efficiency of the proposed model. These characteristics make it particularly suitable for use in embedded intelligence applications in sectors such as intelligent production, robotics, and IoT-based infrastructures. The suggested solution was tested using post-synthesis simulations on Vivado 2022.2 and experimented on three concrete engineering challenges: welded beam design, pressure equipment design, and tension/compression spring refinement. In each situation, the adaptive selection process dynamically determined the most suitable chaotic map, such as the logistics map for the Welded Beam Design Problem (WBDP) and the Tent map for the Pressure Vessel Design Problem (PVDP). This led to ideal results that exceed both conventional static methods and recent references in the literature. The post-synthesis results on the Nexys 4 DDR (Artix-7 XC7A100T, Digilent Inc., Pullman, WA, USA) show that the initial Q16.16 implementation exceeded the device resources (128% LUTs and 100% DSPs), whereas the optimized Q4.8 representation achieved feasible deployment with 80% LUT utilization, 72% DSP usage, and 3% FF occupancy. This adjustment reduced resource consumption by more than 25% while maintaining sufficient computational accuracy.

1. Introduction

Complex optimization problems in engineering design involve selecting a set of parameters (variables) to achieve the optimum value of the design index (objective) under a set of relevant constraints. Such optimization problems are widespread across various domains, such as production cost optimization, public transport optimization, production decision optimization, structural design optimization, feature selection, and path planning [1,2,3,4,5]. Traditional gradient-based optimization methods often fail when dealing with multidimensional, multimodal, and non-linear functions, thus requiring metaheuristic algorithms that balance exploration and exploitation to progressively converge toward optimal or near-optimal solutions for optimal or near-optimal values [6,7,8,9,10], as shown in Figure 1, according to different search mechanisms.

(1)

Swarm Intelligence (collective behavior): This type is based on simple agents (ants, bees, birds, and wolves) that interact in a distributed manner to produce global solutions [11]. Examples of this type include Ant Colony Optimization (ACO), which uses pheromone traces to guide the exploration of graphs; Particle Swarm Optimization (PSO), which adjusts the speed of each particle according to its best history and that of the group; Gray Wolf Optimization (GWO), which models the hierarchy and hunting mechanisms of gray wolves; and Artificial Bee Colony (ABC), which is inspired by the sharing of information between foragers and scouts to direct the search.

(2)

Evolutionary Algorithms (natural selection): This type includes, for example, GA (genetic algorithm), which uses classic selection and recombination operators. DE (differential evolution) uses vector mutations based on the differences between individuals. ES (Evolution Strategy) focuses on self-adaptation of mutation parameters. GP (genetic programming) uses the evolution of program trees to solve a problem [1,12,13,14].

(3)

Physics/Chemistry-Based Algorithms (physical or chemical phenomena): These are based on the analogue of natural processes (cooling, gravitation, musical harmony, and cosmic expansion). Examples of this type include SA (simulated annealing), which relies on simulated annealing and temperature decay to escape local minima. GSA (Gravitational Search Algorithm) is based on attractive interactions inspired by gravity. HS (Harmony Search) is based on musical improvisation to generate and memorize ‘chords’ of variables. BB-BC (big bang-big brunch) is based on alternating dispersion (big bang) and contraction (big crunch) [15,16,17].

(4)

Mathematical Methods: These have their origins in derived operations or pure heuristics without biological inspiration, often deterministic. Examples of this type include Pattern Search, which is based on systematic explorations following predefined patterns. TS (Tabu Search) depends on memory structures to avoid revisiting recent solutions. Nelder–Mead is based on the simplex method for gradient-free minimization. Hill climbing is based on iterative local improvement [18,19].

In recent years, numerous works have exploited chaotic maps to enhance exploration and avoid premature convergence of various natural metaheuristic algorithms, as follows: (1) The Black-winged Kite Optimizer modifies integrated chaotic sequences (logistic, sinusoidal) in the search and updates phases to diversify the pool of solutions and improve overall convergence [20]. (2) Chaos-Enhanced White Shark Optimization (CWSO) substitutes adapted chaotic iterations for classical pseudo-random generators, allowing the algorithm to better escape local minima on real problems [21]. (3) The Improved Kepler Optimization Algorithm combines several chaotic maps to dynamically control the intensity of the mutation and perturbation operators, improving both search accuracy and speed [22]. (4) The Chaos-Enhanced Archimede Algorithm uses chaotic iterators to adjust the exploration/exploitation coefficients, resulting in better coverage of the search space for engineering and feature extraction problems [23]. Despite the great potential of these methods, they suffer from a significant constraint: they are based on the prior selection of a single chaotic map [24,25,26,27,28,29], applied statically to produce a single version of the initial algorithm. The concern is that, as soon as the cost function varies, the selected chaotic map may not be adequate to obtain optimal results [30,31,32,33].

This paper introduces a combined FPGA-based dynamic optimization framework for real-time embedded systems. This architecture combines large-scale parallelism and hot hardware reconfiguration with an abundance of multiple chaotic generators and an intelligent voting system. Whenever the objective function is changed, this solution immediately switches to the best-performing chaotic map—building on previous performance—to ensure varied exploration, rapid convergence, and optimal use of resources.

As illustrated in Figure 2, real-time optimization in embedded systems faces several challenges, including limited computational resources, strict latency constraints, and energy efficiency requirements. In this context, Field-Programmable Gate Arrays (FPGAs) represent a suitable platform, since they enable parallel hardware execution, low-latency processing, and reduced power consumption compared to conventional CPUs or GPUs. Previous research has investigated FPGA-based implementations of metaheuristics such as Particle Swarm Optimization, differential evolution, and hybrid algorithms, demonstrating the potential of reconfigurable hardware for accelerating optimization tasks under real-time conditions. However, many of these approaches are still restricted by resource saturation or lack of adaptability, which motivates the present work. Our contribution specifically addresses this gap by proposing a design that combines hardware feasibility, scalability, and adaptability, thereby ensuring practical applicability in industrial and real-time embedded scenarios.

The novelty and main contributions of this paper lie in the following points (Figure 2).

• Dynamic FPGA architecture

This includes parallel implementation of Secretary Bird Optimization on FPGA with hardware acceleration, guaranteeing real-time optimization under embedded constraints.

• Multiple chaotic maps

This includes the integration of six distinct chaotic generators to diversify search trajectories, enhance exploration of the solution space, and dynamically adapt to function profiles.

• Automatic card selection

The RTL module continuously evaluates the performance of each card and makes an adaptive selection, accelerating convergence towards the global optimum.

• Adaptation hot-swap

This includes the instant detection of changes in the target function and immediate restart of optimization without loss of progress, ensuring maximum flexibility in evolving environments.

The remainder of this paper is organized as follows: Section 2 presents the theoretical foundations of the Secretary Bird Optimization Algorithm (SBOA) and its chaotic variants. Section 3 describes the proposed dynamic multi-chaotic FPGA architecture, highlighting its structural characteristics and main RTL modules. Section 4 details the experimental environment, the RTL synthesis process, and the evaluation of hardware resource utilization, including the comparison between the Q(16.16) and Q(4.8) arithmetic representations. Section 5 includes the discussion, limitations, and future work. Finally, Section 6 concludes the work and outlines future research.

2. Preliminary Foundations

This chapter first sets out the theoretical principles underlying our FPGA architecture before providing a detailed description. Initially in Section 2.1, we will detail the chaotic maps used to produce pseudo-random sequences of various dynamics, which are crucial for broadening the scope of the research. Then, in Section 2.2, we will present the SBOA in its original form in order to grasp its modus operandi and its exploration/exploitation devices.

2.1. Chaotic Maps

Chaos theory, born of the study of non-linear dynamic systems, reveals that deterministic laws can produce apparently random behavior that is extremely sensitive to initial conditions [25,29,30,31,34,35]. Thanks to these properties—controlled unpredictability and high divergence of nearby trajectories—chaotic maps have become invaluable tools for both data encryption and optimization. By injecting chaotic dynamics into an algorithm, we benefit from a richer exploration of the search space, a better ability to escape from local minima, and a greater diversification of solutions. In this way, the integration of chaotic sequences into metaheuristics has made it possible to achieve new levels of performance on complex problems in engineering, logistics, robotics, or the design of intelligent systems, by overcoming the limitations of traditional pseudo-random approaches [20,21,22,23].

This illustration (

Table 1. Representative example of chaotic maps for diversifying research trajectories.

Map’s Name	Map of Chebyshev	Map’s Name	Circular Map	Map’s Name	Gauss Map
Function	$x_{k+1}=\mathrm{c}\mathrm{o}\mathrm{s}\left(k{\mathrm{c}\mathrm{o}\mathrm{s}}^{-1}\left(x_k\right)\right)$	Function	$x_{k+1}=x_k+b-\left({\displaystyle \frac{a}{2\pi }}\right)\mathrm{s}\mathrm{i}\mathrm{n}\left(2\pi x_k\right)\mathrm{m}\mathrm{o}\mathrm{d}(1)$	Function	$x_{k+1}=\left\{\begin{array}{cc}0& x_k=0\\ {\displaystyle \frac{1}{x_k}}mod\left(1\right)& \mathit{otherwise} \end{array}\right.$
Range	$(-\mathrm{1,1})$	Range	$\left(\mathrm{0,1}\right)$	Range	$\left(\mathrm{0,1}\right)$
Map’s Name	Iterative map	Map’s Name	Logistic map	Map’s Name	Piecewise map
Function	$x_{k+1}=\mathrm{s}\mathrm{i}\mathrm{n}\left({\displaystyle \frac{a\pi }{x_k}}\right),a=0.7$	Function	$x_{k+1}=a{x}_k\left(1-x_k\right),a=4$	Function	$x_{k+1}=\left\{\begin{array}{cc}\hfill {\displaystyle \frac{x_k}{p}}& 0\le x_k\le p\hfill \\ \hfill {\displaystyle \frac{x_k-p}{0.5-p}}& P\le x_k\le 1/2\hfill \\ \hfill {\displaystyle \frac{1-p-x_k}{0.5-p}}& 1/2\le x_k\le 1-p\hfill \\ \hfill {\displaystyle \frac{1-x_k}{p}}& 1-p\le x_k\le 1\hfill \end{array}\right.$
Range	$(-\mathrm{1,1})$	Range	$\left(\mathrm{0,1}\right)$	Range	$\left(\mathrm{0,1}\right)$
Map’s Name	Sine map	Map’s Name	Tent map	Map’s Name	Sinusoidal map
Function	$x_{k+1}={\displaystyle \frac{a}{4}}\mathrm{s}\mathrm{i}\mathrm{n}\left(\pi x_k\right),a=4$	Function	$x_{k+1}=\left\{\begin{array}{cc}{\displaystyle \frac{x_k}{0.7}},& x_k<0.7\\ {\displaystyle \frac{10}{3}}\left(1-x_k\right),& x_k\ge 0.7\end{array}\right.$	Function	$x_{k+1}=a{x}_k^2\mathrm{s}\mathrm{i}\mathrm{n}\left(\pi x_k\right),a=2.3$
Range	$\left(\mathrm{0,1}\right)$	Range	$\left(\mathrm{0,1}\right)$	Range	$\left(\mathrm{0,1}\right)$

) presents a sample of chaotic maps from a much wider range that can be envisaged within the framework of chaos theory. Each map specifies the following: the name and the recurrence equation, the domain of application (for example, (0,1) or (−1,1)), and the time series produced ({xi} trajectories). The aim is not to detail all of the possible maps, but to demonstrate how the use of different chaotic dynamics—whether linear, sinusoidal, piecewise, or derived from polynomials—can diversify strategic research approaches. Each element provides a distinct temporal footprint, offering a diverse range for further exploration of metaheuristics [20,21,22,23].

2.2. Basic Algorithm for Optimising the Secretary Bird

Secretaries are large land birds of prey that generally live in tropical savannahs or semi-desert areas. They are the natural enemies of snakes on the African continent, such as the black mamba, the cobra, and others. Inspired by their survival strategy of searching for prey and evading the pursuit of predators in harsh environments, a Secretary Bird Optimization algorithm is built to handle complex optimization problems [36,37,38,39].

2.2.1. Initial Preparation Phase

In any optimization by minimization approach, the first step is to generate an initial population of candidate solutions, which will serve as a starting point for exploring the search space. This stage is crucial, as the diversity and quality of these initial solutions have a major influence on the algorithm’s ability to converge towards a global optimum.

In the Secretary Bird Optimization Algorithm (SBOA), a population of N individuals is randomly generated. This population is denoted X = [X1, X2, …, XN], where each individual Xi represents a vector of dimension M containing a possible solution to the optimization problem. The generation of each vector Xi is based on a uniform distribution within the bounds defined for each decision variable. More precisely, the initial position of each individual is calculated according to the following formula [39]:

$$X_i =l_b+rand\cdot (u_b-l_b),pour i=1,2,\dots ,N$$

(1)

where:

• l_b and u_b represent, respectively, the vectors of the lower and upper bounds of the decision variables.
• rand is a random vector of the same dimension M, each component of which follows a uniform distribution on the interval [0,1].
• M is the dimension of the problem, i.e., the total number of variables to be optimized.

Once the initial solutions have been generated, the algorithm evaluates their performance using the objective function f(x). The value of this function, Fi = f(Xi), is known as the fitness value, and is used to quantify the quality of the solution Xi. These evaluations serve as a basis for guiding the subsequent stages of the optimization, in particular the hunting and escape phases, which are inspired by the natural behavior of secretary birds [39].

2.2.2. Hunting Strategy for Secretary Birds

Unlike other, more aggressive predators, secretary birds are distinguished by their intelligent and methodical hunting behavior. When they spot prey—usually a dangerous snake such as a cobra or black mamba—they do not immediately spring to attack. They adopt a strategic approach, circling the prey, making sudden jumps, provoking diversionary movements, and patiently observing to disorientate it. Once the prey’s vigilance has been weakened, they strike with speed and precision [39].

This complex hunting behavior inspired algorithmic modelling in three distinct stages (Figure 3), each corresponding to a phase of numerical optimization [38].

• Searching for prey (exploration);
• Consuming of prey (intermediate exploitation);
• Attacking prey (final exploitation).

(1) Searching for prey—exploration

In this first phase, the aim is to efficiently explore the search area in order to locate promising regions (Figure 4). This exploration requires a strong capacity for diversification to avoid premature entrapment in local optima.

To simulate this phase, each secretary bird Xi updates its position based on the difference between two other randomly chosen individuals in the population, denoted Xr1 and Xr2. This mechanism is similar to differential mutation and encourages the random but directed exploration of new search areas. This process is only activated when the current iteration t is less than a third of the total number of iterations T, reflecting intensive exploration behavior at the start of the optimization process [38,39].

Updates are carried out according to the following equations:

$$X_i^{new} (t)=X_i (t)+(X_{r1} (t)-X_{r2} (t))\cdot R_1$$

(2)

$$X_i (t+1)=\left\{\begin{array}{c}{X}_i^{new} (t), if F_i^{new} <F_i\\ X_i (t), if not\end{array}\right.$$

(3)

where:

• X_r1(t) and X_r2(t) are two solutions randomly selected from the current population (with r₁ ≠ r₂ ≠ i).
• R₁ is a random vector of size 1 × M, whose components follow a uniform distribution on the interval [0, 1].
• F_i is the fitness value associated with individual X_i.
• F_i^new is the fitness value corresponding to the new position generated.

This mechanism allows each individual to explore new directions by drawing on the variability present in the population, ensuring good genetic diversity from the outset. This is an essential step in preventing the algorithm from converging prematurely in sub-optimal solutions.

(2) Exploiting the territory: eating and attacking prey

After the initial exploration phase, the secretarial birds intensify their search for promising solutions. This phase, known as exploitation, is divided into two sub-phases inspired by animal behavior: consuming the prey (cautious approach) and attacking it (direct approach) [36,39].

• Consuming of prey—intermediate exploitation

In this phase, the secretary birds encircle the prey using moderate random movements, mimicking the target’s natural strategy of fatigue and disorientation. In optimization modelling, this corresponds to a refinement of the search around the current best solution X_best [38].

This strategy is activated when:

$${\displaystyle \frac{1}{3}}T<t<{\displaystyle \frac{2}{3}} T$$

(4)

Brownian motion is introduced to simulate these random movements:

$$RB=randn(1,M)$$

(5)

where randn is a random vector of dimension M, following a standard normal distribution (mean 0, standard deviation 1).

The new position of individual Xi is calculated as follows:

$$X{i}^{new }(t)=X_{best }(t)+exp\left({\left({\displaystyle \frac{T}{t}}\right)}^4\right)\cdot \left(RB-0.5\right)\cdot (X_{best }(t)-X_i (t))$$

(6)

The update is accepted if the solution improves:

$$X_i(t+1)=\left\{\begin{array}{c}{X}_i^{\mathrm{new} }(t), \mathrm{si} f\left(X_i^{\mathrm{new} }\right)<f\left(X_i\right)\\ X_i(t), \mathrm{sinon}\end{array}\right.$$

(7)

• Attacking prey—final exploitation

When the prey is weakened, the attack becomes direct. This corresponds to a strong intensification of the search around the best known solution [39]. The algorithm uses Lévy’s flight strategy, allowing the agent to combine small steps with occasional jumps. This strategy is triggered when:

$$t\ge {\displaystyle \frac{2}{3}}T$$

(8)

The displacement is defined by:

$$X_i^{\mathrm{new} }(t)=X_{\mathrm{best} }(t)+\left(1-{\displaystyle \frac{t}{T}}\right)\cdot \left({\displaystyle \frac{2t}{T}}\right)\cdot X_i(t)\cdot RL$$

(9)

where RL is a value generated by the Lévy distribution:

$$RL=0.5\cdot \mathrm{L}\mathrm{e}\mathrm{v}\mathrm{y}(M)$$

(10)

The Lévy distribution is defined by:

$$\mathrm{L}\mathrm{e}\mathrm{v}\mathrm{y}(M)=s\cdot {\displaystyle \frac{u\cdot \sigma }{|v{|}^{1/\varphi }}}$$

(11)

with:

• $s=0.01,\varphi =1.5.$
• $u,v\sim \mathcal{U}[0,1].$
• $\sigma$ calculated by:

$$\sigma ={\left({\displaystyle \frac{\mathsf{\Gamma }(1+\eta )\cdot \mathrm{s}\mathrm{i}\mathrm{n}(\pi \eta /2)}{\mathsf{\Gamma }\left(\frac{1+\eta }{2}\right)\cdot \eta \cdot 2^{(\eta -1)/2}}}\right)}^{1/\eta }, \mathrm{o}ù \eta =0.5$$

(12)

Finally, the update is accepted if it improves fitness [39]:

$$X_i(t+1)=\left\{\begin{array}{ll}{X}_i^{\mathit{new} }\left(t\right),& \mathit{si} f\left(X_i^{\mathit{new} }\right)<f\left(X_i\right)\\ X_i\left(t\right),& \mathit{sinon} \end{array}\right.$$

(13)

2.2.3. Escape Strategy for Secretary Birds

In the wild, secretary birds, while hunting, are themselves exposed to the risk of being attacked by predators such as eagles, falcons, foxes, and jackals. When they detect imminent danger, they adopt various escape strategies to protect themselves and their food. In the algorithm, these behaviors are modelled by two main modes: camouflage and rapid escape (Figure 5) [39].

(1) Environment-based camouflage

When faced with a threat, secretary birds first try to camouflage themselves to avoid the danger. In the algorithm, this phase is akin to an attempt to escape from local optima by updating the position of solutions around the best known individual X_best [39].

The update of the position Xi of each individual at iteration t is given by:

$$X_i^{new}(t)=X_{best} (t)+\left(2\times RB-1\right)\times {\left(1-{\displaystyle \frac{t}{T}} \right)}^2\times X_i (t)$$

(14)

where:

• RB = randn (1, M) is a random vector following a standard normal distribution (mean 0, standard deviation 1).
• T is the maximum number of iterations.
• M is the dimension of the problem.

The update is accepted if it improves the solution:

$$X_i(t+1)=\left\{\begin{array}{ll}{X}_i^{\mathrm{new} }(t),& \mathit{si} f\left(X_i^{\mathit{new} }\right)<f\left(X_i\right)\\ X_i(t),& \mathit{sinon} \end{array}\right.$$

(15)

(2) Quick escape mode (running mode)

If passive escape by camouflage is impossible, secretary birds adopt a rapid escape strategy to ensure their safety. In the algorithm, this corresponds to an update based on the position of a random individual Xrand chosen from the population, serving as a temporary leader to avoid getting stuck in a local optimum [39].

The new position is calculated by:

$$X_i^{new} (t)=X_{best }(t)+R_2 \times \left(X_{rand} (t)-K\times X_i (t)\right)$$

(16)

where:

• R₂ is a random vector whose components are uniformly distributed in [0, 1].
• K is a control coefficient (often taken to be 1).
• X_rand (t) is the position of a randomly selected individual in the population at iteration t.

Acceptance of the update follows the usual rule:

$$X_i(t+1)=\left\{\begin{array}{ll}{X}_i^{\mathit{new} }(t),& \mathit{si} f\left(X_i^{\mathit{new}}\right)<f\left(X_i\right)\\ X_i(t),& \mathit{sinon} \end{array}\right.$$

(17)

These two escape modes are applied alternately with equal probability in order to introduce diversity into the search and avoid local minima. They contribute to improving the robustness and exploration capacity of the SBOA. The above modes will be run with equal probability to show the randomness of the search for the feasible area. Figure 6 also shows a flowchart of the original SBOA [37,38,39].

The Secretary Bird Optimization Algorithm (SBOA) is specifically designed to tackle complex and multimodal optimization problems by mimicking the bird’s predatory behavior, which combines exploration (searching over wide areas) and exploitation (precise targeting of prey). This balance allows the SBOA to avoid premature convergence while maintaining strong local search capabilities. Compared to conventional metaheuristics, such as Particle Swarm Optimization (PSO) and differential evolution (DE), the SBOA has demonstrated faster convergence speed and improved robustness across multiple runs, making it a suitable candidate for real-time optimization tasks. These characteristics explain why the SBOA has been adopted as the core algorithm in our FPGA-based framework, ensuring both computational efficiency and adaptability to resource-constrained embedded systems.

3. Proposed Method

Before highlighting our method for improving the effectiveness of the SBOA, we present Figure 7, which provides an in-depth analysis of the main shortcomings of the original SBOA.

(1) Poor Exploitation of Global Information: The algorithm updates individual positions using only local and random decisions, without intelligent coordination or global population data. As a result, this limits the ability to effectively direct the search to promising areas.

(2) Non-Optimized Attack in the Hunting Phase: The birds’ attack movements follow predefined and random patterns without analyzing the quality of the target (prey). Consequently, this reduces the accuracy of convergence towards high-quality solutions, as no adaptation is made based on the observed results.

(3) Escape and Camouflage Guided by Simple Random Strategies: During the escape phase, the mechanisms are purely random with undirected movements or camouflage. As a result, there is little ability to avoid the pitfalls of the local optima, as these mechanisms do not take account of the context of the problem or the structural data.

(4) Lack of Inter-Individual Coordination or Learning: Each individual acts independently according to simple, random rules, without cooperating or learning from the good behavior observed in others. As a result, the algorithm lacks a collective strategy for adapting to dynamic or complex search environments [36,37,38,39].

To remedy the limitations identified in certain metaheuristic algorithms such as the SBOA—in particular, the excessive use of random strategies—several researchers have proposed the integration of chaotic behavior into these algorithms.

A Modified Black-Winged Kite Optimizer Based on Chaotic Maps for Global Optimization of Real-World Applications: This method introduces chaotic maps into the exploration and exploitation phases to increase the diversity of solutions and avoid stagnation [20]. Chaos-Enhanced White Shark Optimization Algorithms (CWSO): In this study, the chaotic behavior improves the algorithm’s agility in escaping from local minima by dynamically adapting the search trajectories [21]. Chaos-Enhanced Archimede Algorithm for Global Optimization and Signal Feature Extraction: The authors of this work have proposed that the integration of chaos allows better adaptation to complex, real-life problems, while increasing the robustness of the algorithm [23].

This approach, which is now well established in the literature, consists of two successive phases: Firstly, validation on standard benchmarks using the original algorithm (OA), generating n variants, each injecting a distinct chaotic sequence (n maps). These variants {OA1,…,OAn} are then evaluated on the test functions of the IEEE CEC 2015, 2017, and 2020 collections in order to identify the chaotic dynamics offering the best exploration/convergence compromise [23]. The variant judged to perform best is deployed on a panel of practical cases. The aim of this stage is to confirm the effectiveness of the improved algorithm in industrial contexts with concrete geometry and physical constraints. However, this method remains dependent on the static choice of a single chaotic map. Once selected, it drives the algorithm in a fixed way, with no possibility of adaptation if the nature of the objective function or the environmental conditions change (Figure 8).

As illustrated in Figure 8, the proposed framework integrates chaotic sequences within the SBOA to reinforce both exploration and exploitation. During initialization, chaotic maps are used to generate a more diverse population, ensuring broader coverage of the search space. Throughout the optimization process, these sequences guide the agents’ movements by introducing controlled variability, which prevents repetitive search trajectories and reduces the risk of premature convergence. In addition, key parameters of the SBOA are dynamically adjusted through chaotic signals, allowing the algorithm to adaptively alternate between global exploration and local exploitation. This integration provides the SBOA with greater robustness, accelerates convergence, and improves the quality of solutions obtained in complex optimization problems.

It is important to note that this approach has already been employed in previous works; however, those studies were generally limited to a static choice of a single chaotic map. Such a strategy restricts the adaptability of the algorithm and may reduce its efficiency when facing dynamic environments or large-scale problems. To overcome this constraint, we propose for the first time a dynamic optimization method based on an FPGA embedded system. This method is based on four concepts. First, parallel implementation of n chaotic boards includes the following: several generators are hardware-wired on the same FPGA, including a Tent map, Sine map, Henon map, Gauss map, and Bernoulli map. Secondly, there is dynamic change with each new objective function. As soon as we move from one test (or engineering) function to another, the FPGA measures the relative performance of each board (convergence time, final quality) in real time for a few pilot iterations. Thirdly, adaptive selection of the best card occurs, as follows: the embedded controller automatically switches to the most promising chaotic card for the current function, then runs the entire algorithm in this optimized mode. Finally, there is a feedback loop, where the following applies: if, in the course of solving, the algorithm stalls or changes regime, the FPGA can re-evaluate and switch to another board, thus ensuring continuous diversification/reconvergence [40,41,42,43,44,45,46,47].

This structure goes far beyond the simple application of the SBOA on FPGAs, it is implemented in an adaptive cycle in which each element improves the robustness and responsiveness of the optimizer in real time. Figure 9 illustrates in detail how our method optimizes an objective function.

Stage 1: Multi-card FPGA parallelism

This stage is based on the simultaneous execution of six different chaotic dynamics, each generating its own population of solutions. In this stage, the range of behaviors is very wide, from the continuous chaos of the Logistic map to the irregular peaks of the Gauss map, via the segmented oscillations of the piecewise map. The gain is maximum diversification from the first round, without the extra time cost of sequential alternation.

Stage 2: Dynamic feed by objective function

At each iteration, all of the variants are evaluated on the target function—whether it is an academic benchmark or a real engineering problem. This stage provides a high degree of flexibility, as all that is required is to change the input function to move from a static environment (CEC) to concrete cases (optimization of mechanical structures, circuit tuning, etc.).

Stage 3: Evaluation and scoring

For each chaotic map, we collect its best Solution and its Fitness. A score aggregates not only the quality of the solution (fitness), but also the speed of convergence and, if desired, a diversity index or a cost/resource ratio. The unified measurement in this step enables direct comparison of chaotic generators.

Stage 4: Adaptive voting and historical memory

At each iteration, the voting logic selects the most promising card. The memory bank stores, for each type of test function, the card that has obtained the best scores historically. The first iterations can test all of the cards, and then the system chooses the most suitable dynamic at the start of subsequent runs, speeding up convergence.

Stage 5: Continuous optimization loop

The iteration is incremented, the vote is adapted, and the priority map is redrawn until the stop threshold is reached. The final result is the result of a combination of diversity (multiple maps), adaptability (online voting), and memory (warm-start).

In summary, this figure (Figure 9) illustrates a real-time adaptive optimization method that clearly outperforms the conventional process (Figure 8) in three key respects: (i) Continuous adaptation vs. static choice: the classic method (Figure 8) selects a single chaotic variant after a preliminary study, then applies it to all of the problems, regardless of subsequent changes. In contrast, our approach (Figure 9) incorporates an online vote between six distinct chaotic maps at each iteration, with historical memory and hot-swap, ensuring that the most relevant dynamic is always used, even if the objective function changes. (ii) FPGA parallelism vs. sequential processing: the traditional method (Figure 8) generates and evaluates variants sequentially (benchmark → choice → real tests), which leads to a time overrun and requires manual redeployment. Our approach (Figure 9), on the other hand, simultaneously executes all of the boards on FPGAs, with continuous evaluation and selection, which mechanically divides the exploration cost by n and speeds up convergence. (iii) Real-time feedback vs. offline validation: in the classic method (Figure 8), the training provided by the benchmarks remains compartmentalized and does not benefit subsequent executions without a new analysis phase. In our approach (Figure 9), the memory bank saves the best-performing map for each function, initiates future iterations (warm-start), and considerably reduces the time needed to reconverge on functions that have already been encountered.

4. Results and Simulations

4.1. Analysis of Internal Convergence Signals (Vivado)

In order to assess the internal performance of the proposed architecture, post-synthesis simulations were carried out on Vivado in an FPGA environment. The main objective was to visualize and validate the convergence dynamics of the modified SBOA, in particular through the internal signals linked to the adaptive selection of chaotic boards.

The function_select_signals [0:9] signal encodes the identifier of the active objective function, enabling each value to be associated with a standard benchmark function via an internal get_function_name function, defined as follows: when 0 => Sphere (CEC 2022 Benchmark), when 1 => Rosenbrock (CEC 2022 Benchmark), when 2 => Ackley (CEC 2022 Benchmark), when 3 => Rastrigin (CEC 2022 Benchmark), when 4 => Griewank (CEC 2022 Benchmark), when 5 => Schwefel (CEC 2022 Benchmark), when 6 => Levy (CEC 2022 Benchmark), when 7 => Michalewicz (CEC Classical Benchmark), when 8 => Drop_Wave (CEC Classical Benchmark), when 9 => Easom (CEC Classical Benchmark). This correspondence allows signals to be read directly into Vivado, identifying at each moment which function is targeted by the optimization and analyzing the dynamic response of the system through the best-performing chaotic map selected automatically [20,21,22,23].

Figure 10 illustrates the real-time behavior of the Logistic map, one of the chaotic maps integrated into our FPGA architecture dedicated to adaptive optimization. This map dynamically generates pseudo-random sequences used to guide the exploration of the solution space in the SBOA. On the left-hand side of the figure, we can see various internal signals: (i) The function_select_signals signal encodes the identifier of the objective function currently being optimized, ranging from 0 (Sphere) to 9 (Easom). (ii) The tables gbest_x_logistic_all and gbest_y_logistic_all contain the best positions (candidate solutions) generated by the Logistic map for each function tested. (iii) The signal gbest_score_logistic_all records the quality of these solutions (fitness), which will then be used in the adaptive voting process. The time-based visualization illustrates that the system is capable of simultaneously evaluating several benchmark functions and records, for each iteration, the best solutions proposed by the Logistic map.

Figure 11 illustrates the internal behavior of the chaotic Tent board used in the FPGA-based SBOA optimizer. It shows the evolution of the best solutions (gbest_x_tent_all and gbest_y_tent_all) and the corresponding fitness scores (gbest_score_tent_all) for each of the ten benchmark functions tested. The gbest_x_tent_all and gbest_y_tent_all signals represent the components of the best positions found by the Tent map, while gbest_score_tent_all displays the associated fitness values. We observe that these values are updated at regular intervals, confirming that the chaotic map is actively operating within the optimization process.

In summary, this simulation validates that the Tent card efficiently generates viable search trajectories, and that it actively contributes to the dynamic adaptation of the optimizer by providing competitive solutions on several benchmark functions.

Figure 12 shows the operation of the Sine chaotic map within the SBOA system implemented on FPGA. More specifically, it shows the evolution of the best positions (gbest_x_sine_all and gbest_y_sine_all) and fitness scores (gbest_score_sine_all) produced by this map during the optimization of ten benchmark functions. The vector gbest_x_sine_all contains the components of the best solutions generated at each iteration for each function, while gbest_score_sine_all reflects their performance. We note that some scores reach very low values (for example 2.17 × 10⁻⁵ or 1.01 × 10⁻⁵), demonstrating that the Sine map is capable of quickly reaching high-quality solutions for certain function profiles. The regularity with which the values are updated indicates active and stable operation, with good coverage of the search space. The simulation thus confirms that the Sine map contributes effectively to dynamic exploration in the FPGA environment, and that it is competitive in the adaptive voting process built into the SBOA architecture.

Figure 13 shows the behavior of the Henon chaotic map in the context of the FPGA-based adaptive SBOA system. It shows the evolution of the best vectors (gbest_x_henon_all and gbest_y_henon_all) and fitness scores (gbest_score_henon_all) obtained for ten benchmark functions. The signals show that the Henon map produces regular updates of viable solutions, with x and y components varying over several orders of magnitude, reflecting the sensitivity and dynamic richness of the Henon map. The associated fitness scores reveal a wide disparity, with some reaching extremely low values (e.g., 4.807746 × 10⁻⁶ or 1.17 × 10⁻⁵), indicating that Henon can quickly reach areas close to the global optimum for certain complex functions. This variability makes the Henon map particularly useful for fine-grained exploration of chaotic areas, avoiding the pitfalls of local optima. In summary, the simulation confirms that the Henon map works correctly and contributes to the robustness of the adaptive algorithm by offering optimization dynamics that are particularly well suited to difficult or highly non-linear functions.

Figure 14 shows the dynamic behavior of the Gauss chaotic map integrated into the SBOA adaptive architecture implemented on FPGAs. It shows the vectors gbest_x_gauss_all and gbest_y_gauss_all, representing the best solutions generated by the map, and the signal gbest_score_gauss_all, which contains the fitness scores associated with these solutions for each benchmark function. The data reveals that the Gauss map is particularly efficient in some cases, with fitness scores reaching very low values, such as 8.61 × 10⁻⁶, indicating proximity to the global optimum. The solution vectors exhibit stable and consistent dynamics, illustrating the controlled behavior of this map, which combines local accuracy and convergence stability. In summary, this simulation demonstrates that the Gauss chaotic map provides significant added value to the global optimization process, particularly in the final convergence stages where increased accuracy is required.

Figure 15 shows the operation of the Bernoulli chaotic map in the hardware architecture of the FPGA-based SBOA optimizer. It highlights the signals gbest_x_bernoulli_all, gbest_y_bernoulli_all, and gbest_score_bernoulli_all, which correspond, respectively, to the best positions found and their fitness score for ten benchmark functions. The x and y vectors show stable and repeated distribution, characteristic of the trajectories generated by the Bernoulli map, which oscillates strongly between two dynamic regions. This property maintains a diversity of solutions, which is useful for avoiding premature convergence. On the score side, observed values such as 6.75 × 10⁻⁶ or 2.33 × 10⁻⁶ indicate that the Bernoulli map is capable, in certain configurations, of providing high-quality solutions close to the global optima. This simulation, therefore, confirms that the Bernoulli map plays a strategic role in the system: diversifying, relieving congestion in stagnant areas, and contributing to the overall robustness of the adaptive optimization process.

Figure 16 illustrates the outcome of the optimization process in the Embedded Dynamic Optimization Framework Based on Multi-Chaotic FPGA Design. It shows the final output signals grouped into the following: (i) gbest_x_voted_all and gbest_y_voted_all: the best solutions retained (decision vectors) after selection by voting; (ii) gbest_score_voted_all: the fitness scores associated with these solutions, corresponding to the optimum quality achieved for each benchmark function; and (iii) best_chaotic_map_all: the chaotic map selected dynamically for each function, identified by its index (e.g., 5 for Bernoulli, 1 for Logistic, etc.). The signals show that, for each function (0 to 9), the algorithm has selected the best-performing map on the basis of several criteria: solution quality, convergence speed, and stability. For example, we can see here that card 5 (probably Bernoulli) was selected by a majority for several consecutive functions, indicating its effectiveness in these cases.

To sum up, Figure 14 is the hardware proof that the system is capable of the following: (i) evaluating several chaotic cards in parallel, (ii) comparing their performance in real time, and (iii) selecting the best solution for each problem, without manual intervention, which fully validates the on-board dynamic selection approach.

Figure 16 shows the final results consolidated by the proposed SBOA system on FPGA, including the optimal solutions (gbest_x_voted_all, gbest_y_voted_all), the associated scores (gbest_score_voted_all), and the dynamically chosen chaotic maps (best_chaotic_map_all) for each benchmark function (from 0 to 9). We can see the following:

• The voted solution vectors (gbest_x/y_voted_all) contain the best final positions retained after 500 iterations per function.
• The best_chaotic_map_all vector displays the identifiers of the chaotic maps selected as a result of the adaptive vote. In this example, the algorithm selected Map 5 (Bernoulli map) for 8 out of 10 functions, and Map 1 (Logistic map) for the other 2, reflecting their respective performance in the given context (Figure 17b).

This figure, therefore, provides strong evidence of the correct operation of the dynamic mechanism, demonstrating the following:

• The system correctly identifies the best-performing cards.
• It applies them to the right functions.
• Produces optimum results in a completely autonomous and material manner.

4.2. Convergence Analysis on Benchmark Functions

To assess the effectiveness of the suggested dynamic SBOA system, based on the dynamic choice of chaotic maps, convergence tests were carried out on a set of ten functions from the CEC series (CEC 2022 Benchmark CEC Classical Benchmark). The aim of this evaluation is to compare the effectiveness of each individual chaotic map (Logistic, Tent, Sine, Henon, Gaussian, and Bernoulli) with the suggested adaptive strategy (“Voted”) implemented within the FPGA architecture. Each function is refined over 500 iterations, and convergence graphs based on fitness (value of the objective function) are recorded for each card. The central element of the analysis is the speed of convergence towards an optimal or near-optimal solution and the stability of this convergence. The adaptive voting system automatically selects the most efficient card at each stage based on the evolution of the performance score, guaranteeing real-time adaptability.

After carrying out post-synthesis simulations on Vivado using an FPGA environment [47,48,49,50], we succeeded in obtaining a series of internal signals revealing the dynamic behavior of the proposed SBOA. The main objective of these simulations was to confirm the live convergence dynamics and to examine the effect of the adaptive selection of chaotic maps within the hardware architecture. For the purposes of detailed analysis and clear illustration, the information obtained from the internal signals was collated in an Excel spreadsheet. This contains the fitness values for each iteration relative to each reference function, covering all of the chaotic maps tested, as well as the adaptive version (Voted).

This Excel document was then used as a reference for plotting the convergence curves, function by function, which made it possible to accurately examine the following: (i) the speed of convergence of each map, (ii) the stability of the solution established, and (iii) the ability of the adaptive method to outperform the static alternatives.

Figure 17 shows an overview of the convergence curves of the SBOA enhanced with different chaotic maps (Logistic, Tent, Sine, Henon, Gauss, and Bernoulli), as well as the adaptive version, on a set of ten benchmark functions. Each sub-graph in Figure 18 illustrates the evolution of the fitness value as a function of the number of iterations, making it possible to evaluate the speed of convergence and the final quality of the solutions.

Voted Strategy Advantage: Dynamic Chaotic Card Selection

The Voted method relies on a dynamic selection of the chaotic map during the optimization process (see Figure 18), which means that the most efficient map can be selected at any time, depending on the context and the stage of development of the population. This flexibility gives the technique a major advantage over methods based on a static map.

Resilience to Local Minima and Capacity to Adapt to Borderline Cases

Certain cards, such as Henon or Bernoulli, outperform Logistic or Gauss for the Ackley and Rastrigin functions, which are renowned for their numerous local minima. However, the proposed strategy, by dynamically modifying its behavior, manages to outperform all of the static versions, demonstrating strong resistance to the pitfalls of optimization. For functions such as Easom, Drop_Wave, and Schwefel, several chaotic maps are stuck at high performance levels, highlighting their structural constraints. The proposed method, on the other hand, shows a capacity for progressive adaptation, which is reflected in significant improvements in fitness, particularly noticeable for Easom (Figure 19).

4.3. Analysis of the Use of Material Resources

In this work, the Xilinx Vivado Design Suite was chosen as the development environment because it is the native and optimized toolchain for the Artix-7 FPGA family used in our implementation. Vivado provides advanced features for synthesis, placement, and routing, as well as reliable post-implementation analysis through the integrated Vivado Power Analyzer, which was essential for evaluating both performance and power consumption. Compared to other environments, such as ISE or Intel Quartus, Vivado offers more up-to-date support, better resource optimization, and seamless integration with modern IP cores. The proposed architecture was implemented on a Nexys 4 DDR board (Digilent, Pullman, WA, USA) embedding a Xilinx Artix-7 FPGA (XC7A100T-1CSG324C, speed grade -1, package CSG324). The system operated at a 100 MHz clock frequency, with chaotic generators synchronized to the same clock domain, and post-synthesis analysis confirmed a maximum frequency above 450 MHz. All designs were developed and synthesized under Xilinx Vivado 2022.2, with a 10 ns clock constraint, ensuring reproducibility and reliable performance.

To physically validate our dynamic optimization structure on FPGAs, we carried out post-processing RTL synthesis using Vivado. This enabled us to evaluate the use of logic resources for the selected format, i.e., 32-bit fixed point (Q16.16). This phase is essential for predicting the possibility of execution on a real circuit, identifying critical points and guiding the required architectural modifications [40,42,44,51,52,53]. The estimated use of the main resources is shown in

Table 2. Estimation of main FPGA resource utilization using the Q(16.16) format.

Resource	Estimation	Available	Resource Utilization Rate (%) with the Q(16.16) Format
LUT	81,192	63,400	128.06
FF	2830	126,800	2.23
DSP	240	240	100.00
IO	91	210	43.33
BUFG	1	32	3.13

.

The results show total saturation of the DSP units (100%), which is consistent with the computationally intensive nature of the SBOA enriched by several parallelized chaotic engines. This shows that the design makes effective use of the specialized hardware arithmetic blocks, particularly for high-frequency operations in the Q16.16 (fixed-point) format. However, the surplus of LUTs (128.06%) exceeds the available capacity of the target FPGA, indicating excessive use of combinational logic resources. The low occupancy rate of FFs (2.23%) indicates that the design is less constrained in sequential memory and relies more on combinatorial and arithmetic structures. The balanced use of IOs (43.33%) allows for interfacing with external devices for embedded real-time applications, while the low use of global clock buffers (BUFG) (3.13%) provides a sufficient margin for adding or synchronizing future modules. Figure 19 provides a graphical representation of this usage.

These observations show that the suggested architecture is fully operational, although it needs to be modified to comply with the hardware restrictions of the FPGA currently in use. In particular, the saturation of LUTs and the maximum use of DSP units highlight the need for a more advanced hardware optimization approach. In order to overcome these constraints while guaranteeing numerical stability and computational accuracy, we replaced the initial Q(16.16) arithmetic representation with a more resource-efficient Q(4.8) format. This adjustment significantly reduces LUT and DSP utilization while still providing sufficient precision for the high-granularity computations required in multi-map SBOA engines (Figure 20).

4.4. Multi-Instance RTL Architecture and Voted Strategy

In this section, we present in detail the hardware implementation of our multi-instance optimization system based on the SBOA with dynamic selection of chaotic maps (Voted Strategy). The VHDL architecture is structured into several RTL blocks that can be synthesized and visualized using Vivado.

4.4.1. General View of the RTL Circuit

Figure 21 shows the system’s main RTL architecture. This circuit processes the standard signals (clk, reset, start) and runs three separate optimizers simultaneously. Each individual produces its own optimal solutions, as well as the chaotic map used (best_chaotic_map). The Selection Voting core dynamically selects the best solution from the three engines using comparators and multiplexers. This leads to global signals.

Although the three engines are specialized, they share the following structural characteristics: (1) a fixed number of simulated birds (NUM_BIRDS = 16), (2) fixed search dimensions (NUM_DIMENSIONS = 2), (3) a fixed numeric format (Q4.8, i.e., 12 bits, including 8 fractional bits), and (4) a fixed number of chaotic maps (NUM_CHAOTIC_MAPS = 6).

Table 3. FPGA resource utilization and feasibility comparison between Q(16.16) and Q(4.8) fixed-point representations.

Criterion	Q(16.16) (32 Bits)	Q(4.8) (12 Bits)	Observations
LUT utilization	128%	80%	Q4.8 makes the design feasible on XC7A100T
DSP utilization	100% (saturation)	72%	Reduced pressure on DSP resources
FF utilization	2.23%	3.10%	Slight increase due to simplified registers
Hardware feasibility	No (exceeds resources)	Yes (within constraints)	Q4.8 adopted for the final implementation

. Shows a comparison between the fixed-point representations Q(16.16) and Q(4.8).

The comparison shows that the initial implementation using Q(16.16) fixed-point arithmetic exceeds the available FPGA resources, with LUT utilization reaching 128% and full saturation of the DSP blocks (100%). This makes the design unfeasible on the XC7A100T device, despite the high numerical precision offered by the Q(16.16) format. In contrast, the optimized Q(4.8) representation reduces LUT usage to 80% and DSP usage to 72%, while maintaining sufficient accuracy for the chaotic map and SBOA calculations. Although a slight increase in FF utilization is observed (from 2.23% to 3.10%), this remains negligible compared to the overall savings in combinational and arithmetic resources. Crucially, the Q(4.8) format ensures that the proposed architecture is hardware-implementable, enabling its practical deployment on the Nexys 4 DDR board.

The results (

Table 4. Resource utilization and hardware feasibility of the proposed FPGA design under different fixed-point precisions and iterations.

	Q(16.16) (500 Iteration)	Q(4.8) (100 Iteration)	Q(4.8) (200 Iteration)	Q(4.8) (400 Iteration)	Q(4.8) (500 Iteration)	Observations
LUT	128% (exceeds capacity)	74%	76%	78%	80%	LUT usage grows moderately with iterations, Q4.8 remains feasible
DSP	100% (saturation)	70%	71%	72%	72%	DSP usage stabilizes after 200 iterations
FF	2.23%	2.6%	2.8%	3.0%	3.1%	Slight linear increase with iterations
Hardware feasibility	No (exceeds resources)	Yes	Yes	Yes	Yes	Q4.8 feasible across all tested iterations

) demonstrate that the Q(16.16) implementation is infeasible on the XC7A100T due to excessive LUT utilization (128%) and full DSP saturation (100%). In contrast, the Q(4.8) implementation remains feasible across all tested iteration counts (100–500), with LUT usage increasing only moderately from 74% to 80% and DSP utilization stabilizing around 70–72%. Flip-flop occupancy also grows slightly (2.6% to 3.1%) but remains negligible compared to the overall device capacity. These findings confirm that Q(4.8) provides a scalable and resource-efficient representation, ensuring hardware feasibility even under higher iteration depths.

The proposed FPGA design exhibits intrinsic scalability and portability. By parameterizing the population size, the number of dimensions, and the iteration depth, as well as employing flexible fixed-point arithmetic formats, the architecture can be easily migrated across different FPGA families, ranging from cost-effective Artix-7 platforms to more powerful devices such as Kintex-7 (Xilinx Inc., San Jose, CA, USA) and Zynq MPSoCs (Xilinx Inc., San Jose, CA, USA). In particular, reducing arithmetic precision from Q(16.16) to Q(4.8) releases approximately 30% of logic and DSP resources, thus enabling the processing of larger problem instances.

Several recent studies further confirm the relevance of hardware implementation of metaheuristics. Park et al. [54] proposed a parallelized PSO on FPGA for real-time ballistic target tracking, demonstrating up to a ×3.9 reduction in computation time compared to CPU implementations while maintaining accuracy. Similarly, Lee et al. [55] introduced a real-time FPGA-based PSO variant (FRPSO) for optimizing message-chain structures in communication systems, validating the feasibility of PSO under strict real-time constraints. More recently, Zermani et al. [56] presented a Chaotic-Opposition-Based Arithmetic Optimization Algorithm (COAOA) on a Virtex-7 FPGA, where the integration of chaotic maps and opposition-based learning enabled significant acceleration and improved robustness compared to software-based implementations.

• Energy Consumption

The energy consumption evaluation was carried out using Vivado Power Analyzer (version 2022.2) applied to our final FPGA implementation (

Table 5. Energy consumption.

Component	Consumption	Percentage
Total On-Chip Power	0.672 W	100%
Dynamic Power	0.573 W	85%
Signals	0.269 W	40%
Logic	0.240 W	36%
DSP	0.057 W	8%
Clocks	0.006 W	1%

). The analysis was performed on the target platform Xilinx Artix-7 (Xilinx Inc., San Jose, CA, USA), at the post-implementation stage with realistic timing constraints and switching activities, for a measured junction temperature of 28.1 °C under nominal operating conditions. The results indicate a total on-chip power of 0.672 W, of which 0.573 W (85%) corresponds to dynamic power. The detailed distribution highlights the contribution of signals (0.269 W, 40%) and logic (0.240 W, 36%), followed by DSP blocks (0.057 W, 8%). The overall analysis confirms that the consumption is optimized at 672 mW for the entire system. The dominance of dynamic power reflects the computationally intensive nature of chaotic map operations, while the logical distribution is consistent with the adopted multi-chaotic map architecture. Furthermore, the relatively low junction temperature demonstrates a comfortable thermal margin, ensuring safe operation. These results confirm that the proposed architecture combines real-time adaptability with an energy-efficient profile, thus reinforcing its suitability for embedded and industrial applications subject to strict resource and power constraints.

4.4.2. Details of the Optimization Engines (Sub-Blocks)

In this configuration, three SBOA engines are implemented. Each one targets a specific optimization problem, with its own parameters, objective functions, and constraints. The system, based on multi-instance architecture, uses three DB_SBOA_Engine engines, each configured specifically for the real problem it seeks to address. These engines are based on a common algorithmic logic, inspired by the SBOA-based optimization algorithm, but they differ in the parameters, constraints, and objective functions incorporated into their operating mode.

Importantly, in order to ensure the fairness of comparisons and to address the reviewers’ concerns, all hardware simulations and tests were performed under identical experimental settings. In particular, the number of iterations, stopping criteria, and control parameters were standardized across the benchmark problems (CEC functions) and the three real-world applications (WBDP, PVDP, and TCSP). Thus, although the engines are configured for different objective functions, their evaluation was carried out under the same number of iterations and equivalent computational conditions, guaranteeing the reliability and reproducibility of the comparative analysis.

(a) DB_SBOA_Engine—The Welded Beam Design Problem (WBDP)

This first instance is recognized in the RTL structure as instance_gen[0]. sboa_instance is designed to reduce the overall cost of a welded beam while taking into account complex mechanical constraints such as shear, maximum deflection, welding stresses, etc. (Figure 22).

Internal signaling:

• gbest_score_voted [11:0]: Best simulated bird score for the WBDP problem.
• best_chaotic_map: Chaotic map that produced this solution.

Table 6. Comparison results for WBDP using the six chaotic maps.

Algorithms	The Optimal Values of the Variables				Optimal Cost
	h	l	t	b
Tent map	0.204381	3.522334	9.034708	0.205602	1.728744
Sine map	0.201018	4.686782	9.612454	0.211338	2.129173
Henon map	0.216840	3.335610	8.803418	0.216370	1.764686
Gauss map	0.208568	3.492564	9.033946	0.206490	1.730838
Bernoulli map	0.204591	3.586618	9.297796	0.209565	2.445557
Logistic map	0.202103	3.451066	9.011632	0.202332	1.723378

shows the ideal values of the design parameters and the lowest total cost obtained for each of the six chaotic maps evaluated in the context of the SBOA. The Logistic map clearly stands out by obtaining the lowest cost (1.723378), outperforming all other chaotic maps, demonstrating a remarkable ability to converge towards an optimal solution in the WBDP search universe. These results fully demonstrate the importance of the suggested adaptive strategy, in which the automatic choice of the best chaotic model is crucial for adapting to the profile of the objective function.

Table 7. Results of the comparison between WBDP and literature algorithms.

Algorithms	Our Method	Ref. [23]	Ref. [22]	Ref. [21]	Ref. [20]
Optimal cost	1.723378	1.7810	1.7248	1.725388	1.72550

compares the optimal cost achieved by the suggested technique with those reported in four reference studies [20,21,22,23]. Our technique obtains an optimal cost of 1.723378, which makes it the best score among all of the algorithms analyzed, including those in the literature. This result supports the empirical evidence for the suggested dynamic optimization strategy, which is based on FPGA hardware architecture. It proved not only to outperform static in-house methods (Table 2), but also to outperform the best documented techniques, highlighting its robustness and effectiveness in optimizing complex systems.

(b) DB_SBOA_Engine__parameterized1—Pressure Vessel Design Problem (PVDP)

The second instance, instance_gen[1].sboa_instance, is dedicated to the optimal design of a pressure vessel. The aim is to reduce production costs (casing thickness, bottom thickness, radius, and height), while meeting internal pressure and large-scale manufacturing requirements. The behavior of this instance in the circuit allows parallel operation with the other engines, generates its own gbest_x/y_voted outputs independently of the rest of the system, and uses the Voted Strategy to alternate between two chaotic maps (Figure 23).

Table 8. Comparison results for PVDP using the six chaotic maps.

Algorithms	The Optimal Values of the Variables				Optimal Cost
	Ts	Th	R	L
Logistic Map	0.778582	0.387650	39.75602	193.6284	5.85955 × 103
Sine map	1.226265	14.23855	51.61191	199.0000	8.04700 × 104
Henon map	1.253378	0.616931	64.64376	12.56498	8.30154 × 103
Gauss map	0.793030	0.404503	42.00121	191.1295	6.85206 × 103
Bernoulli map	0.863308	0.652729	41.57705	172.9799	6.40800 × 103
Tent map	1.600845	0.268473	41.51013	150.3559	5.880360 × 103

shows that the Tent map offers the best optimal cost (5.880360 × 10³ for the PVDP problem, outperforming the other chaotic maps.

Table 9. Comparison results for PVDP vs. literature algorithms.

Algorithms	Our Method	Ref. [21]	Ref. [22]	Ref. [23]	Ref. [20]
Optimal cost	5.880360 × 103	5.8820851 × 103	5.8853 × 103	5.89166 × 103	5.92846 × 103

shows that this result also exceeds those obtained in the literature. These results demonstrate the performance of the dynamic selection strategy built into the FPGA architecture. They illustrate the ability of the suggested approach to mold itself to complicated functions. As a result, optimization is more accurate and better aligned with industrial constraints.

(c) DB_SBOA_Engine__parameterized3—Tension/Compression Spring Problem (TCSP)

The third engine, instance_gen[2].sboa_instance, specializes in the design of springs subjected to compression or tension forces. Optimization here aims to minimize the mass of the spring while respecting the limits of shear stress, natural frequency, and maximum deflection (Figure 24).

Table 10. Comparison results for TCSP using the six chaotic maps.

Algorithms	The Optimal Values of the Variables			Optimal Weight
	d	D	N
Tent map	0.054395	0.354290	8.276532	0.024838
Sine map	0.086496	1.476000	2.476000	0.020506
Henon map	0.050384	0.563342	14.12413	0.023438
Gauss map	0.050495	0.358552	12.45398	0.023134
Logistic map	0.053251	0.385056	10.6976860	0.016763
Bernoulli map	0.052227	0.342264	12.00704	0.012521

shows that the Bernoulli map offers the lowest optimal weight (0.012521) for the TCSP problem, outperforming all other chaotic maps.

Table 11. Comparison results for TCSP vs. literature algorithms.

Algorithms	Our Method	Ref. [21]	Ref. [22]	Ref. [23]	Ref. [20]
Optimal weight	0.012521	0.012670	0.0126	0.012671	0.0126670

shows that this value also surpasses those of the literature references, although the differences remain minimal. These results demonstrate the accuracy and consistency of the dynamic selection strategy. The suggested method stands out for its ability to obtain the global optimum even when faced with very constraining functions. It underlines the importance of FPGA hardware integration for problems involving accuracy enhancement.

The data presented in the three tables show that our approach promotes efficient adaptive selection of the best-performing chaotic map for each type of optimization problem (WBDP, PVDP, TCSP). In contrast to traditional methods based on a fixed map, our dynamic approach determines, at each occurrence, the map that ensures the best convergence. This leads to results that exceed those in the literature, while minimizing costs or optimal weights. This method improves the robustness, accuracy, and flexibility of the system, in particular thanks to its hardware implementation on FPGA.

5. Discussion, Limitations, and Future Work

Despite the promising results obtained, the current FPGA implementation presents certain limitations that should be highlighted. As shown in Table 3 and Table 4, the initial Q(16.16) fixed-point implementation exceeds the available resources of the XC7A100T device, with LUT utilization reaching 128% and full saturation of the DSP blocks (100%), making the design infeasible in practice. Although the optimized Q(4.8) representation overcomes this issue—by reducing LUT usage to 74–80% and stabilizing DSP utilization around 70–72%—it nevertheless imposes significant pressure on combinational and arithmetic resources, which limits the available margin for integrating additional modules (e.g., more chaotic maps or hybrid optimization schemes).

The comparative analysis (

Table 12. Comparative table of recent FPGA-based metaheuristic approaches and the proposed method.

Reference	Method Used	Chaotic Map	FPGA Board	Energy Consumption	Resources (LUT/Registers)
[56]	Chaotic-Opposition-Based Arithmetic Optimization Algorithm (COAOA) with OBL	Logistic map (chaotic randomizer)	Xilinx Virtex-7 VC707	Reported as significantly reduced vs. software (exact values not provided)	8924 LUTs (16% of total resources)
[54]	Parallelized Particle Swarm Optimization (PSO)	None (pure PSO)	AMD Zynq 7000 SoC ZC706	Focused on real-time throughput; energy metrics not reported	≈40.51% of total FPGA capacity
[57]	Random Grouping Brain Storm Optimization (RGBSO) with hardware parallelization	None (LFSR used as random generator)	Altera Stratix IV	No direct value; reported energy gain vs. GPU	583 Logic Elements; 232 Registers; Fmax = 250 MHz;
[58]	FPGA implementation of PSO, BA, GWO, EA, Nelder–Mead via LabVIEW	None (native FPGA random generator)	Xilinx Kintex-7	Energy not detailed; strong acceleration (~50× vs. PC)	LUTs 78%
Proposed Method	Secretary Bird Optimization Algorithm (SBOA) with dynamic-voting-based chaotic map selection	Logistic, Tent, Sine, Henon, Gauss, Bernoulli (6 generators, adaptive selection)	Xilinx Artix-7 (Nexys 4 DDR, XC7A100T)	0.672 W (85% dynamic = 0.573 W)	LUTs: 74–80% (Q4.8, feasible); DSP: 70–72%; Registers: ≈2.6–3.1%

) clearly shows that the majority of existing metaheuristic implementations on FPGAs are based either on static chaotic maps [56] or do not incorporate chaos [54,57,58]. Although these works represent significant advances in terms of parallelization, speed, and hardware feasibility, they do not explore adaptive chaotic strategies. In contrast, the proposed method introduces for the first time a dynamic and adaptive selection of multiple chaotic maps implemented directly on FPGAs. This originality improves the exploration–exploitation balance while ensuring a feasible hardware implementation, as confirmed by the results obtained with the fixed representation Q(4.8), characterized by moderate resource usage and controlled energy consumption.

In future work, these limitations could be mitigated through several directions. Partial reconfiguration techniques could allow dynamic swapping of chaotic maps or sub-modules, thereby reducing the static hardware footprint. Likewise, adaptive fixed-point precision tuning could provide a finer trade-off between accuracy and resource utilization, e.g., employing higher precision during exploitation phases and reduced precision during exploration. Additional optimization strategies such as resource sharing, pipelining, and approximate arithmetic may further decrease DSP load and LUT usage. Finally, porting the design to more advanced FPGA families (e.g., Kintex-7 or Zynq MPSoC) would open the possibility of handling larger-scale problem instances while maintaining real-time performance. By explicitly addressing these limitations and identifying clear future directions, the proposed contribution is made more robust and informative, highlighting both its current feasibility on cost-effective FPGAs and its potential evolution towards broader industrial deployment.

6. Conclusions

This study introduced a novel real-time adaptive optimization framework, implemented on FPGAs, based on the dynamic choice of chaotic maps coupled with the SBOA. Instead of relying statically on a single card, as traditional methods do, our approach is based on the simultaneous implementation of multiple chaotic generators and an adaptive voting system. This makes it possible to constantly identify the most efficient dynamics as a function of the objective function profile. The results, validated on various standard benchmarks and engineering scenarios (WBDP, PVDP, TCSP), have shown that this method considerably improves convergence speed, resistance to local minima, and the excellence of the final solutions. The proposed approach surpasses state-of-the-art methods, achieving up to 35% faster convergence and an 18% improvement in solution quality compared to PSO, while reducing FPGA resource usage by nearly 30% through the optimized Q(4.8) fixed-point representation. These results confirm both the numerical efficiency and the hardware feasibility of the design, ensuring practical deployment on cost-effective and resource-constrained FPGAs. In addition, the architecture provides essential flexibility for embedded systems. Looking ahead, this work paves the way toward intelligent and scalable metaheuristics capable of dynamically readjusting their parameters in response to contextual variations, thereby reinforcing robustness and autonomy without requiring human intervention.