Evaluation of Leakage Currents of Semiconductor Packages Due to High-Voltage Stress Under an Immersion Cooling Environment

Abstract

As data centers expand, immersion cooling systems are gaining attention for thermal management of memory devices. To enable widespread adoption, it is essential to evaluate the impact of coolants on the reliability of memory packages. In this study, high-voltage direct current (DC) stress tests were conducted on commercial dynamic random access memory (DRAM) packages in both single-phase coolant and air environments to analyze heat generation and electrical characteristics. A DC voltage ranging from 2.5 to 3.1 V, which is higher than the regular operating voltage of 1.2 V, was applied. Temperature changes were measured using an infrared camera in the air, and a contact-based thermometer in the coolant. The leakage current was also evaluated through I-V curve analysis. Heat generation and changes in leakage currents were not significant in either environment until the applied voltage stress exceeded approximately twice the standard voltage (2.5–2.8 V). However, the package’s degradation accelerated when the applied voltages exceeded 3.0 V, demonstrating a nonlinear increase in temperature and leakage current.

1. Introduction

In recent years, with the development of cloud systems and AI technology, the demand for computing in data centers has been constantly increasing, and the importance of energy consumption and cooling issues has also been growing [1]. As advances in semiconductor technology increase the power density of processors, traditional air-cooling methods are reaching their limits, and cooling systems account for a significant portion of a data center’s power consumption. Therefore, the introduction of more efficient cooling solutions is imperative [2]. To address this issue, memory device cooling technology utilizing an immersion cooling system is gaining attention. In high-power-density environments, it provides greater cooling efficiency than traditional air-cooling methods, making it a promising alternative for energy savings and operational efficiency [3]. It also offers several advantages, including compact size, easy maintenance, and eco-friendliness [4]. Therefore, memory devices should maintain their integrity even under this cooling environment in order to guarantee the stability of data storage.

Evaluating the impact of the dielectric coolant used in immersion cooling on the reliability of memory packages is essential. However, previous research has primarily focused on thermal management and heat transfer performance. A study on the heat distribution and heat transfer characteristics of a CPU in a single-phase immersion cooling system revealed that increasing the coolant flow rate reduced the temperature stabilization time, while the heat sink material had no effect on cooling performance [5]. In water-cooled immersion cooling experiments involving individual GaN transistors and PCB substrates, water and water ethylene glycol mixtures exhibited higher heat flux than dielectric fluids. However, the devices failed before reaching the critical heat flux (CHF), whereas dielectric fluids successfully reached the CHF and demonstrated greater thermal stability [6]. Meanwhile, there was research on the reliability of package substrate under immersion cooling environments, but it primarily focused on the impact of coolant absorption on mechanical behavior. The absorption of dielectric fluid EC 100 reduced the stiffness of PCBs and mitigated the warpage phenomenon [7], while mineral oil increased the stiffness of PCBs and passive components but had no significant impact on the reliability [8].

I-V curve analysis has been employed to assess internal degradation mechanisms. Typically, semiconductor packages are tested under high-temperature and high-humidity conditions, as well as under voltage stress condition exceeding standard operating levels, to detect defects and ensure their reliability [9,10]. DRAM, a volatile memory, is composed of capacitors and metal–oxide–semiconductor field-effect transistors (MOSFETs). Applying DC voltage stress to MOSFETs accelerates degradation due to electrical and thermal stress, leading to increased leakage current and additional heat generation [11]. If this phenomenon persists, it can cause permanent damage to the semiconductor chip [12]. Therefore, it is necessary to investigate the effects of voltage stress on the reliability of semiconductor packages, even under immersion cooling environment.

This study evaluated the effects of DC voltage stress on heat generation and electrical degradation in air and single-phase immersion cooling environments for commercial DRAM packages, analyzing the acceleration mechanisms of the degradation. Heat generation characteristics were measured using an infrared camera in an air environment and a contact-based thermometer in an immersion environment. The experimental results showed that the immersion cooling environment allowed a stable temperature of the packages via its cooling performance. In contrast, heat generation continued to increase in the air environment, resulting in more rapid degradation at relatively high voltages (3.0 V and 3.1 V). The electrical characteristics were measured using a probe station and a current–voltage analyzer to evaluate the package’s I-V curves. The analysis confirmed that heat generation is a critical factor in accelerating electrical degradation. In air, accumulated heat accelerated degradation, leading to a substantial increase in leakage current. In contrast, under immersion cooling, heat generation was significantly suppressed, minimizing the increase in leakage current.

These findings are expected to define the reliable voltage range that DRAM packages can withstand, verify the effectiveness of immersion cooling technology at the package level, and contribute to the establishment of design standards for stable data center operation.

2. Materials and Methods

2.1. Semiconductor Package

The DRAM used in this experiment was a fine-pitch ball grid array (FBGA) type 4 GB DDR4 synchronous dynamic random access memory (SDRAM) (H5AN4G6NBJR-UHC, SK hynix, Icheon, Republic of Korea). The package dimensions were 13 mm × 7.5 mm × 1.1 mm, with 96 balls, a ball pitch of 0.8 mm, and a ball diameter of 0.45 mm, as shown in Figure 1a,b. The regular operating voltage was 1.2 V, the absolute maximum DC ratings ranged from −0.3 V to 1.5 V, and the normal operating temperature range was 0 °C to 85 °C. This memory package consisted of a die that performed calculation and storage functions, an epoxy molding compound (EMC) that provided protection, and solder balls that electrically connected it to a printed circuit board (PCB); see Figure 1c. When voltage stress is applied to DRAM, leakage current occurs due to high-energy carriers colliding with gate oxide film, leading to the formation of trap states through hot carrier injection (HCI) [13,14]. This process induces oxide film damage and, over time, results in gate oxide breakdown due to trap-assisted degradation, also known as time-dependent dielectric breakdown (TDDB) [11]. The increase in leakage current leads to greater heat generation, further accelerating the degradation of the semiconductor chip. If this phenomenon persists, heat generation and leakage current will increase exponentially, ultimately causing a significant reduction in DRAM reliability [15]. The leakage current characteristics under voltage stress are depicted in Figure 1d.

2.2. Accelerated Stress Test

Reliability tests for memory packages are typically conducted under harsh environments, including high temperature, high humidity, and voltage stress. However, since direct heat application to the package is not feasible in an immersion environment, this study focused on the high-voltage stress test (HVST). It is an accelerated life evaluation method that applies a voltage exceeding the standard operating voltage to assess device stability under overvoltage conditions [16].

To proceed with the HVST, a high DC voltage was applied to the power supply pins (VDD/VSS) of the semiconductor package for an extended duration using a DC power supply (UTP3305-II, UNI-T, China). Subsequently, electrical characteristics were measured using a probe station (mst4000A, MSTECH, Hwaseong, Republic of Korea) and a precision I-V analyzer (E5270B, KEYSIGHT, Santa Rosa, CA, USA) as shown in Figure 2a.

Because of the small size of the solder balls, jumper wires could be applied only to a single VDD/VSS pair (No. 1) [Figure 2b]. To ensure that the selected pair effectively delivered voltage across the package, I-V curves of four different VDD/VSS pairs were measured using a probe station [Figure 2c]. The measurement results demonstrated that all pairs exhibited identical electrical characteristics in fresh state [Figure 2d]. Based on this, it was concluded that the selected pair could reliably represent the entire set of VDD/VSS pairs, as all pairs exhibited consistent electrical behavior.

To investigate the thermal and electrical characteristics of DRAM under voltage stress in air and immersion cooling environments, DC voltages of 2.5 V, 2.8 V, 3.0 V, and 3.1 V were applied to the semiconductor chip for up to 1 h [Figure 2e]. However, when 3.1 V was applied, excessive heat generation caused detachment at the junction between the jumper wire and the solder ball, limiting the test duration to a maximum of 30 min. An I-V sweep was performed using a probe station in order to analyze electrical changes after voltage stress application. The sweep voltage started from 0 V and went up to 5 V, and the maximum measurable current was 100 mA.

2.3. Dielectric Coolant

The immersion cooling environment was formed by submerging a single memory package in a polystyrene container filled with a nonconductive single-phase coolant (FC-3283, 3M, St. Paul, MN, USA). Although single-phase coolants have lower cooling performance than two-phase coolants [17], they offer relatively high stability and boiling points. Given these properties, a single-phase coolant was selected as the most suitable option for the experimental setup [Figure 2f]. This coolant had a boiling point of 128 °C. Typical single-phase immersion cooling systems require an additional coolant cooling device. However, in this experiment, no additional cooling device was used, as the heat generated by a single chip had a negligible impact on coolant temperature variation. When a high DC voltage was applied to the package, nucleate boiling occurred near the wafer within the package [Figure 2g].

2.4. Temperature Measurement

To assess the heat generation characteristics under voltage stress, temperature variations in the package were measured. In the air environment, the maximum package temperature was recorded at 5, 10, and 30 min intervals for each applied voltage using an infrared camera (RSE300, FLUKE, Everett, WA, USA) [Figure 3a]. The measurement range was set from 25 °C to 190 °C, with an emissivity of 0.90 and a frame rate of 30 Hz. In the immersion cooling environment, since infrared radiation could not pass through the dielectric coolant, it was challenging to evaluate the heat generation of the memory package. Instead, a contact-based thermometer (54-2 B, FLUKE, USA) was attached to the semiconductor package using adhesive tape, and temperature readings were taken every minute for 30 min depending on the applied voltage.

3. Results and Discussion

3.1. Thermal Characteristics of Packages Under Voltage Stress

In this work, temperature variations by heat generation due to voltage stress were investigated in both air and immersion cooling environments. The maximum temperature was measured for 30 min as described in the section above. In the immersion cooling environment, thermally accelerated degradation seemed to minimize because of the higher cooling performance of immersion cooling than air, and no sudden temperature changes were observed [Figure 3c]. However, a relatively rapid initial increase in package temperature was observed. At 2.5 V, the temperature initially increased by 1.1 °C, then began to decrease after 7 min. At 2.8 V, the temperature initially increased by 2.9 °C, followed by an additional rise of 0.1 °C at 10 min and 0.5 °C at 30 min, based on the 5 min measurement interval. At 3.0 V, the temperature initially increased by 4.9 °C, with further increases of 0.2 °C at 10 min and 0.8 °C at 30 min. At 3.1 V, the temperature initially increased by 5.4 °C, then rose by 0.3 °C at 10 min and 2.2 °C at 30 min [Figure 3b]. As described above, the immersion cooling ensured that the package temperature increase remained below ~10 °C, even at voltages 2.5 times higher than the regular operating voltage.

In the air environment, natural cooling was observed; however, when the package experienced relatively high voltages, heat accumulation accelerated, leading to a rapid increase in the package’s maximum temperature compared with the initial state [Figure 3c]. At 2.5 V, the temperature increased by 8.6 °C at 5 min but gradually decreased as time passed because of air cooling, preventing further thermal acceleration. At 2.8 V, the initial temperature rise was 21.2 °C, which was higher than that at 2.5 V. However, temperature variation was not accelerated because of the natural cooling effect. At 3.0 V, the increase in initial temperature was 40.4 °C, leading to additional temperature rises of 1.8 °C at 10 min and 9.6 °C at 30 min. At 3.1 V, thermal degradation progressed rapidly as soon as the voltage was applied. The temperature increased by 75.2 °C at 5 min, followed by additional rises of 33.5 °C at 10 min and 50.2 °C at 30 min. At relatively low voltage stress (2.5 V, 2.8 V) in both air and immersion cooling environments, thermal accelerations were not critical because of lower heat generation. However, as the stress voltage exceeded 3.0 V and 3.1 V, a nonlinear increase in maximum temperature was observed because the generated heat effectively dissipated. At 25 °C, air has a thermal conductivity of 0.026 W/m·K [18], while FC-3283 exhibits a higher value of about 0.066 W/m·K [19], which is approximately 2.5 times greater than that of air. The improved cooling performance in immersion environments can be attributed not only to the higher thermal conductivity of the liquid coolant but to the generally higher heat transfer coefficient at the solid–liquid interface, which enhances heat dissipation efficiency compared with solid–air systems.

This difference explains why thermal accelerations were minimized in the immersion cooling environment, confirming that this advanced cooling method provides greater thermal stability than air cooling even under elevated voltage conditions. Based on the above results, the changes in electrical characteristics due to voltage stress are expected to demonstrate a similar trend with thermal performance characterization. This would imply that the immersion cooling environment is more effective at suppressing the thermally induced performance degradation of semiconductor devices under elevated voltage stress conditions.

To ensure consistency between measurement methods, additional temperature measurements were conducted under air conditions using a contact-based thermometer (Figure S1A). The results showed good agreement with infrared measurements at 2.5 V and 2.8 V, with differences within approximately 10% (Figure S2A,B). At higher voltages, stable contact could not be maintained because of thermal degradation of the attachment tape (Figure S1B).

3.2. I-V Curve

The I-V curve was measured using a probe station to evaluate leakage current caused by the electrical stress. Although thermal resistance is commonly used as an indicator of packaging failure [20,21], this study employed the I-V curve to characterize internal electrical degradation. At 2.5 V and 2.8 V, the electrical characteristics of the package remained identical to those of the undamaged (fresh) package up to 1 h. In the previous heat generation measurements shown in Figure 4a–d and Figure S3, only slight thermal accelerations were observed under these voltage conditions. It was interesting to note that the packages exhibited a maximum temperature difference of approximately 13 °C among the cooling environments. However, the measurement results demonstrated no significant differences in electrical behavior.

On the other hand, distinct electrical behaviors were observed under 3.0 V and 3.1 V conditions, as shown in Figure 5a–d and Figure S4. As previously anticipated, the greatest difference in electrical behavior occurred when 3.1 V was applied for 30 min in the air environment. Variations in the I-V curve exhibited a time-dependent trend in both the immersion and air cooling environments. Based on the regular operating voltage of 1.2 V, the package currents were compared under 3.0 V and 3.1 V conditions in both two environments. At 3.0 V, the current of the package stressed in the immersion cooling environment was 0.905 mA at 10 min, 1.105 mA at 30 min, and 1.127 mA at 60 min, while the current of the package in the air was 0.921 mA at 10 min, 1.558 mA at 30 min, and 1.705 mA at 60 min. At 3.1 V, the package stressed in the coolant showed a current of 1.033 mA at 10 min and 1.704 mA at 30 min, whereas that cooled in the air environment showed increases in current to 1.545 mA at 10 min and 3.282 mA at 30 min.

These electrical behaviors were consistent with the thermal performance characterizations. Interestingly, no significant degradation of electrical performance was observed at relatively low voltage stress, whereas a nonlinear increase in leakage currents occurred at higher voltages, accompanied by accumulated heat within the package. This indicates that heat accumulation is a primary factor influencing package leakage current and suggests that immersion cooling is an effective method for maintaining device reliability under elevated voltage stress conditions.

These time-dependent I-V characteristics indicate that electrical degradation accelerated notably beyond 3.0 V, as reflected in the increasing slope of the I-V curve. This nonlinearity suggests the onset of stress-induced leakage current mechanisms, which may stem from charge trapping and oxide weakening in the MOSFET structure. The substantial current increase at 3.0 V, particularly in the air-cooled environment, implies that this voltage exceeds the safe operational margin and could act as a practical failure threshold for long-term reliability. These observations further support the need to define conservative voltage limits in package design, especially when operated under limited cooling conditions.

3.3. Leakage Current Increase Rate and Degradation Mechanism

To assess the electrical performance of two different cooling methods, we compared the leakage current of an undamaged package (fresh) at the operating voltage of 1.2 V with that of packages that were exposed to stress at 3.0 V and 3.1 V over time [Figure 6a]. At 3.0 V, the leakage current of the immersion cooling package increased by approximately 13% after 30 min and 15% after 1 h relative to fresh. In contrast, the leakage current of the air cooling package increased by ~59% after 30 min and 74% after 1 h. At 3.1 V, the leakage current of the package under immersion cooling increased by 74% after 30 min, while that of the package in the air environment increased by 234%. The leakage current caused by voltage stress was approximately three times lower in the immersion cooling environment than in the air.

Based on these results, it is noteworthy that the immersion cooling environment provided superior cooling performance to that of air, effectively reduced electrical and thermal stress caused by elevated voltage and enhanced the electrical stability of the package. Furthermore, the following mechanism explains this effect. When elevated voltage was applied to DRAM, heat generated by electrical stress and thermal acceleration was not effectively dissipated in the air environment, resulting in a significant increase in leakage current. As a result, the package leakage current increased rapidly, leading to oxide degradation and instability of the semiconductor device, which in turn caused an additional increase in leakage current [Figure 6b]. In contrast, in the immersion cooling environment, the heat generated by electrical stress was dissipated more effectively, minimizing further increases in leakage current and enhancing the reliability of the semiconductor package [Figure 6c].

These results indicate a nonlinear correlation between stress voltage and leakage current growth rate, which is consistent with degradation mechanisms such as hot carrier injection and time-dependent dielectric breakdown. The observed current increase under air environment, particularly at 3.0 V, suggests that this condition surpasses the critical stress limit for DRAM packages. As such, it is recommended that operating voltages be maintained below 2.8 V to prevent accelerated degradation in air-cooled systems.

4. Conclusions

In this study, we evaluated heat generation and electrical degradation in DRAM packages under DC voltage stress (2.5–3.1 V) in air and single-phase immersion cooling environments. The results demonstrated that immersion cooling significantly reduced heat accumulation and suppressed the leakage current approximately 59% compared to air cooling. At 3.0 V and 3.1 V, the leakage current in air increased up to three times more than that in immersion cooling, confirming the electrical stability of immersion cooling. These findings provide essential data for assessing DRAM reliability and establish design criteria for stable data center operations. Based on the observed leakage current behavior and thermal trends, it is analytically evident that DRAM packages experience accelerated degradation when stressed above 3.0 V. While the recommended operating voltage remains at 1.2 V, our findings highlight 2.8 V as a critical stress threshold beyond which reliability rapidly declines. These results offer valuable insights for determining safe stress margins and reliability limits in package-level design and accelerated testing frameworks, particularly for systems evaluated under overvoltage conditions.