A Fully-Differential CMOS Instrumentation Amplifier for Bioimpedance-Based IoT Medical Devices

Round 1

Reviewer 1 Report

The paper describes an interesting FD CMOS Instrumentation Amplifier that utilises indirect current feedback. The author provides a clearer description of design consideration and implementation, however, the paper still needs to be improved regarding the presentation of the experimental results:

1.   It is noted that simulated results value of the amplifier is stated in the paper but adding the simulation result to the measured gain response of figure 7 would give a clearer state of the performance of the amplifier.

2.   Since the load capacitor is carefully selected during your design consideration for a better phase margin of the DM and CM feedback loop, can the author provide a plot of both the phase and the gain margin?

3.   Can the author also justify if the device is stable?

4.   Also, provide the simulation result of the total harmonic distortion as in figure 8.

5.   Could the author also add noise plot and CMRR vs the considered frequency range?

Author Response

Please, see attached file. Thank you!

Author Response File: Author Response.pdf

Reviewer 2 Report

The paper reports the implementation of a fully-differential instrumentation amplifier, based on indirect current feedback and aimed to electrical impedance measurements in an Internet of  Things (IoT) biomedical scenario. The instrumentation amplifier consists of two fully-differential transconductors, to process the input signal and feed back the output signal, a summing stage, used to add both contributions and generate the correcting current feedback signal, and a common-mode feedback network, which controls the DC level at the output nodes of the circuit. The transconductors are formed by a voltage-to-current conversion resistor and two voltage buffers, which are based on a super source follower cell in order to improve the overall response of the circuit. As a result, a compact single-stage structure, suitable to achieve a high bandwidth and a low power consumption, is obtained. The proposed circuit has been designed and fabricated in 180 nm CMOS technology to operate with a 1.8-V supply and provide a nominal gain of 4 V/V. Experimental results show a voltage gain of 3.78±0.06 V/V, a BW of 5.83 MHz, a CMRR at DC around 70 dB, a DC current consumption of 266.4 µA and a silicon area occupation of 0.0304 mm2.

In general I have no particular technical comments,  I can only congratulate with the authors  because the work is very interesting. The paper is well-written and reports almost all the needed information, like a complete and exhaustive introduction, circuit topology description, design flow explanation and measured results.

Two only aspects are missing for me and rise some dubt about the work.

The first, that is a minor aspect, is the missing of the biasing network. For completness It should be reported in the paper or at the least claim what is the values of the DC voltages across the various transistors (mainly that used to bias the core transistors). 

The second aspect is the very limited novelty of the topology depicted in Fig. 3. At the least of the connection wich allows the conversion differential-to-single ended, such topology was widely used by the same authors in papers that have been also cited in the submitted manuscript as [26] and [27]. Looking at these three manuscripts, while the die seems the same for all the three, the characterized and proposed blocks are surely different. However, the limited novelty of the proposed scheme makes this work less appealing for publication. 

 

Author Response

Please, see attached file. Thank you!

Author Response File: Author Response.pdf

Reviewer 3 Report

The manuscript is well written, I liked read it! Please, address the following minor concerns:

1) Table 3: correct the DR of your previous work [26] to 52.2 as reported in the original paper.

2) Adding a figure of merit like in [23] may be useful to summarize obtained results. I recommend this modification.

Author Response

Please, see attached file. Thank you!

Author Response File: Author Response.pdf

Reviewer 4 Report

The manuscript presents a IA for IoT medical devices. In overall the literature review and paper are interesting.  However, paper needs major revision before considering for final publication.

1. Could you please emphasize the novelty of the paper? Contribution of the paper is not clear.

2.  Could you please plot measured IRN vs frequency?

3. Could you please plot CMRR over temp. and supply variations?

Thank you.

Author Response

Please, see attached file. Thank you!

Author Response File: Author Response.pdf

Reviewer 5 Report

The authors propose a fully differential CMOS Instrumentation Amplifier for Bioimpedance-Based IoT Medical Devices. A test chip has been fabricated and actual measurements are reported that compare well, for the most part, with the performances expected form the design phase.

However, if we compare this work with the one by the same authors published in MDPI Electronics (reference 26 in the manuscript), the degree of novelty for an interested reader is quite limited and the fact that a differential implementation would result in better performances is not supported by the experimental results. The increase in the input dynamic range is quite limited, and comparing the THD graphs in the two paper is even less impressive as it clearly depends on the way in which the threshold is chosen. As for the other claimed advantage of lower noise, from the tables reported in the manuscript it would appear that the higher noise in the previous design [26] might be due to the larger bandwidth, however in [26] it is specified that the noise is evaluated over a bandwidth of 4 MHz due to limitations in the measurements set-up. I must assume that such limitations have been removed since the noise for the new design has been reported as measured in a bandwidth up to about 6 MHz. The fact that it is not clear how the noise comparison is made make the claim of lower noise questionable. The authors do state that the increase in the measured noise with respect to the simulated one can be due to noise introduced by the experimental set-up, but provide no proof of this fact. Moreover, in the case of the pseudodifferential design reported in [26], the simulated noise is 72 uVrms vs the measured 92 uVrms. This fact, once again, makes the claim for better noise performances questionable.

Most of the other indicators (consumed power, bandwidth, CMMR, and area) are worse in the new design with respect to the design in [26]. The fact that the CMMR is worse is particularly relevant both because a fully differential design is  expected to behave better and because a high CMRR is especially relevant in performing bioimpedance measurement, because of the significant common mode voltage that results from the contact resistance of the lower end of the current source in the configuration in Fig. 1. In other words, should one make a choice between the design in [26] and the “new” design, there is no convincing argument, in my view, to select the one reported in the present work.

I am being particular in stressing these aspects because the design presented in this work is heavily based on the design presented in [26] and this fact is not stressed enough (as it should have been) in the paper. In particular, it is apparent that the core circuit proposed in Fig. 3 in the manuscript is essentially the circuit in Fig. 3 in [26] with the same transistor values (Table 1 in this manuscript and Table 2 in [26]) with a change in the connection of a couple of nodes as required to implement a fully differential system.

The strict relationship between this work and the work published in Electronics [26] also begs the question of the reason why the authors have submitted the new manuscript to a different Journal.  Assuming that sufficient new material and results were worth reporting, Electronics, as the Journal in which the previous results have been published, should have been the natural choice.

 

Author Response

Please, see attached file. Thank you!

Author Response File: Author Response.pdf

Round 2

Reviewer 4 Report

Thank you for the revision.